View NXPSEMICONDUCTORSNV-PCA9554D_6783070.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1. general description the pca9554 and pca9554a are 16-pin cmos devices that provide 8 bits of general purpose parallel input/output (gpio) expansion for i 2 c-bus/smbus applications and were developed to enhance the nxp semiconductors family of i 2 c-bus i/o expanders. the improvements include higher drive capability, 5 v i/o to lerance, lower supply current, individual i/o configuration, 400 khz clo ck frequency, and smaller packaging. i/o expanders provide a simple solution when additional i/o is needed for acpi power switches, sensors, push buttons, leds, fans, etc. the pca9554/pca9554a consist of an 8-bit co nfiguration register (input or output selection); 8-bit input port register, 8-bit output port register and an 8-bit polarity inversion register (active high or active lo w operation). the system master can enable the i/os as either inputs or outputs by writing to the i/o configuration bits. the data for each input or output is kept in the corres ponding input port or output port register. the polarity of the read register can be invert ed with the polarity inversion register. all registers can be read by the system master. although pin-to-pin and i 2 c-bus address compatible with the pcf8574 series, software changes are required due to the enhancements and are discussed in application note an469 . the pca9554/pca9554a open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. the power-on reset sets the registers to their default values and initia lizes the device state machine. three hardware pins (a0, a1, a2) vary the fixed i 2 c-bus address and allow up to eight devices to share the same i 2 c-bus/smbus. the pca9554a is identical to the pca9554 except that the fixed i 2 c-bus address is different allowing up to sixteen of these devices (eight of each) on the same i 2 c-bus/smbus. 2. features and benefits ? operating power supply voltage range of 2.3 v to 5.5 v ? 5 v tolerant i/os ? polarity inversion register ? active low interrupt output ? low standby current ? noise filter on scl/sda inputs ? no glitch on power-up ? internal power-on reset ? 8 i/o pins which default to 8 inputs ? 0 hz to 400 khz clock frequency pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt rev. 8 ? 26 july 2011 product data sheet
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 2 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt ? esd protection exceeds 2000 v hbm per jesd22-a114 and 1000 v cdm per jesd22-c101 ? latch-up testing is done to jedec standard jesd78 which exceeds 100 ma ? aec-q100 compliance available ? packages offered: dip16, so16 , ssop16, ssop20, tssop16, hvqfn16 (2 versions: 4 ? 4 ? 0.85 mm and 3 ? 3 ? 0.85 mm), and bare die 3. ordering information [1] pca9554pw/q900 is aec-q100 compliant. contact i2c.support@nxp.com for ppap. table 1. ordering information t amb = ? 40 ? cto+85 ? c. type number topside mark package name description version pca9554n pca9554n dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 pca9554an pca9554an pca9554d pca9554d so16 plastic small outline package; 16 leads; body width 7.5 mm sot162-1 pca9554ad pca9554ad pca9554db 9554db ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 pca9554adb 9554a pca9554ts pca9554 ssop20 plastic shrink small outline package; 20 leads; body width 4.4 mm sot266-1 pca9554ats pa9554a pca9554pw 9554dh tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 pca9554pw/q900 [1] 9554dh pca9554apw 9554adh pca9554bs 9554 hvqfn16 plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 ? 4 ? 0.85 mm sot629-1 pca9554abs 554a pca9554bs3 p54 hvqfn16 plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 3 ? 3 ? 0.85 mm sot758-1 pca9554abs3 54a pca9554u - bare die - -
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 3 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 4. block diagram all i/os are set to inputs at reset. fig 1. block diagram of pca9554/pca9554a pca9554/pca9554a power-on reset 002aac492 i 2 c-bus/smbus control input filter scl sda v dd input/ output ports io0 v ss 8-bit write pulse read pulse io2 io4 io6 io1 io3 io5 io7 lp filter v dd int a0 a1 a2
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 4 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 5. pinning information 5.1 pinning fig 2. pin configuration for dip16 fig 3. pin configuration for so16 fig 4. pin configuration for ssop16 fig 5. pin configuration for tssop16 pca9554n pca9554an a0 v dd a1 sda a2 scl io0 int io1 io7 io2 io6 io3 io5 v ss io4 002aac485 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 v dd sda scl int io7 io6 io5 io4 a0 a1 a2 io0 io1 io2 io3 v ss pca9554d pca9554ad 002aac486 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 pca9554db pca9554adb 002aac487 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 v dd sda scl int io7 io6 io5 io4 a0 a1 a2 io0 io1 io2 io3 v ss v dd sda scl int io7 io6 io5 io4 a0 a1 a2 io0 io1 io2 io3 v ss pca9554pw pca9554pw/q900 pca9554apw 002aac488 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 5 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 6. pin configuration for ssop20 fig 7. pin configuration for hvqfn16 (sot629-1) fig 8. pin configuration for hvqfn16 (sot758-1) pca9554ts pca9554ats int io7 scl io6 n.c. n.c. sda io5 v dd io4 a0 v ss a1 io3 n.c. n.c. a2 io2 io0 io1 002aac489 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 002aac490 pca9554bs pca9554abs transparent top view io2 io6 io1 io7 io0 int a2 scl io3 v ss io4 io5 a1 a0 v dd sda 4 9 3 10 2 11 1 12 5 6 7 8 16 15 14 13 terminal 1 index area 002aac491 pca9554bs3 pca9554abs3 transparent top view io2 io6 io1 io7 io0 a2 scl io3 v ss io4 io5 a1 a0 v dd sda 4 9 3 10 2 11 1 12 5 6 7 8 16 15 14 13 terminal 1 index area int
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 6 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 5.2 pin description [1] hvqfn16 package die supply ground is connected to both v ss pin and exposed center pad. v ss pin must be connected to supply ground for pr oper device operation. for enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the pcb in the thermal pad region. 6. functional description refer to figure 1 ? block diagram of pca9554/pca9554a ? . 6.1 registers 6.1.1 command byte the command byte is the first byte to follow the address byte during a write transmission. it is used as a pointer to dete rmine which of the following re gisters will be written or read. table 2. pin description symbol pin description dip16, so16, ssop16, tssop16 hvqfn16 ssop20 a0 1 15 6 address input 0 a1 2 16 7 address input 1 a2 3 1 9 address input 2 io0 4 2 10 input/output 0 io1 5 3 11 input/output 1 io2 6 4 12 input/output 2 io3 7 5 14 input/output 3 v ss 86 [1] 15 supply ground io4 9 7 16 input/output 4 io5 10 8 17 input/output 5 io6 11 9 19 input/output 6 io7 12 10 20 input/output 7 int 13 11 1 interrupt output (open-drain) scl 14 12 2 serial clock line sda 15 13 4 serial data line v dd 16 14 5 supply voltage n.c. - - 3, 8, 13, 18 not connected table 3. command byte command protocol function 0 read byte input port register 1 read/write byte output port register 2 read/write byte polarity inversion register 3 read/write byte conf iguration register
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 7 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 6.1.2 register 0 - input port register this register is a read-only port. it reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by register 3. writes to this register have no effect. the default ?x? is determined by the externa lly applied logic level, normally ?1? when no external signal externally applied because of the internal pull-up resistors. 6.1.3 register 1 - output port register this register reflects the outgoing logic levels of the pins defined as outputs by register 3. bit values in this register have no effect on pi ns defined as inputs. reads from this register return the value that is in the flip -flop controlling the output selection, not the actual pin value. table 4. register 0 - input port register bit description bit symbol access value description 7 i7 read only x determined by externally applied logic level 6 i6 read only x 5 i5 read only x 4 i4 read only x 3 i3 read only x 2 i2 read only x 1 i1 read only x 0 i0 read only x table 5. register 1 - output port register bit description legend: * default value. bit symbol access value description 7 o7 r 1* reflects outgoing logic levels of pins defined as outputs by register 3 6o6 r 1* 5o5 r 1* 4o4 r 1* 3o3 r 1* 2o2 r 1* 1o1 r 1* 0o0 r 1*
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 8 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 6.1.4 register 2 - polarity inversion register this register allows the user to invert the polar ity of the input port register data. if a bit in this register is set (written with ?1?), the corresponding input port data is inverted. if a bit in this register is cleared (written with a ?0?) , the input port data polarity is retained. 6.1.5 register 3 - configuration register this register configures the dire ctions of the i/o pins. if a bit in this register is set, the corresponding port pin is enabled as an input with high-impedance output driver. if a bit in this register is cleared, the corresponding po rt pin is enabled as an output. at reset, the i/os are configured as inputs with a weak pull-up to v dd . 6.2 power-on reset when power is applied to v dd , an internal power-on reset (por) holds the pca9554/pca9554a in a reset condition until v dd has reached v por . at that point, the reset condition is released and the pca9 554/pca9554a registers and state machine will initialize to their default states. thereafter, v dd must be lowered below 0.2 v to reset the device. for a power reset cycle, v dd must be lowered below 0.2 v and then restored to the operating voltage. table 6. register 2 - polarity inversion register bit description legend: * default value. bit symbol access value description 7 n7 r/w 0* inverts polarity of input port register data 0 = input port register da ta retained (default value) 1 = input port register data inverted 6n6 r/w 0* 5n5 r/w 0* 4n4 r/w 0* 3n3 r/w 0* 2n2 r/w 0* 1n1 r/w 0* 0n0 r/w 0* table 7. register 3 - configuration register bit description legend: * default value. bit symbol access value description 7 c7 r/w 1* configures the directions of the i/o pins 0 = corresponding port pin enabled as an output 1 = corresponding port pin configured as input (default value) 6c6 r/w 1* 5c5 r/w 1* 4c4 r/w 1* 3c3 r/w 1* 2c2 r/w 1* 1c1 r/w 1* 0c0 r/w 1*
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 9 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 6.3 interrupt output the open-drain interrupt output is activated w hen one of the port pins change state and the pin is configured as an input. the interr upt is deactivated when the input returns to its previous state or the input port register is read. note that changing an i/o from and output to an input may cause a fa lse interrupt to occur if the state of the pin does not match th e contents of the input port register. 6.4 i/o port when an i/o is configured as an input, fets q1 and q2 are off, creating a high-impedance input with a weak pull-up (100 k ? typ.) to v dd . the input voltage may be raised above v dd to a maximum of 5.5 v. if the i/o is configured as an output, then either q1 or q2 is enabled, depending on the state of the output port register. care should be exercised if an external voltage is applied to an i/o configured as an output because of the low-impedance paths that exist between the pin and either v dd or v ss . remark: at power-on reset, all registers return to default values. fig 9. simplified schematic of io0 to io7 v dd io0 to io7 output port register data configuration register dq ck q data from shift register write configuration pulse output port register dq ck write pulse polarity inversion register dq ck data from shift register write polarity pulse input port register dq ck read pulse input port register data polarity inversion register data 002aac493 ff data from shift register ff ff ff q1 q2 v ss to int 100 k
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 10 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 6.5 device address 6.6 bus transactions data is transmitted to the pca9554/pca9554a registers using the write mode as shown in figure 12 and figure 13 . data is read from the pca9554/pca9554a registers using the read mode as shown in figure 14 and figure 15 . these devices do not implement an auto-increment function, so once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new comm and byte has been sent. fig 10. pca9554 device address fig 11. pca9554a device address 002aac494 0 1 0 0 a2 a1 a0 r/w fixed slave address hardware selectable 002aac495 0 1 1 1 a2 a1 a0 r/w fixed slave address programmable fig 12. write to output port register 1 0 0 a2 a1 a0 0 a s0 start condition r/w acknowledge from slave 002aac472 a acknowledge from slave scl sda a write to port data out from port p t v(q) 987654321 command byte acknowledge from slave data to port data 1 slave address 0000001 0 stop condition data 1 valid fig 13. write to configuration register or polarity inversion register 1 0 0 a2 a1 a0 0 a s0 start condition r/w acknowledge from slave 002aac473 a acknowledge from slave scl sda a data to register p 987654321 command byte acknowledge from slave data to register data slave address 0000011/0 0 stop condition
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 11 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 14. read from register 1 0 0 a2 a1 a0 0 a s0 start condition r/w acknowledge from slave 002aac474 a acknowledge from slave sda a p command byte acknowledge from master data from register data (first byte) slave address stop condition s (repeated) start condition (cont.) (cont.) 1 0 0 a2 a1 a0 1 a 0 r/w acknowledge from slave slave address at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter na no acknowledge from master data from register data (last byte) this figure assumes the command byte has previously been programmed with 00h. transfer of data can be stopped at any moment by a stop condition. fig 15. read input port register 1 0 0 a2 a1 a0 1 a s0 start condition r/w acknowledge from slave 002aac475 a acknowledge from master scl sda na read from port data into port p t h(d) 987654321 data from port no acknowledge from master data from port data 4 slave address data 1 stop condition data 2 data 3 data 4 t su(d) int t v(int_n) t rst(int_n)
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 12 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 7. application design-in information 8. limiting values device address configured as 0100 100x for this example. io0, io1, io2 configured as outputs. io3, io4, io5 configured as inputs. io6 and io7 are not used and must be configured as outputs. fig 16. typical application pca9554 io0 io1 scl sda v dd 002aac496 scl sda io2 io3 v dd v ss master controller v ss v dd (5 v) 2 k subsystem 1 (e.g., temp. sensor) int subsystem 2 (e.g., counter) reset controlled switch (e.g., cbt device) a b enable int int 10 k 10 k subsystem 3 (e.g., alarm system) alarm io4 io5 v dd a2 a1 a0 io6 io7 10 k 10 k table 8. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +6.0 v i i input current - ? 20 ma v i/o voltage on an input/output pin v ss ? 0.5 5.5 v i o(ion) output current on pin ion - ? 50 ma i dd supply current - 85 ma i ss ground supply current - 100 ma p tot total power dissipation - 200 mw t stg storage temperature ? 65 +150 ?c t amb ambient temperature operating ? 40 +85 ?c
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 13 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 9. static characteristics table 9. static characteristics v dd = 2.3 v to 5.5 v; v ss =0v; t amb = ? 40 ? c to +85 ? c; unless otherwise specified. symbol parameter conditions min typ max unit supplies v dd supply voltage 2.3 - 5.5 v i dd supply current operating mode; v dd =5.5v; no load; f scl = 100 khz - 104 175 ? a i stb standby current standby mode; v dd = 5.5 v; no load; v i =v ss ; f scl = 0 khz; i/o = inputs - 550 700 ? a standby mode; v dd = 5.5 v; no load; v i =v dd ; f scl = 0 khz; i/o = inputs -0.251 ? a v por power-on reset voltage no load; v i =v dd or v ss [1] - 1.5 1.65 v input scl; input/output sda v il low-level input voltage ? 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd -5.5v i ol low-level output current v ol =0.4v 3 6 - ma i l leakage current v i =v dd =v ss ? 1- +1 ? a c i input capacitance v i =v ss - 6 10 pf i/os v il low-level input voltage ? 0.5 - +0.8 v v ih high-level input voltage 2.0 - 5.5 v i ol low-level output current v ol =0.5v; v dd =2.3v [2] 810- ma v ol =0.7v; v dd =2.3v [2] 10 13 - ma v ol =0.5v; v dd =3.0v [2] 814- ma v ol =0.7v; v dd =3.0v [2] 10 19 - ma v ol =0.5v; v dd =4.5v [2] 817- ma v ol =0.7v; v dd =4.5v [2] 10 24 - ma v oh high-level output voltage i oh = ? 8ma; v dd =2.3v [3] 1.8 - - v i oh = ? 10 ma; v dd =2.3v [3] 1.7 - - v i oh = ? 8ma; v dd =3.0v [3] 2.6 - - v i oh = ? 10 ma; v dd =3.0v [3] 2.5 - - v i oh = ? 8ma; v dd =4.75v [3] 4.1 - - v i oh = ? 10 ma; v dd =4.75v [3] 4.0 - - v i li input leakage current v dd =3.6v; v i =v dd ? 1- +1 ? a i l leakage current v dd =5.5v; v i =v ss -- ? 100 ? a c i input capacitance - 3.7 5 pf c o output capacitance - 3.7 5 pf interrupt int i ol low-level output current v ol =0.4v 3 - - ma
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 14 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt [1] v dd must be lowered to 0.2 v for at least 5 ? s in order to reset part. [2] each i/o must be externally limited to a maximum of 25 ma and the device must be limited to a maximum current of 100 ma. [3] the total current sourced by all i/os must be limited to 85 ma. 10. dynamic characteristics [1] t vd;ack = time for acknowledgement signal from scl low to sda (out) low. [2] t vd;dat = minimum time for sda data output to be valid following scl low. [3] c b = total capacitance of one bus line in pf. select inputs a0, a1, a2 v il low-level input voltage ? 0.5 - 0.8 v v ih high-level input voltage 2.0 - 5.5 v i li input leakage current ? 1- 1 ? a table 9. static characteristics ?continued v dd = 2.3 v to 5.5 v; v ss =0v; t amb = ? 40 ? c to +85 ? c; unless otherwise specified. symbol parameter conditions min typ max unit table 10. dynamic characteristics symbol parameter conditions standard-mode i 2 c-bus fast-mode i 2 c-bus unit min max min max f scl scl clock frequency 0 100 0 400 khz t buf bus free time between a stop and start condition 4.7 - 1.3 - ? s t hd;sta hold time (repeated) start condition 4.0 - 0.6 - ? s t su;sta set-up time for a repeated start condition 4.7 - 0.6 - ? s t su;sto set-up time for stop condition 4.0 - 0.6 - ? s t hd;dat data hold time 0 - 0 - ? s t vd;ack data valid acknowledge time [1] 0.3 3.45 0.1 0.9 ? s t vd;dat data valid time [2] 300 - 50 - ns t su;dat data set-up time 250 - 100 - ns t low low period of the scl clock 4.7 - 1.3 - ? s t high high period of the scl clock 4.0 - 0.6 - ? s t r rise time of both sda and scl signals - 1000 20 + 0.1c b [3] 300 ns t f fall time of both sda and scl signals - 300 20 + 0.1c b [3] 300 ns t sp pulse width of spikes that must be suppressed by the input filter - 50 - 50 ns port timing t v(q) data output valid time - 200 - 200 ns t su(d) data input set-up time 100 - 100 - ns t h(d) data input hold time 1 - 1 - ? s interrupt timing t v(int_n) valid time on pin int -4 - 4 ? s t rst(int_n) reset time on pin int -4 - 4 ? s
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 15 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 17. definition of timing t sp t buf t hd;sta p p s t low t r t hd;dat t f t high t su;dat t su;sta sr t hd;sta t su;sto sda scl 002aaa986
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 16 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 11. package outline fig 18. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 dip16: plastic dual in-line package; 16 leads (300 mil) sot38-4
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 17 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 19. package outline sot162-1 (so16) unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z ywv references outline version european projection issue date iec jedec jeita mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 sot162-1 8 16 w m b p d detail x z e 9 1 y 0.25 075e03 ms-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.41 0.40 0.30 0.29 0.05 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 x a a 1 a 2 h e l p q e c l v m a (a ) 3 a 0 5 10 mm scale so16: plastic small outline package; 16 leads; body width 7.5 mm sot162-1 99-12-27 03-02-19
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 18 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 20. package outline sot338-1 (ssop16) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 19 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 21. package outline sot266-1 (ssop20) unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0 1.4 1.2 0.32 0.20 0.20 0.13 6.6 6.4 4.5 4.3 0.65 1 0.2 6.6 6.2 0.65 0.45 0.48 0.18 10 0 o o 0.13 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.20 mm maximum per side are not included. 0.75 0.45 sot266-1 mo-152 99-12-27 03-02-19 w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a x (a ) 3 a y 0.25 11 0 20 11 pin 1 index 0 2.5 5 mm scale ssop20: plastic shrink small outline package; 20 leads; body width 4.4 mm sot266-1 a max. 1.5
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 20 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 22. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 21 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 23. package outline sot629-1 (hvqfn16) terminal 1 index area 0.65 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 4.1 3.9 d h 2.25 1.95 y 1 4.1 3.9 2.25 1.95 e 1 1.95 e 2 1.95 0.38 0.23 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot629-1 mo-220 - - - - - - 0.75 0.50 l 0.1 v 0.05 w 0 2.5 5 mm scale sot629-1 hvqfn16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 58 16 13 12 9 4 1 x d e c b a e 2 01-08-08 02-10-22 terminal 1 index area 1/2 e 1/2 e ac c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 22 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt fig 24. package outline sot758-1 (hvqfn16) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.1 2.9 d h 1.75 1.45 y 1 3.1 2.9 1.75 1.45 e 1 1.5 e 2 1.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot758-1 mo-220 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot758-1 hvqfn16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 3 x 3 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 58 16 13 12 9 4 1 x d e c b a e 2 02-03-25 02-10-21 terminal 1 index area 1/2 e 1/2 e ac c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 23 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 12. handling information all input and output pins are protected ag ainst electrostatic discharge (esd) under normal handling. when handling ensure that the appropriate precautions are taken as described in jesd625-a or equivalent standards. 13. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 13.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 13.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 13.3 wave soldering key characteristics in wave soldering are:
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 24 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities 13.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 25 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 11 and 12 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 25 . table 11. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 ? 350 < 2.5 235 220 ? 2.5 220 220 table 12. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 25 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 14. soldering of throug h-hole mount packages 14.1 introduction to solderi ng through-hole mount packages this text gives a very brief insight into wave, dip and manual soldering. wave soldering is the preferred method for mounting of through-hole mount ic packages on a printed-circuit board. 14.2 soldering by dipping or by solder wave driven by legislation and environmental forc es the worldwide use of lead-free solder pastes is increasing. typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 ? c or 265 ? c, depending on solder material applied, snpb or pb-free respectively. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seati ng plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 14.3 manual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 ? c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 ? c and 400 ? c, contact may be up to 5 seconds. msl: moisture sensitivity level fig 25. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 26 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 14.4 package related soldering information [1] for sdip packages, the longitudinal axis must be para llel to the transport direction of the printed-circuit board. [2] for pmfp packages hot bar solder ing or manual soldering is suitable. 15. abbreviations table 13. suitability of through-hole mount ic packages for dipping and wave soldering package soldering method dipping wave cpga, hcpga - suitable dbs, dip, hdip, rdbs, sd ip, sil suitable suitable [1] pmfp [2] - not suitable table 14. abbreviations acronym description acpi advanced configuration and power interface cdm charged device model cmos complementary metal-oxide semiconductor esd electrostatic discharge fet field-effect transistor gpio general purpose input/output hbm human body model i 2 c-bus inter-integrated circuit bus i/o input/output led light-emitting diode mm machine model pcb printed-circuit board por power-on reset smbus system management bus
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 27 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 16. revision history table 15. revision history document id release date data sheet status change notice supersedes pca9554_9554a v.8 20110726 product data sheet - pca9554_9554a v.7 modifications: ? section 2 ? features and benefits ? : ? 11th bullet item: deleted phrase ?200 v mm per jesd22-a115? ? added new (13th) bullet item ?aec-q100 compliance available? ? table 1 ? ordering information ? : ? corrected package version from ?sot38-1? to ?sot38-4? for type numbers pca9554n and pca9554an ? added type number pca9554pw/q900 ? figure 5 ? pin configuration for tssop16 ? : added type number pca9554pw/q900 ? table 9 ? static characteristics ? : ? sub-section ?i/os?: corrected symbol ?i ih ? to ?i li ? (input leakage current) ? sub-section ?i/os?, symbol i li : corrected min value from ?-? to ? ? 1 ? a? ? sub-section ?i/os?: corrected symbol/parameter from ?i il , input leakage current? to ?i l , leakage current? ? table note [1] modified (added phrase ?for at least 5 ? s?) ? table 10 ? dynamic characteristics ? : unit for t f is corrected from ? ? s? to ?ns? ? figure 18 : corrected package version fr om ?sot38-1? to ?sot38-4? ? updated soldering information pca9554_9554a v.7 20061113 product data sheet - pca9554_9554a v.6 pca9554_9554a v.6 (9397 750 13289) 20040930 product data - pca9554_9554a v.5 pca9554_9554a v.5 (9397 750 10163) 20020726 product data 853-2243 28672 of 26 july 2002 pca9554_9554a v.4 pca9554_9554a v.4 (9397 750 09817) 20020513 product specification - pca9554_9554a v.3 pca9554_9554a v.3 (9397 750 08342) 20010507 product specification - pca9554_9554a v.2 pca9554_9554a v.2 (9397 750 08209) 20010319 product specification - pca9554_9554a v.1 pca9554_9554a v.1 (9397 750 08159) 20010319 product specification - -
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 28 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 17.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 17.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
pca9554_9554a all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 26 july 2011 29 of 30 nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 17.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 18. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors pca9554; pca9554a 8-bit i 2 c-bus and smbus i/o port with interrupt ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 26 july 2011 document identifier: pca9554_9554a please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 functional description . . . . . . . . . . . . . . . . . . . 6 6.1 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.1.1 command byte . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.1.2 register 0 - input port register . . . . . . . . . . . . . 7 6.1.3 register 1 - output port r egister. . . . . . . . . . . . 7 6.1.4 register 2 - polarity inversion register . . . . . . . 8 6.1.5 register 3 - configuration register . . . . . . . . . . 8 6.2 power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.3 interrupt output . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.4 i/o port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.5 device address . . . . . . . . . . . . . . . . . . . . . . . . 10 6.6 bus transactions . . . . . . . . . . . . . . . . . . . . . . . 10 7 application design-in information . . . . . . . . . 12 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 12 9 static characteristics. . . . . . . . . . . . . . . . . . . . 13 10 dynamic characteristics . . . . . . . . . . . . . . . . . 14 11 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 12 handling information. . . . . . . . . . . . . . . . . . . . 23 13 soldering of smd packages . . . . . . . . . . . . . . 23 13.1 introduction to soldering . . . . . . . . . . . . . . . . . 23 13.2 wave and reflow soldering . . . . . . . . . . . . . . . 23 13.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 23 13.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 24 14 soldering of through-hole mount packages . 25 14.1 introduction to soldering through-hole mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 14.2 soldering by dipping or by solder wave . . . . . 25 14.3 manual soldering . . . . . . . . . . . . . . . . . . . . . . 25 14.4 package related solderin g information . . . . . . 26 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 26 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 27 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 28 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 28 17.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 17.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 29 18 contact information. . . . . . . . . . . . . . . . . . . . . 29 19 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

▲Up To Search▲

Price & Availability of NXPSEMICONDUCTORSNV-PCA9554D

	To Download NXPSEMICONDUCTORSNV-PCA9554D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .