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features ?? easy ? to ? use ?? interfaces ? directly ? with? microprocessors ?? 0.15 ? character ? height ? in? 4,? 8,? and? 16? (2x8)? character ? packages ?? 0.20 ? character ? height ? in? 4? and? 8? character ? packages ?? rugged ? x- ? and? y-stackable ? package ?? serial ? input ?? convenient ? brightness ? controls ?? wave ? solderable ?? ofered ? in? fve ? colors ?? low ? power ? cmos? technology ?? ttl ? compatible applications ?? telecommunications ? equipment ?? portable ? data ? entry ? devices ?? computer ? peripherals ?? medical ? equipment ?? test ? equipment ?? business ? machines ?? avionics ?? industrial ? controls device selection guide algaas her orange yellow green package description hcms- hcms- hcms- hcms- hcms- drawing 1?x?4?0.15 ? character? 2905? 2902? 2904? 2901? 2903? a 1?x?8?0.15 ? character? 2915? 2912? 2914? 2911? 2913? b 2?x?8?0.15 ? character? 2925? 2922? 2924? 2921? 2923? c 1?x?4?0.20 ? character? 2965? 2962? 2964? 2961? 2963? d 1?x?8?0.20 ? character? 2975? 2972? 2974? 2971? 2973? e esd warning: standard cmos handling precautions should be observed to avoid static discharge. description the ? hcms-29xx ? series ? are ? high ? performance, ? easy ? to ? use? dot? matrix ? displays ? driven ? by ? on-board ? cmos? ics. ? each ? display ? can ? be ? directly ? inte r faced ? with ? a ? microproces - sor, ?thus?elimina ting?the?need? for?cumbersome? interface? comp o nents. ? the ? serial ? ic ? interface ? allows ? higher ? cha r ac - ter ? count ? information ? displays ? with? a? minimum? of? data ? lines. ? a ? variety ? of ? colors, ? font ? heights, ? and ? character ? counts ? gives ? designers ? a? wide? range ? of? pro d uct? choices ? for ? their? specifc? appli cations? and? the? easy? to ? read ? 5? x? 7? pixel ? format ? allows ? the? display ? of? uppercase, ? lower ? case, ? kat a kana, ? and ? custom ? user-defned ? characters. ? these ? dis - plays ? are ? stackable ? in? the? x- ? and? y- ? directions, ? making ? them? ideal? for ? high? character ? count ? displays. hcms-29xx series high performance cmos 5 x 7 alphanumeric displays data sheet
2 hcms-291x hcms-290x notes: 1. dimensions are in mm (inches) . 2. unless otherwise specified, tolerance on dimensions is 0.38 mm (0.015 inch) . 3. lead material: solder plated copper alloy. x z coo 2.11 (0.083) typ. 0.25 (0.010) 7.62 (0.300) pin # 1 identifier 4 3 2 1 17.78 (0.700) max. 3.71 (0.146) typ. 4.45 (0.175) typ. 2.22 (0.087) sym. 10.16 (0.400) max. pin # 1 light intensity category date code color bi n country of origi n part number 5.08 (0.200) 2.54 (0.100) sym. typ. 0.51 0.13 (0.020 0.005) 2.54 0.13 (0.100 0.005) (non accum. ) typ. 4.32 (0.170) typ. 1.27 (0.050) sym. 1 12 0.51 (0.020) data out osc v led data in rs clk ce blank gnd sel v logi c reset pin function assignment table 1 2 3 4 5 6 7 8 9 10 11 12 pin # function hcms-290x yyww notes: 1. dimensions are in mm (inches) . 2. unless otherwise specified, tolerance on dimensions is 0.38 mm (0.015 inch) . 3. lead material: solder plated copper alloy. 2.54 0.13 (0.100 0.005) (non accum. ) typ. 35.56 (1.400) max. 7 6 5 4 3 2 1 0 0.25 (0.010) 7.62 (0.300) pin # 1 identifier x z coo intensity category date code (year, week) color bi n country of origi n part number 5.08 (0.200) 2.54 (0.100) sym. 0.51 (0.020) typ. 0.51 0.13 (0.020 0.005) 2.22 (0.087) sym. 10.16 (0.400) max. 2.11 (0.083) typ. 4.32 (0.170) typ. 1.27 (0.050) sym. 4.45 (0.175) typ. 3.71 (0.146) typ. no pin no pin v led no pin no pin no pin gnd led no pin no pin v led no pin no pin no pin data in rs no pin clock ce blank gnd logi c sel v logi c no pin reset osc data out pin function assignment table 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 pin # function 3 26 hcms-291x yyww
3 hcms-292x hcms-296x notes: 1. dimensions are in mm (inches). 2. unless otherwise specified, the tolerance on dimensions is 0.38 mm (0.015 inch). 3. lead material: solder plated copper alloy. 3 2 1 0 pin # 1 identifier part number 5.31 (0.209) 4.28 (0.169) sym. typ. 0.51 0.13 (0.020 0.005) 2.54 0.13 (0.100 0.005) typ. 2.67 (0.105) sym. 2.54 (0.100) typ. 11.43 (0.450) max. 5.36 (0.211) typ. 0.25 (0.010) 7.62 (0.300) 3.71 (0.146) typ. 1.83 (0.072) sym. 4.57 (0.180) typ. x z coo intensity category date code (year, week) color bin country of origin 21.46 (0.845) max. 0.50 (0.020) data out osc v led data in rs clk ce blank gnd sel v logic reset 1 2 3 4 5 6 7 8 9 10 11 12 pin function assignment table pin # function hcms-296x yyww no pin no pin v le d no pin no pin no pin gnd le d no pin no pin v le d no pin no pin no pin data in rs no pin clock ce blank gnd logi c sel v logi c no pin rese t os c data out pin function assignment table no pi n no pi n v led no pi n no pi n no pi n gnd led no pi n no pi n v led no pi n no pi n no pi n data in rs no pi n clock ce blank gnd logi c sel v logi c no pi n reset osc data out 1a 2a 3a 4a 5a 6a 7a 8a 9a 10a 11a 12a 13a 14a 15a 16a 17a 18a 19a 20a 21a 22a 23a 24a 25a 26a pin # function notes: 1. dimensions are in mm (inches) . 2. unless otherwise specified, tolerance on dimensions is 0.38 mm (0.015 inch) . 3. lead material: solder plated copper alloy. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1.27 (0.050 ) 0.2 5 (0.010) 7.62 (0.300 ) 2.03 (0.080 ) 4.83 (0.190) pin # 1 identifier row a row b 35.56 (1.400) max. 3.71 (0.146) typ. 2.22 (0.088) sym. 4.45 (0.175) max. 19.81 (0.780) max. 9.65 (0.380) x z coo intensity category date code (year, week) color bi n country of origi n part number 5.08 (0.200 ) 2.54 (0.100 ) sym. 0.51 (0.020) 0.51 0.13 (0.020 0.005) typ. 2.54 0.13 (0.100 0.005 ) (non accum. ) typ. 3a 26a 3b 26b 2.11 (0.083) typ. 1b 2b 3b 4b 5b 6b 7b 8b 9b 10 b 11 b 12 b 13 b 14 b 15 b 16 b 17 b 18 b 19 b 20 b 21 b 22 b 23 b 24 b 25 b 26 b pin # function hcms-292x yyww
4 absolute maximum ratings logic ?supply? voltage, ? v logic ? to?gnd logic ?? -0.3? v? to?7.0? v led?supply? voltage, ? v led ? to?gnd led ?? -0.3? v? to?5.5? v input ? voltage, ? any? pin? to?gnd?? -0.3? v? to? v logic ?+0.3? v free ? air? operating? temperature ? range? t a [1] ?? -40c? to?+85c relative ? humidity? (noncondensing)? 85% storage ? temperature, ? t s ?? -55c? to?100c soldering ? temperature ?[1.59?mm?(0.063?in.)? below? body] ? ? solder ?dipping? 260c? for?5?secs ? ? wave ? soldering?? 250c? for?3?secs esd? protection?@?1.5? k,?100?pf?(each?pin)?? class?1,?0-1999? v total ? package? power? dissipation? at? t a ?=?25c [2] ? ? 4? character?? 1.2? w ? ? 8? character?? 2.4? w ? ? 16? character?? 4.8? w note: 1.? for? operation?in?high? ambient? temperatures,?see? appendix?a,? thermal ? considerations. hcms-297x recommended operating conditions over temperature range (-40c to +85c) parameter symbol min. typ. max. units logic ?supply? voltage ? v logic ? 3.0? 5.0? 5.5? v led?supply? voltage ? v led ? 4.0? 5.0? 5.5? v gnd led ? to?gnd logic ? C? -0.3? 0? +0.3? v pin function assignment table notes: 1. dimensions are in mm (inches). 2. unless otherwise specified, tolerance on dimensions is 0.38 mm (0.015 inch). 3. lead material: solder plated copper alloy. 8 7 6 5 4 3 2 1 x z coo pin # 1 identifier intensity categor y date code (year, week) color bin country of origin part number 5.31 (0.209) 6.22 (0.245) sym . 0.51 (0.020) typ. 0.51 0.13 (0.020 0.005) 2.54 0.13 (0.100 0.005) (non accum. ) typ. 42.93 (1.690) max. 2.67 (0.105) sym . 5.36 (0.211) typ. 11.43 (0.450) max . 2.54 (0.100) typ. 0.25 (0.010) 7.62 (0.300) 3.71 (0.146) typ. 1.90 (0.075) sym . no pin no pin v led no pin no pin no pin gnd le d no pin no pin v led no pin no pin no pin data in rs no pin cloc k ce blank gnd logi c sel v logic no pin reset os c data out 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 pin # functio n 4.57 (0.180) typ. 3 26 hcms-297x yyw w
5 electrical characteristics over operating temperature range (-40c to +85c) t a = 25c -40c < t a < 85c v logic = 5.0 v 3.0 v < v logic < 5.5 v parameter symbol typ. max. min. max. units test conditions input ? leakage? current? i i ? ? ? ? ? a? v in ?=?0? v? to? v logic ? ? hcms-290x/296x ?(4?char) ? ? ? +7.5? -2.5? +50 ? ? hcms-291x/297x ?(8?char) ? ? ? +15? -5.0? +100 ? ? hcms-292x ?(16?char) ? ? ? +15? -5.0? +100 i logic ? operating? i logic (opt) ? ? ? ? ? ma? v in ?=? v logic ? ? hcms-290x/296x ?(4?char) ? ? 0.4? 2.5 ? ? 5 ? ? hcms-291x/297x ?(8?char) ? ? 0.8? 5 ? ? 10 ? ? hcms-292x ?(16?char) ? ? 0.8? 5 ? ? 10 i logic ?sleep [1] ? i logic (slp) ? ? ? ? ? a? v in ?=? v logic ? ? hcms-290x/296x ?(4?char) ? ? 5? 15 ? ? 25 ? ? hcms-291x/297x ?(8?char) ? ? 10? 30 ? ? 50 ? ? hcms-292x ?(16?char) ? ? 10? 30 ? ? 50 i led ?blank? i led (bl) ? ? ? ? ? ma? bl?=?0? v ? ? hmcs-290x/296x ?(4?char) ? ? 2.0? 4 ? ? 4.0 ? ? hcms-291x/297x ?(8?char) ? ? 4.0? 8 ? ? 8 ? ? hcms-292x ?(16?char) ? ? 4.0? 8 ? ? 8 i led ?sleep [1] ? i led (slp) ? ? ? ? ? a? ? ? hcms-290x/296x ?(4?char) ? ? 1? 3 ? ? 50 ? ? hcms ?291x/297x?(8?char) ? ? 2? 6 ? ? 100 ? ? hcms-292x ?(16?char) ? ? 2? 6 ? ? 100 peak ? pixel? current [2] ? i pixel ? ? ? ? ? ? v led ?=?5.5? v ? ? hcms-29x5 ? (algaas) ? ? 15.4? 17.1 ? ? 18.7? ma? all ? pixels?on, ? ? hcms-29xx ? (other? colors) ? ? 14.0? 15.9 ? ? 17.1? ma? average ? value?per? pixel high? level? input? voltage ? v ih ? ? ? 2.0 ? ? v? 4.5? v? 6 electrical description pin function description reset ? (rst)? sets ? control ? register ? bits? to ? logic ? low. ? the ? dot ? register ? contents ? are ? unafected ? by ? the? reset?pin.? (logic? low?=? reset;? logic?high?=? normal? operation). data ?in?(d in )? serial ? data ? input? for ? dot ? or? control ? register ? data. ? data ? is? entered ? on? the? rising ? edge? of?the?clock? input. data ?out?(d out )? serial ? data ? output? for ? dot ? or? control ? register ? data. ? this ? pin? is? used? for ? cascading? multiple? displays. clock ? (clk)? clock? input? for ? writing ? dot ? or? control ? register ? data. ? when ? chip? enable? is? logic ? low, ? data ?is? entered?on?the? rising?clock? edge. register? select?(rs)? selects ? dot? register?(rs?=? logic? low)?or? control? register?(rs?=? logic?high)?as?the??des - tination ? for ? serial ? data ? entry. ? the ? logic ? level ? of? rs? is? latched ? on? the? falling? edge? of? the? chip?enable? input. chip?enable? (ce)? this ? input? must? be? a? logic ? low ? to ? write ? data ? to ? the? display. ? when ? ce? returns ? to ? logic ? high? and? clk? is? logic ? low, ? data ? is? latched ? to ? either? the? led? output? drivers ? or? a? control ? register. oscillator ? select?(sel)? selects ? either? an? internal ? or? external ? display ? oscillator ? source. ? (logic ? low ? =? external ? display ? oscillator;? logic?high?=? internal? display? oscillator). oscillator ? (osc)? output ? for ? the? internal ? display ? oscillator ? (sel? =? logic ? high)? or? input? for ? an? external ? display ? oscillator?(sel?=? logic? low). blank?(bl)? blanks?the? display?when? logic?high.? may?be? modulated? for? brightness? control. gnd led ? ground ? for?led? drivers. gnd logic ? ground ? for? logic. v led ?? positive ?supply? for?led? drivers. v logic ?? positive ?supply? for? logic. optical characteristics at 25c [1] v led ?=?5.0? v, ?50%? peak? current,?100%? pulse? width peak dominant luminous intensity per led [2] wavelength wavelength character average (cd) l peak (nm) l d [3] (nm) display color part number min. typ. typ. typ. algaas ? red?? hcms-29x5 ? 95? 230? 645? 637 high ? efciency? red? hcms-29x2 ? 29? 64? 635? 626 orange ? hcms-29x4 ? 29? 64? 600? 602 yellow ? hcms-29x1 ? 29? 64? 583? 585 green ? hcms-29x3 ? 57? 114? 568? 574 notes: 1.? refers ? to?the?initial?case? temperature?of?the? device? immediately? prior? to? measurement. 2.? measured ?with?all?leds? illuminated. 3.? dominant ? wavelength,? l d ,?is? derived? from?the?cie? chromaticity? diagram?and? represents?the?single? wavelength?which?defnes?the? perceived? led? color.?
7 ac timing characteristics over temperature range (-40c to +85c) timing diagram ref. 4.5 v < v logic <5.5 v v logic = 3 v number description symbol min. max. min. max. units 1? register ? select? setup? time ? to?chip?enable? ? t rss ? 10 ? ? 10 ? ? ns 2? register ? select?hold? time ? to?chip?enable? ? t rsh ? 10 ? ? 10 ? ? ns 3? rising ?clock? edge? to? falling? ? t clkce ? 20 ? ? 20 ? ? ns ? ? chip?enable? edge 4? chip?enable? setup? time ? to? rising?clock? edge? ? t ces ? 35 ? ? 55 ? ? ns 5? chip?enable?hold? time ? to? rising?clock? edge? ? t ceh ? 20 ? ? 20 ? ? ns 6? data ? setup? time ? to? rising?clock? edge? ? t ds ? 10 ? ? 10 ? ? ns 7? data ?hold? time ? after? rising?clock? edge? ? t dh ? 10 ? ? 10 ? ? ns 8? rising ?clock? edge? to?d out [1] ? ? t dout ? 10? 40? 10? 65? ns 9? propagation ? delay?d in ? to?d out ?? ? t doutp ? ? 18 ? ? 30? ns ? ? simultaneous? mode? for?one?ic [1,2] 10? ce? falling? edge? to?d out ? valid ? ? t cedo ? ? 25 ? ? 45? ns 11? clock? high? time ? ? t clkh ? 80 ? ? 100 ? ? ns 12? clock? low? time ? ? t clkl ? 80 ? ? 100 ? ? ns ? reset ? low? time ? ? t rstl ? 50 ? ? 50 ? ? ns ? clock? frequency?? ? f cyc ? ? 5 ? ? 4? mhz ? internal ? display? oscillator? frequency? ? f inosc ? 80? 210? 80? 210? khz ? internal ? refresh? frequency? ? f rf ? 150? 410? 150? 400? hz ? external ? display? oscillator?? frequency? ? f exosc ? ? ? ? ? ? prescaler ?=?1? ? 51.2? 1000? 51.2? 1000? khz ? ? prescaler ?=?8? ? 410? 8000? 410? 8000? khz notes: 1.? timing ? specifcations? increase?0.3?ns?per?pf?of? capacitive?loading? above?15? pf. 2.? this ? parameter?is? valid? for?simultaneous? mode? data? entry?of?the? control? register.
8 display overview the ? hcms -29xx? series ? is? a? family? of? led? displays ? driven ? by ? on- board? cmos? ics. ? the ? leds? are ? confgured ? as? 5? x? 7? font ? characters ? and? are ? driven ? in? groups ? of? 4? characters ? per ? ic. ? each ? ic ? consists ? of ? a ? 160 - bit ? shift ? register ? (the ? dot ? register), ? two ? 7-bit? control ? words, ? and? refresh ? circuitry. ? the ? dot ? regi s ter? contents ? are ? mapped? on? a? one - to - one? basis? to ? the? display. ? thus, ? an? individual? dot ? register ? bit? uniquely? controls ? a? single? led. 8- character ? displays ? have ? two ? ics? that ? are ? cascaded. ? the ? data ? out ? line? of? the? frst? ic? is? internally ? connected ? to ? the? data ? in ? line? of? the? second ? ic? forming ? a? 320-bit? dot ? register. ? the ? dis plays? other? control ? and? power ? lines? are ? connected ? directly ? to ? both? ics. ? in ? 16- character ? displays, ? each ? row ? functions ? as ? an ? independent ? 8 - character ? display ? with? its? own ? 320-bit? dot ? register. reset reset ? initializes ? the? control ? registers ? (sets? all? control ? register ? bits? to ? logic ? low) ? and? places ? the? display ? in? the? sleep? mode. ? the ? reset ? pin? should? be? co n nected? to ? the? system ? power - on? reset ? circuit. ? the ? dot ? registers ? are ? not? cleared ? upon? power - on? or? by ? reset. ? after ? power - on,? the? dot ? register ? contents ? are ? random; ? however, ? reset ? will? put ? the ? display ? in ? sleep ? mode, ? ther e by ? blanking ? the ? leds. ? the ? control ? register ? and? the? control ? words ? are ? cleared ? to ? all? zeros ? by ? reset. to ? operate ? the? display ? after ? being? reset, ? load? the? dot ? register ? with? logic ? lows. ? then ? load? control ? word ? 0? with? the? desired ? brigh tness? level ? and? set? the? sleep? mode? bit? to ? logic ? high. dot register the ? dot ? register ? holds? the? pattern ? to ? be? displayed ? by ? the? leds. ? data ? is? loaded? into ? the? dot ? register ? according ? to ? the? procedure ? shown ? in? table ? 1? and? the? write ? cycle ? timing ? diagram. first ? rs? is? brought ? low, ? then? ce? is? brought ? low. ? next, ? each? successive ? rising ? clk? edge? will? shift ? in? the? data ? at ? the? d in ? pin.? loading ? a? logic ? high? will? turn ? the? cor - responding ? led? on;? a? logic ? low ? turns ? the? led? of. ? when ? all? 160? bits? have ? been? loaded? (or? 320? bits? in? an? 8- digit ? display), ? ce? is? brought ? to ? logic ? high. when ? clk ? is ? next ? brought ? to ? logic ? low, ? new ? data ? is ? latched ? into ? the? display ? dot? drivers. ? loading ? data ? into ? the? dot ? register ? takes? place ? while? the? previous ? data ? is? displayed ? and? eliminates ? the? need? to ? blank? the? display ? while? loading? data. pixel map in ? a? 4- character ? display, ? the? 160-bits? are ? arranged ? as? 20? columns ? by ? 8? rows. ? this ? array ? can? be? conceptualized ? as? four ? 5? x? 8? dot? matrix ? character ? loca tions, ? but? only? 7? of? the? 8? rows ? have ? leds? (see? figures ? 1? &? 2).? the ? bottom ? row ? (row ? 0)? is? not? used. ? thus, ? latch ? location ? 0? is? never ? displayed. ? column?0? controls?the? left -most? column.? data? from ? dot ? latch ? locations ? 0-7? determine ? whether? or? not? pixels ? in ? column ? 0 ? are ? turned - on ? or ? turned - of. ? therefore, ? the? lower ? left ? pixel ? is? turned - on? when? a? logic ? high? is? stored ? in? dot ? latch ? location ? 1.? characters ? are ? loaded? in ? serially, ? with ? the ? left - most ? character ? being ? loaded ? frst? and? the? right -most? character ? being? loaded? last. ? by ? loading? one? character ? at ? a? time? and? latching ? the? data ? before ? loading ? the ? next ? character, ? the ? fgures ? will ? appear ? to ? scroll ? from ? right ? to ? left. table 1. register truth table function clk ce rs select ? dot? register? not? rising ? ? l ? load ? dot? register ? ? ? d in ?=?high???led?=? on ? ? l? x ? ? ? d in ?=? low????led?=? off copy ? data? from? dot? register? to? dot? latch? l? h? x select ? control? register? not? rising ? ? h ? load ? control? register [1,3] ? ? l? x ? latch ? data? to ? control ? word [2] ? l? ? x notes: 1.? bit ?d 0 ?of? control? word ?1?must? have?been? previously?set? to? low? for? serial?mode?or? high? for?simultane - ous? mode. 2.? selection ?of? control? word ?1?or? control? word ?0?is?set? by?d 7 ?of?the? control? shift? register.? the ? unselect - ed? control? word? retains?its? previous? value. 3.? control ? word ? data?is?loaded? most? signifcant?bit?(d 7 )? frst.
9 hcms-29xx write cycle diagram note: 1. data is copied to the control register or the dot latch and led outputs when ce is high and clk is low . t rss rsh t t clkce ces t clkh t clkl t ceh t ds t dh t cedo t dout t doutp t previous data new data new data latched here [1] ce rs clk d in led outputs, control registers (simultaneous) out d d (serial) out 2 1 3 4 11 12 6 7 8 10 9 5 control word 0 loading ? the? control ? register ? with? d 7 ? =? logic ? low ? se - lects ? control ? word ? 0? (see? table ? 2).? bits? d 0 -d 3 ? adjust? the? display ? brightness ? by ? pulse? width? modulating ? the? led? on-time, ? while? bits? d 4 -d 5 ? adjust? the? display ? brightness ? by ? changing ? the ? peak ? pixel ? current. ? bit ? d 6 ? selects ? normal ? operation ? or? sleep? mode. sleep? mode? (control ? word ? 0,? bit? d 6 ? =? low) ? turns ? of? the? internal ? display ? oscillator ? and? the? led? pixel ? drivers. ? this ? mode? is? used? when? the? ic? needs? to ? be? powered ? up, ? but? does? not? need? to ? be? active. ? current ? draw ? in? sleep? mode? is ? nearly ? zero. ? data ? in ? the ? dot ? register ? and ? control ? words ? are ? retained ? during ? sleep? mode. control register the ? control ? register ? allows ? software ? modifcation ? of? the? ics ? oper a tion ? and ? consists ? of ? two ? independent ? 7 - bit ? control ? words. ? bit? d 7 ? in? the? shift ? register ? selects ? one? of? the? two ? 7-bit? control ? words. ? control ? word ? 0? performs ? pulse? width? modula tion? brightness ? control, ? peak? pixel ? current ? brightness ? control, ? and ? sleep ? mode. ? control ? word ? 1? sets? serial/simultaneous ? data ? out? mode, ? and? external ? oscill a tor ? prescaler. ? each ? function ? is ? independent ? of ? the? others. ? control register data loading data ? is? loaded? into ? the? control ? register, ? msb? frst, ? ac - cording ? to ? the ? proc e dure ? shown ? in ? table ? 1 ? and ? the ? write ? cycle ? timing ? diagram. ? first, ? rs? is? brought ? to ? logic ? high? and? then? ce? is? brought ? to ? logic ? low. ? next, ? each? successive ? rising ? clk? edge? will? shift ? in? the? data ? on? the? d in ? pin.? finally, ? when? 8? bits? have ? been? loaded, ? the? ce? line? is? brought ? to ? logic ? high.? when ? clk? goes? to ? logic ? low, ? new? data ? is? copied ? into ? the? selected ? control ? word. ? loading ? data ? into ? the? control ? register ? takes? place ? while? the? previous ? control ? word ? confgures ? the? display.
10 figure 2. figure 1. 40 bit s.r. do di data in oscillator 8 clk chip enable register select reset osc osc select blank data in clr data out control register refresh control rst prescale value h l h l l h d q rs (latched) l h current reference pwm brightness control l h l h rs (latched) ser/par mode 3:8 decoder 40 bit s.r. do di 40 bit s.r. do di 40 bit s.r. do di anode current sources v led + gnd (led) 0 char 0 column 0 column 19 char 1 char 2 char 3 row 7 dot register bit # 159 row 1 row 0 (no leds) dot registers and latches data out cathode field drivers x x x x x x x x x x x x x x x x x x x row 0 (not used) data to next character pixel data from previous character row 7 row 6 row 5 row 4 row 3 row 2 row 1
11 control word 1 loading ? the ? control ? register ? with ? d 7 ? = ? logic ? high ? selects ? control ? word ? 1.? this ? control ? word ? performs ? two ? func - tions:? serial/simultaneous ? data ? out? mode? and? external ? oscillator ? prescale ? select ? (see? table ? 2). serial/simultaneous data output d 0 bit? d 0 ? of? control ? word ? 1? is? used? to ? switch ? the? mode? of? d out ? between ? serial ? and ? simu l t a neous ? data ? entry ? during ? control ? register ? writes. ? the ? default? mode? (logic ? low) ? is? the? serial ? d out ? mode. ? in ? serial ? mode, ? d out ? is? connected ? to ? the? last? bit? (d 7 )? of? the? control ? shift ? register. storing ? a? logic ? high? to ? bit? d 0 ? changes? d out ? to ? simulta - neous? mode? which? afects ? the? control ? register ? only. ? in ? simultaneous? mode, ? d out ? is? logically ? co n nected? to ? d in .? this ? arrang e ment ? allows ? multiple ? ics ? to ? have ? their ? control ? registers ? written ? to ? simul taneously.? for ? example, ? for ? n? ics? in? the? serial ? mode, ? n? *? 8? clock? pulses? are ? needed? to ? load? the? same? data ? in? all? control ? registers. ? in ? the? simul - taneous? mode, ? n? ics? only? need? 8? clock? pulses? to ? load? the? same? data ? in? all? control ? registers. ? the ? propag a tion? delay ? from ? the? frst? ic? to ? the? last? is? n? *? t doutp . external oscillator prescaler bit d 1 bit? d 1 ? of? control ? word ? 1? is? used? to ? scale? the? frequency ? of? an? external ? display ? oscillator. ? when ? this? bit? is? logic ? low, ? the ? external ? display ? osci l l a tor ? directly ? sets ? the ? inter - nal? display ? clock? rate. ? when ? this? bit? is? a? logic ? high,? the? external ? oscilla tor ? is? divided? by ? 8.? this ? scaled? frequency ? then ? sets ? the ? internal ? display ? clock ? rate. ? it ? takes ? 512 ? cycles ? of? the? display ? clock? (or? 8? x? 512? =? 4096? cycles ? of? an? external ? clock? with? the? divide? by ? 8? pr escaler)? to ? com - pletely ? refresh ? the? display ? once. ? using ? the? pr escaler? bit? allows ? the? designer ? to ? use? a? higher? external ? oscillator ? fr e quency? without? extra ? circuitry. this ? bit? has? no? afect ? on? the? internal ? display ? oscillator ? frequency. bits d 2 -d 6 these ? bits? must? always ? be? pr o grammed? to ? logic ? low. cascaded ics figure ? 3? shows ? how ? two ? ics? are ? connected ? within? an? hcms - 29xx ? display. ? the ? frst ? ic ? controls ? the ? four ? left - most ? characters ? and ? the ? second ? ic ? controls ? the ? four ? right - most ? characters. ? the ? dot ? registers ? are ? connected ? in? series ? to ? form ? a? 320-bit? dot? shift ? register. ? the ? location ? of? pixel ? 0? has ? not ? changed. ? however, ? dot ? shift ? register ? bit ? 0 ? of ? ic2 ? becomes ? bit? 160? of? the? 320-bit? dot? shift ? register. the ? control ? registers ? of? the? two ? ics? are ? independent ? of ? each ? other. ? this ? means ? that ? to ? adjust ? the ? display ? brightness ? the ? same ? control ? word ? must ? be ? entered ? into ? both ? ics, ? unless ? the ? control ? registers ? are ? set ? to ? simultaneous? mode. longer ? character ? string ? systems ? can? be? built? by ? cascad - ing? multiple? displays ? together. ? this ? is? accomplished ? by ? creating ? a? fve ? line? bus. ? this ? bus? consists ? of? ce, ? rs,? bl,? reset, ? and? clk. ? the ? display ? pins? are ? connected ? to ? the? corresponding ? bus ? line. ? thus, ? all ? ce ? pins ? are ? connected ? to ? the? ce? bus? line. ? similarly, ? bus? lines? for ? rs,? bl,? reset, ? and? clk? are ? created. ? then ? d in ? is? connected ? to ? the? right -most? display. ? d out ? from ? this? display ? is? connected ? to ? the? next ? display. ? the ? left -most? display ? receives ? its? d in ? from ? the? d out ? of? the? display ? to ? its? right. ? d out ? from ? the? left -most? display ? is? not? used. each? display ? may ? be? set? to ? use? its? internal ? oscillator, ? or? the ? displays ? may ? be ? synchronized ? by ? setting ? up ? one ? display ?as?the? master?and?the?others?as? slaves.? the ? slaves? are ? set? to ? receive ? their? oscillator ? input? from ? the? masters ? oscillator ? output.
12 table 2. control shift register bit d 7 on-time duty relative set low pwm brightness oscillator factor brightness to select control cycles (%) (% ) control word 0 l l l l 0 0 0 l l l h 1 0. 2 1 .7 l l h l 2 0 .4 3. 3 l l h h 3 0 .6 5. 0 l h l l 4 0 .8 6. 7 l h l h 5 1 .0 8. 3 l h h l 7 1 .4 11.7 l h h h 9 1.8 15 h l l l 11 2. 1 1 8 h l l h 14 2. 7 2 3 h l h l 18 3. 5 3 0 h l h h 22 4. 3 3 7 h h l l 28 5.5 47 h h l h 36 7.0 60 h h h l 4 8 9.4 80 h h h h 60 11.7 100 control word 0 l d 6 d 5 d 4 d 3 d 2 d 1 d 0 peak current typical peak relative full brightness pixel current scale current control (ma) (relative brightness, %) h l 4.0 31 l h 6.4 50 l l 9.3 73 (default at power up) h h 12.8 100 sleep mode l ? disables internal oscill a tor-displ ay blank h ? normal opera tion serial/simultaneous data out l ? d out holds contents of bit d 7 h ? d out is functionally tied to d in external display oscillator prescaler l ? oscillator freq 1 h ? oscillator freq 8 bit d 7 set high to select control word 1 reserved for future use (bits d 2 -d 6 must be set low) control word 1 h l l l l l d 1 d 0
13 figure 3. cascaded ics. ce ic2 bits 160-319 characters 4-7 rs bl sel osc clk d out d in ic1 bits 0-159 characters 0-3 d in rs bl sel osc clk d out ce reset reset rs bl sel osc clk d out ce reset d in
14 appendix a. thermal considerations the ? display ? ic? has? a? maximum? junction ? temperature ? of? 150c.? the ? ic? junction ? temperature ? can? be? calculated ? with? equation ? 1? below. a? typical ? value ? for ? r q ja ? is? 100c/w. ? this ? value ? is? typical ? for ? a? display ? mounted ? in? a? socket? and? covered ? with? a? plastic? flter. ? the ? socket? is? soldered ? to ? a? .062? in.? thick? pcb? with? .020? inch? wide, ? one? ounce ? copper ? traces. p d ? can? be? calculated ? as? equ a tion? 2? below. figure ? 4 ? shows ? how ? to ? derate ? the ? power ? of ? one ? ic ? versus ? ambient ? temperature. ? oper a tion? at ? high? ambient ? tem - peratures ? may ? require ? the? power ? per? ic? to ? be? reduced. ? the ? power ? co nsumption? can? be? reduced ? by ? changing ? either? the? n,? i pixel ,? osc? cyc ? or? v led .? changing ? v logic ? has? very ? little? impact ? on? the? power ? consumption. appendix b. electrical considerations equation 1: t j max ?=? t a ?+?p d ?*?r q ja where: ? t j max ? =?maximum?ic? junction? temperature ? t a ? =? ambient? temperature? surrounding?the? display ? r q ja ? =? thermal? resistance ? from?the?ic? junction? to? ambient ? p d ? =? power? dissipated? by?the?ic equation 2: p d ?=?(n?*?i pixel ?*? duty? factor?*? v led )?+?i logic ?*? v logic where: ? p d ? =? total? power? dissipation ? n? =?number? of? pixels?on?(maximum?4?char?*?5?*?7?=?140)?? ? i pixel ? =?peak? pixel? current. ? duty ? factor? =?1/8?*? osccyc/64 ? osc? cyc? =?number?of?on? oscillator? cycles?per? row ? i logic ? =?ic? logic? current ? v logic ? =? logic?supply? voltage equation 3: i peak ?=?m?*?20?*?i pixel where: ? i peak ? =?maximum? instantaneous? peak? current? for?the? display ? m? =?number?of?ics?in?the? system ? 20? =?maximum?number?of?leds?on?per?ic ? i pixel ? =?peak? current? for?one?led equation 4: i led (avg) ?=?n?*?i pixel ?*?1/8?*? (oscillator? cycles)/64 (see? variable ? defnitions? above) figure 4. p d max ? maximum power dissipation per ic ? w 0 25 t a ? ambient temperature ? c 0.7 0.6 0.5 0.4 0.3 0.2 0.1 60 55 50 45 40 35 30 0.8 0.9 1.0 1.1 1.2 85 80 75 70 65 90 1.3 r = 100 c/w j-a
15 current calculations the ? peak ? and ? average ? display ? current ? requirements ? have ? a ? signifcant ? impact ? on ? power ? supply ? selection. ? the ? maximum? peak? current ? is? calculated ? with? equation ? 3. the ? average ? current ? required ? by ? the ? display ? can ? be ? calculated ? with? equation ? 4. the ? power ? supply? has? to ? be? able? to ? supply? i peak ? tran - sients ? and? supply? i led (avg) ? continuously. ? the ? range ? on? v led ? allows ? noise? on? this? supply? without? sig nif cantly? changing ? the? display ? brightness. v logic and v led considerations the ? display ? uses ? two ? indepe n dent ? electrical ? systems. ? one? system ? is? used? to ? power ? the? displays ? logic ? and? the? other? to ? power ? the? displays ? leds. ? these ? two ? systems ? keep? the? logic ? supply? clean. separate ? electrical ? systems ? allow ? the ? voltage ? applied ? to ? v led ? and? v logic ? to ? be? varied ? independently. ? thus, ? v led ? can? vary ? from ? 0? to ? 5.5? v? without? afecting ? either? the ? dot ? or ? the ? control ? registers. ? v led ? can ? be ? varied ? between ? 4.0? to ? 5.5? v? without? any ? noticeable ? variation ? in? light ? output. ? however, ? oper a ting? v led ? below ? 4.0? v? may ? cause ? objectionable ? mismatch ? between ? the ? pixels ? and ? is ? not? recommended.?dimming?the? display? by?pulse?width? modula ting? v led ? is? also? not? recommended. v logic ? can ? vary ? from ? 3.0 ? to ? 5.5 ? v ? without ? afecting ? either ? the ? displayed ? message ? or ? the ? display ? intensity. ? however, ? operation ? below ? 4.5? v? will? change? the? timing? and? logic ? levels ? and? operation ? below ? 3? v? may ? cause? the? dot ? and? control ? registers ? to ? be? altered. the ? logic ? ground ? is ? internally ? connected ? to ? the ? led ? ground ? by ? a? substrate ? diode. ? this ? diode? becomes ? for - ward ? biased? and? conducts ? when? the? logic ? ground ? is? 0.4? v? greater ? than? the? led? ground. ? the ? led? ground ? and? the? logic ? ground ? should? be? connected ? to ? a? common ? ground ? which? can? withstand? the? current ? introduced ? by ? the? switching ? led? drivers. ? when ? separate ? ground ? con - nections ? are ? used, ? the? led? ground ? can? vary ? from ? - 0.3? v? to ? +0.3? v? with? respect ? to ? the? logic ? ground. ? voltages ? below ? - 0.3? v? can? cause? all? the? dots? to ? be? on.? voltage ? above ? +0.3 ? v ? can ? cause ? dimming ? and ? dot ? mismatch. ? the ? led ? ground ? for ? the ? led ? drivers ? can ? be ? routed ? separately ? from ? the ? logic ? ground ? until ? an ? appropr i ate ? ground ? plane? is? available. ? on? long? interconnections ? between ? the? display ? and? the? host? system, ? voltage ? drops ? on? the? analog? ground ? can? be? kept? from ? afecting ? the? display ? logic ? levels ? by ? isolating ? the? two ? grounds. electrostatic discharge the ? inputs? to ? the? ics? are ? pr o tected? against? static ? dis - charge ? and ? input ? current ? latchup. ? ho w ever, ? for ? best ? results, ? standard ? cmos ? handling ? precautions ? should ? be? used. ? before ? use, ? the? hcms - 29xx? should? be? stored ? in ? antistatic ? tubes ? or ? in ? conductive ? material. ? during ? assembly, ? a? grounded ? conductive ? work ? area ? should? be? used? and? assembly? personnel? should? wear ? condu c tive ? wrist ? straps. ? lab ? coats ? made ? of ? synthetic ? material ? should ? be? avoided ? since ? they? are ? prone ? to ? static ? buildup. ? in - put? current ? latchup ? is? caused? when? the? cmos? inputs? are ? subjected ? to ? either? a? voltage ? below ? ground ? (v in ? ? v logic )? and? when? a? high? current ? is? forced ? into ? the? input. ? to ? prevent ? input? current ? latchup ? and? esd? damage, ? unused? inputs? should? be? co n nected? to ? either? ground ? or? v logic .? voltages ? should ? not ? be ? applied ? to ? the ? inputs ? until ? v logic ? has? been? applied? to ? the? display. appendix c. oscillator the ? oscillator ? provides ? the? internal ? refresh ? circuitry ? with? a? signal ? that ? is? used? to ? synchro n ize? the? columns ? and? rows. ? this ? ensures ? that ? the? right ? data ? is? in? the? dot? driv - ers? for ? that ? row. ? this ? signal ? can? be? supplied? from ? either? an? external ? source ? or? the? internal ? source. a ? display ? refresh ? rate ? of ? 100 ? hz ? or ? faster ? ensures ? ficker - free ? operation. ? thus ? for ? an ? external ? oscillator ? the? frequency ? should? be? greater ? than? or? equal? to ? 512? x? 100? hz ? =? 51.2? khz. ? operation ? above ? 1? mhz ? without? the? prescaler ? or? 8? mhz ? with? the? prescaler ? may ? cause? noticeable ? pixel ? to ? pixel ? mismatch. appendix d. refresh circuitry this ? display ? driver ? consists ? of? 20? one - of- eight ? column ? decoders ? and ? 20 ? constant ? current ? sources, ? 1 ? one - of - eight ? row ? decoder ? and? eight ? row ? sinks, ? a? pulse? width? modula - tion? control ? block, ? a? peak? current ? control ? block, ? and? the? circuit ? to ? refresh ? the ? leds. ? the ? refresh ? counters ? and ? oscil - lator ? are ? used? to ? synchronize ? the? columns ? and? rows. the ? 160? bits? are ? organized ? as? 20? columns ? by ? 8? rows. ? the ? ic ? illuminates ? the ? display ? by ? sequentially ? turning ? on ? each ? of? the? 8? row - drivers. ? to ? refresh ? the? display ? once ? takes? 512? oscillator ? cycles. ? because ? there ? are ? eight ? row ? driv - ers, ? each? row ? driver ? is? selected ? for ? 64? (512/8)? oscillator ? cycles. ? four ? cycles ? are ? used? to ? briefy ? blank? the? display ? before ? the? following ? row ? is? switched ? on.? thus, ? each? row ? is? on? for ? 60? oscillator ? cycles ? out? of? a? possible? 64.? this ? corresponds ? to ? the? maximum? led? on? time.
appendix e. display brightness two ? ways ? have ? been? shown ? to ? control ? the? brightness ? of? this? led? display: ? setting? the? peak? current ? and? setting? the? duty ? factor. ? both ? values ? are ? set? in? control ? word ? 0.? to ? compute ? the? resulting ? display ? brightness ? when? both? pwm? and? peak? current ? control ? are ? used, ? simply? multi - ply? the? two ? relative ? brigh tness? factors. ? for ? example, ? if? control ? register ? 0? holds? the? word ? 1001101,? the? peak? current ? is? 73%? of? full? scale? (bit? d 5 ? =? l,? bit? d 4 ? =? l)? and? the? pwm? is? set? to ? 60%? duty ? factor ? (bit? d 3 ? =? h,? bit? d 2 ? =? h,? bit? d 1 ? =? l,? bit? d 0 ? =? h).? the ? resulting ? brightness ? is? 44%? (.73? x? .60? =? .44)? of? full? scale. ? the ? temperature ? of? the? display ? will? also? afect ? the? led? brigh tness? as? shown ? in? figure ? 5. appendix f. reference material application ? note ? 1027:? soldering led components applic a tion ? note ? 1015: ? contrast enhancement techniques for led displays figure 5. relative luminous intensity (normalized to 1 at 25 c) yello w her/orang e 0.2 -55 t a ? ambient temperature ? c 3.0 2.6 2.2 1.8 1.4 1.0 0.6 85 65 45 25 5 -15 -35 green algaas for product information and a complete list of distributors, please go to our website: www.avagotech.com avago avago technologies and the a logo are trademarks of avago technologies limited in the united states and other countries. data subect to change. copyright 2007 avago technologies limited. all rights reserved. obsoletes 5989-3181en av02-0699en - september 18 2007

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