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www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. 1/11 secondary ldo regulators secondary variable output ldo regulator bd00ia5wefj description bd00ia5wefj is a ldo regulator with out put current 0.5a. the output accuracy is 1% of output voltage. with external resistance, it is available to set the output voltage at random (from 0.8v to 5.5v) and also provides output voltage fixed type without external resistance. it is used for the wide applicati ons of digital appliances. it has package type: htsop-j8. over current protection (for protecting the ic destruction by output short circ uit), circuit current on /off switch (for setting the circuit 0a at shutdown mode), and thermal shutdown circ uit (for protecting ic from heat destruction by over load condition) are all built in. it is usable for ceramic capa citor and enables to improve smaller set and long-life. features 1) output current 0.5a 2) high accuracy reference voltage circuit 3) built-in over current protection circuit (ocp) 4) built-in thermal shut down circuit (tsd) 5) with shut down switch 6) output voltage variable type (0.8v to 4.5v) 7) package: htsop-j8 output voltage differential line up product name variable package bd00ia5wefj htsop-j8 product name : b d 0 0 i c 0 w e f j a b c d e signal description a output voltage (v) 00 variable b voltage resistance(v) e 24v h 10v f 20v i 7v g 15v c output current (a) a1 0.1a c0 1.0a a3 0.3a c5 1.5a a5 0.5a d0 2.0a d shutdown switch ?w? shutdown switch is built in ? ? shutdown switch is not built in e package efj htsop-j8 no.10026eat10
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 2/11 bd00ia5wefj absolute maximum ratings (ta=25 ) parameter symbol ratings unit power supply voltage vcc 7.0 *1 v en voltage v en 7.0 v output voltage v out 7.0 v feedback voltage v fb 7.0 v power dissipation htsop-j8 pd *2 2110 *2 mw operating temperature range topr -25 +85 storage temperature range tstg -55 +150 junction temperature tjmax +150 *1 not to exceed pd *2 reduced by 16.9mw/ for each increase in ta of 1 over 25 . (when mounted on a board 70mm 70mm 1.6mm glass-epoxy board, two layer) operating conditions (ta=25 ) parameter symbol ratings unit min. max. input power supply voltage vcc 2.4 5.5 v en voltage v en 0.0 5.5 v output voltage setting range vo 0.8 4.5 v output current io 0.0 0.5 a this product should not be used in a radioactive environment. electrical characteristics (unless otherwise noted, ta=25 , en=3v, vcc=3.3v, r 1 =16k , r 2 =7.5k ) parameter symbol limits unit conditions min. typ. max. circuit current at shutdown mode isd - 0 5 a en=0v, off mode bias current icc - 250 500 a line regulation reg.i - 25 50 mv vcc=( vo+0.6v ) 5.5v load regulation reg io - 25 75 mv io=0 0.5a minimun dropout voltage vco - 0.4 0.6 v vcc=3.3v,io=0.5a output reference voltage v fb 0.792 0.800 0.808 v io=0ma en low voltage v en (low) 0 - 0.8 v en high voltage v en (high) 2.4 - 5.5 v en bias current ien 1 3 9 a i/o equivalent circuits 8pin(vcc) / 1pin(vo) 2pin(fb) 5pin(en) 2pin(fb) vcc 8pin(vcc) 1pin(vo) 5pin(en)
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 3/11 bd00ia5wefj fig.3 input sequence 1 co=1f fig.7 ta-vo (io=0ma) fig.8 ta-icc 2.3 2.4 2.5 2.6 2.7 -25 0 25 50 75 ta [] vo [ v] 85 50 150 250 350 450 -25 0 25 50 75 ta [] icc [a] 85 0.0 1.0 2.0 3.0 4.0 5.0 - 25 0 25 50 75 ta [] istb[a] 85 0.0 2.0 4.0 6.0 8.0 - 25 0 25 50 75 ta [] ien [ a] 85 2.3 2.4 2.5 2.6 2.7 0 0.2 0.4 0.6 0.8 1 io [a] vo [ v] 0.0 1.0 2.0 3.0 4.0 5.0 01 23 45 vcc [v] istb[a] 5.5 reference data (unless otherwise noted, ta=25 , en=3v, vcc=3.3v, r 1 =16k , r 2 =7.5k ) fig.1 transient response(0 1.0a) co=1f fig.2 transient response (1.0 0a) co=1f fig.4 off sequence 1 co=1f fig.5 inpurt sequence 2 co=1f fig.6 off sequence 2 co=1f fig.10 ta-ien fig.9 ta-isd (v en =0v) fig.11 io-vo fig.12 vcc-isd (v en =0v) 20msec / div 500sec / div 10usec / div 10sec / div vo 0.1v/di v io 0.2a/di v vo 2v / di v en 1v / di v vc c 2v / di v 1msec/di v vo 2v/div en 1v/div vc c 2v/div vo 2v/di v en 1v/di v vc c 2v/di v vo 2v/div en 1v/div vc c 2v/div 40msec/di v vo 0.1v/di v io 0.2a/di v
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 4/11 bd00ia5wefj 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0 0.1 0.2 0.3 0.4 0.5 io [a] vdrop [v] 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0 0.1 0.2 0.3 0.4 0.5 io [a] vdrop [v] 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0 0.1 0.2 0.3 0.4 0.5 io [a] vdrop [v] 0 20 40 60 80 100 0.1 1 10 100 fr eq uency [khz] psrr [db] 0 100 200 300 400 0 0.1 0.2 0.3 0.4 0.5 io [a] icc [ a] 0 1 2 3 0 0.2 0.4 0.6 0.8 1 io [a] vo [ v] 0 1 2 3 4 012345 vcc [v] vo [v] 5.5 0.0 1.0 2.0 3.0 100 120 140 160 180 200 ta [] vo [ v] 0.3 0.4 0.5 0.6 - 25 0 25 50 75 ta [] vdr op [v] 85 0.01 0.10 1.00 10.00 0 0.2 0.4 0.6 0.8 1 io [a] esr [ ] safety area reference data fig.14 tsd (io=0ma) fig.15 ocp fig.13 vcc-vo (io=0ma) fig.20 minimum dropout voltage 2 (vcc=2.4v, ta=25 ) fig.19 psrr(io=0ma) fig.18 io-icc fig.16 minimum dropout voltage 1 (vcc=3.3v, io=-0.5a) fig.21 minimum dropout voltage 3 (vcc=3.3v, ta=25 ) fig.22 minimum dropout voltage 4 (vcc=5.0v, ta=25 ) fig.17 esr condencer
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 5/11 bd00ia5wefj heat dissipation characteristics htsop-j8 about input-to-output capacitor it is recommended that a capacitor is placed nearby pin between input pin and gnd, output pin and gnd. a capacitor, between input pin and gnd, is valid when the power supply impedance is high or drawing is long. also as for a capacitor, between output pin and gnd, the greater the capacity, more sustainable the line regulation and it makes improvement of characteristics by load change. however, please check by mounted on a boar d for the actual application. ceramic capacitor usually has difference, thermal characterist ics and series bias characteristics, and moreover capacity decreases gradually by using conditions. for more detail, please be sure to inquire the m anufacturer, and select the best ceramic capacitor. -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 0 1 2 3 4 dc bias voltage [v] 4 voltage resistance x6s characteristics 10 voltage resistance f characteristics 10 voltage resistance f characteristics ceramic capacitor capacity- dc bias characteristics (characteristics example) capacitance change [%] 6.3 voltage resistance b characteristics 10 voltage resistance b characteristics 10 voltage resistance b1 characteristics grm188b11a105ka61d measure condition: mounted on a rohm board, and ic substrate size: 70mm 70mm 1.6mm (substrate with thermal via) ? solder the substrate and package reverse exposure heat radiation part ic only j-a=249.5 /w 1-layer(copper foil are :0mm 0mm) j-a=153.2 /w 2-layer(copper foil are :15mm 15mm) j-a=113.6 /w 2-layer(copper foil are :70mm 70mm) j-a=59.2 /w 4-layer(copper foil are :70mm 70mm) j-a=33.3 /w 0.0 1.0 2.0 3.0 4.0 0 25 50 75 100 125 150 ambient temperature: ta [] power dissipation : pd [w] 3.76w 2.11w 1.10w 0.82w 0.50w
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 6/11 bd00ia5wefj stable area characteristics (characteristics example) heat loss thermal design should allow operation within the following condi tions. note that the temperat ures listed are the allowed temperature limits, and thermal design should allow sufficient margin from the limits. 1. ambient temperature ta can be no higher than 85 . 2. chip junction temperature (tj) can be no higher than 150 . chip junction temperature can be determined as follows: calculation based on ambient temperature (ta) tj=ta+ j-a w reference values j-a htsop-j8 153.2/w 113.6 /w 59.2 /w 33.3 /w 1-layer substrate (copper foil density 0mm 0mm) 2-layer substrate (copper foil density 15mm 15mm) 2-layer substrate (copper foil density 70mm 70mm) 4-layer substrate (copper foil density 70mm 70mm) substrate size: 70 70 1.6mm 3 (substrate with thermal via) most of the heat loss that occurs in t he bd00ia5wefj is generated from the output pch fet. power loss is determined by the total v cc -vo voltage and output current. be sure to confirm the sy stem input and output volt age and the output current conditions in relation to the heat di ssipation characteristics of the v in and vo in the design. bearing in mind that heat dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the bd00ia5wefj make certain to factor conditions such as substrate size into the thermal design. power consumption (w) = input voltage (vcc)- output voltage (vo) io(ave) example) where vcc=3.3v, vo=2.5v, io(ave) = 0.1a, power consumption (w) = 3.3(v)-2.5(v) 0.1(a) =0.08(w) about equivalent series resistance esr (ceramic capacitor etc.) capacitor usually has esr(equivalent series resistance), and operates stable in esr-out range, showed right. generally, esr of ceramic, tantalum and electronic capacitor etc. is different for each, so please be sure to check a capacitor which is going to use, and use it inside the stable range, showed right. then, please evaluate for the actual application 0.01 0.1 1 10 100 0 50 100 150 200 iout [ma] esr [ ? ] capacity-bias characteristics
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 7/11 bd00ia5wefj block diagram bd00ia5wefj pin number, pin name pin no. pin name pin function 1 vout output voltage pin 2 fb feedback pin 3 gnd gnd pin 4 n.c. non connection 5 en enable pin 6 n.c. non connection 7 n.c. non connection 8 vcc input voltage pin reverse fin substrate(gnd pin) gnd en tsd ocp soft ceramic capacitor vo v cc fb r 1 r 2 ceramic capacitor R 1f R 1f 0.8v 4.5v (vo+0.6) 5.5v
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 8/11 bd00ia5wefj evaluation board circuit evaluation board parts list designation value part no. company designation value part no. company r1 16k mcr01pzpzf1602 rohm c4 \ \ \ r2 7.5k mcr01pzpzf7501 rohm c5 1uf cm105b105k16a kyocera r3 \ \ \ c6 \ \ \ r4 \ \ \ c7 \ \ \ r5 \ \ \ c8 \ \ \ r6 \ \ \ c9 \ \ \ c1 1uf cm105b105k16a kyocera c10 \ \ \ c2 \ \ u1 \ bd00ia5wefj rohm c3 \ \ u2 \ \ \ about board layout ? input capacitor cin of vcc (vin) should be placed very close to vcc(vin) pin as possible, and used broad wiring pattern. output capacitor co also should be placed close to ic pin as possible. in case connected to inner layer gnd plane, please use several through hole. ? vfb pin has comparatively high impedance, and is apt to be effected by noise, so floating capacity should be minimum as possible. please be careful in wiring drawing ? please take gnd pattern space widely, and design layout to be able to increase radiation efficiency. ? for output voltage setting output voltage can be set by fb pin voltage(0.800v typ.)and external resistance r1, r2. (the use of resistors with r1+r2=5k to 90k is recommended) vo = v fb r 1 +r 2 r 2 n.c gnd fb n.c n.c. vout 2 vout c7 3 4 7 5 u1 8 c1 c2 c3 r1 r2 r6 u2 c8 r4 r3 c6 c5 c4 r5 gate c9 c10 1 vcc 6 en gnd sw1 en vo gnd vcc ( vi n) cin r1 r 2 co en
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 9/11 bd00ia5wefj bd00ia5wefj ta-ileak 0 0.1 0.2 0.3 0.4 0.5 25 50 75 100 125 150 temperature () ileak (ma) ttyp worst notes for use (1) absolute maximum ratings an excess in the absolute maximum ratings , such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify br eaking mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) connecting the power supply connector backward connecting of the power supply in reverse polarity can damage ic. take precautions when connecting the power supply lines. an external direction diode can be added. (3) power supply lines design pcb layout pattern to provide low impedance gnd and supply lines. to obtain a low noise ground and supply line, separate the ground section and supply lines of the digital a nd analog blocks. furthermore, for all power supply terminals to ics, connect a capacitor between the power supply and the gnd terminal. when applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. (4) gnd voltage the potential of gnd pin must be minimu m potential in all operating conditions. (5) thermal design use a thermal design that allows for a suffic ient margin in light of the power dissipa tion (pd) in actual operating conditions. (6) off leak in high temperature. off-leak in high temperature may increase because of manufacturing of ic diviation. design in cousideration with graph of typ, worst is shown below. (7) inter-pin shorts and mounting errors use caution when positioning the ic fo r mounting on printed circuit boards. t he ic may be damaged if there is any connection error or if pins are shorted together. (8) actions in strong electromagnetic field use caution when using the ic in the presence of a strong electr omagnetic field as doing so may cause the ic to malfunction. (9) aso when using the ic, set the output transistor so that it does not exceed absolute maximum ratings or aso. (10) thermal shutdown circuit the ic incorporates a built-in thermal shutdown circuit (tsd circuit). the thermal shutdown circuit (tsd circuit) is designed only to shut the ic off to prevent thermal runaway. it is not designed to protect the ic or guarantee its operation. do not continue to use the ic after operat ing this circuit or use the ic in an envir onment where the operation of this circuit is assumed. tsd on temperature[ ] (typ.) hysteresis temperature [ ] (typ.) bd00ia5wefj 175 15
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 10/11 bd00ia5wefj (11) testing on application boards when testing the ic on an application boar d, connecting a capacitor to a pin with low impedance subjects the ic to stress. a lways discharge capacitors after each process or step. always turn the ic?s power supply off before connecting it to or removing it from a jig or fixture during the inspection pr ocess. ground the ic during assembly steps as an antistatic measure. use similar precaution wh en transporting or storing the ic. (12) regarding input pin of the ic this monolithic ic contains p+ isolation and p substrate layers between adjacent el ements in order to keep them isolated. p-n junctions are formed at the intersection of these p layers wi th the n layers of other elem ents, creating a parasitic diode or transistor. for example, the relation between each potential is as follows: when gnd > pin a and gnd > pin b, the p-n j unction operates as a parasitic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes can occur inevitable in the structure of th e ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the gnd (p substrate) voltage to an input pin, should not be used. (13) ground wiring pattern. when using both small signal and large current gnd pattern s, it is recommended to isolate the two ground patterns, placing a single ground point at the gr ound potential of applicatio n so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external components, either. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element
www.rohm.com 2010.10 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 11/11 bd00ia5wefj ordering part number b d 0 0 i a 5 w e f j - e 2 rohm part number output voltage 00 : variable voltage resistance e :24v f :20v g :15v h :10v i :7v output cuurent a1:0.1a a3:0.3a a5:0.5a c0:1.0a c5:1.5a d0:2.0a shutdown switch ?w? built in ? ? none package efj htsop-j8 packaging specifications e2: emboss tape reel (unit : mm) htsop-j8 0.08 s 0.08 m s 1.0max 0.85 0.05 1.27 0.08 0.08 0.42 +0.05 - 0.04 1.05 0.2 0.65 0.15 4 + 6 ? 4 0.17 +0.05 - 0.03 234 5 6 8 (max 5.25 include burr) 7 1 0.545 (3.2) 4.9 0.1 6.0 0.2 (2.4) 3.9 0.1 1pin mark ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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