?2000 imp, inc. 408-432-9100/www.impweb.com 1 imp52 imp52 4 4 1/42 1/42 d ata c ommunications a dvance p roduct i nformation key features auto-selectable lvd or single-ended termination 3.0pf maximum disabled output capacitance fast response, no external capacitors required compatible with active negation drivers 15a supply current in disconnect mode logic command disconnects all termination lines diffsense line driver ground driver integrated for single-ended operation current limit and thermal protection hot-swap compatible (single-ended) compatible with scsi 1, 2, 3, fast-20, and the pending spi-2 lvd pin compatible with ds2118 and ucc5630 block diagram 9-line multimode l 9-line multimode l vd/se vd/se scsi t scsi t er er minat minat or or the imp5241/42 is a multimode scsi terminator that conforms to the scsi parallel interconnect-2 (spi-2) specification developed by the t10 standards committee for low voltage differential (lvd) termination, while providing backwards compatibility to the scsi, scsi-2, and spi single-ended specifications. multimode compatibility permits the use of legacy devices on the bus without hardware alterations. automatic mode selection is achieved through voltage detection on the diffsense line. the imp5241/42 delivers the ultimate in scsi bus performance while saving component cost and board area. elimination of the external capac- itors also mitigates the need for a lengthy capacitor selection process. the individual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. the high bandwidth architecture insures ultra2 performance while providing a clear migra- tion path to ultra3 and beyond. when the imp5241/42 is enabled, the differential sense (diffsense) pin supplies a voltage between 1.2v and 1.4v. in application, this pin is tied to the diffsense input of the corresponding lvd transceivers. this action enables the lvd transceiver function. diffsense is capable of supplying a maximum of 15ma. tying the diffsense pin high places the imp5241/42 in a high impedance state indicating the presence of an hvd device. tying the pin low places the part in a single-ended mode while also signaling the multimode transceiver to operate in a single- ended mode. recognizing the needs of portable and configurable peripherals, the imp5241/42 have a ttl compatible sleep/disable mode. during this sleep/disable mode, power dissipation is reduced to a meager 15 a while also placing all outputs in a high impedance state. also during sleep/disable mode, the diffsense function is disabled and is placed in a high impedance state. another key feature of the imp5241/42 is the master/slave function. driving this pin high or floating the pin enables the 1.3v diffsense reference. driving the pin low dis- ables the on board diffsense reference and enables use of an external master reference device. power on & mode delay internal v ref 1.30v lvd 1.25v 200 52.5 1.07ma 1.07ma 20 52.5 se 2.2v power on power on se 2.85v, 22.5ma latch se disc/hvd lvd se lvd(-) / se 1 of 9 lvd(+) / se (pseudo-gnd) se hvd lvd hvd diff b diffsense m/s disconnect (imp5241) disconnect (imp5242) v term lvd window comp. lvd se 10ma hvd 20k ? mode control & delay 5241/42_01.eps
imp52 imp52 4 4 1/42 1/42 2 408-432-9100/www.impweb.com ?2000 imp, inc. ordering information absolute maximum ratings 1 thermal data pin configuration 1 2 3 4 36 35 34 33 5 6 7 8 32 31 30 29 9 10 11 12 nc nc nc 1+ 1 2+ 2 heatsink heatsink heatsink 3+ 3 v term hvd lv d se 9 9+ 8 8+ heatsink heatsink heatsink 7 28 27 26 25 13 14 24 23 15 16 17 18 4+ 4 5+ 5 *disconnect *disconnect for imp5242 gnd 6 7+ 6+ diff b diffsense master/slave 22 21 20 19 5241/42_02.eps imp5241/42 db package termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . +7v operating junction temperature plastic (db, pw packages) . . . . . . . . . . . . . 150 c storage temperature range . . . . . . . . . . . . . . ?5 c to 150 c note: 1. exceeding these ratings could cause damage to the device. all voltages are with respect to ground. currents are positive into, negative out of the specified terminal. lead temperature (soldering, 10 sec.) . . . . . . 300 c db package: thermal resistance junction-to-ambient, ja . . . . . . 50 c/w pw package: thermal resistance junction-to-ambient, ja . . . . . . 100 c/w 1 2 3 4 24 23 22 21 5 6 7 8 20 19 18 17 9 10 11 12 1+ 1 2+ 2 3+ 3 4+ 4 5+ 5 *disconnect gnd v term nc 9 9+ 8 8+ 7 7+ 6 6+ diffsense master/slave 16 15 14 13 5241/42_03.eps imp5241/42 *disconnect for imp5242 dw package ssop-36 tssop-24 junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the thermal performance of the device/pc-board system. no ambient airflow is assumed. r e b m u n t r a pe g n a r e r u t a r e p m e te g a k c a p b d c 1 4 2 5 p m i0 0 7 o t c cp o s s c i t s a l p n i p - 6 3 b d c 2 4 2 5 p m i0 0 7 o t c cp o s s c i t s a l p n i p - 6 3 w p c 1 4 2 5 p m i0 0 7 o t c cp o s s t c i t s a l p n i p - 4 2 w p c 2 4 2 5 p m i0 0 7 o t c cp o s s t c i t s a l p n i p - 4 2 ) t b d c 1 4 2 5 p m i . e . i ( . r e b m u n t r a p o t t r e t t e l e h t d n e p p a , l e e r d n a e p a t r o f : e t o n s p e . 2 0 t _ 2 4 / 1 4 2 5
pin description imp52 imp52 4 4 1/42 1/42 ?2000 imp, inc. data communications 3 e m a n n i pn o i t c n u f - 9 , - 8 , - 7 , - 6 , - 5 , - 4 , - 3 , - 2 , - 1 . e d o m e s r o f s e n i l n o i t a n i m r e t l a n g i s . e d o m d v l r o f s e n i l n o i t a n i m r e t l a n g i s e v i t a g e n + 9 , + 8 , + 7 , + 6 , + 5 , + 4 , + 3 , + 2 , + 1 . e d o m e s r o f s e n i l d n u o r g - o d u e s p . e d o m d v l r o f s e n i l n o i t a n i m r e t l a n g i s e v i t i s o p v m r e t e n o y b d e l p u o c e d e b t s u m . r w p m r e t s u b i s c s o t t c e n n o c . r o t a n i m r e t r o f n i p y l p p u s r e w o p 7 . 4 o t y r a s s e c e n y l e t u l o s b a s i t i . s e c i v e d r o t a n i m r e t e e r h t y r e v e r o f r o t i c a p a c r s e - w o l f . ) b c p n o s e c a r t g i b ( e c n a d e p m i w o l y r e v a h g u o r h t r o t i c a p a c g n i l p u o c e d e h t o t n i p s i h t t c e n n o c v e h t o t s r o t i c a p a c g n i l p u o c e d e h t m o r f t r o h s y r e v s e c n a t s i d g n i p e e k m r e t . l a c i t i r c o s l a s i n i p s n o i t a c i l p p a e m o s d n a t n a d n e p e d t u o y a l t a h w e m o s s i r o t i c a p a c g n i l p u o c e d e h t f o e u l a v e h t 1 . 0 l a n o i t i d d a n a m o r f t i f e n e b y a m v e h t t a r o t i c a p a c g n i l p u o c e d f m r e t . n i p ) 1 4 2 5 p m i ( t c e n n o c s i d ) 2 4 2 5 p m i ( t c e n n o c s i d . s l e v e l c i g o l r o f 2 e l b a t e e s . r o t a n i m r e t s e l b a s i d / s e l b a n e d n g. d n u o r g o t t c e n n o c . n i p d n u o r g r o t a n i m r e t e v a l s / r e t s a m . e c i v e d g n i l l o r t n o c e h t s i r o t a n i m r e t h c i h w t c e l e s o t d e s u . n i p s / m s a o t d e r r e f e r s e m i t e m o s . 1 e l b a t e e s . e v i r d t u p t u o e s n e s f f i d e h t s e l b a n e n e p o r o h g i h n i p e v a l s / r e t s a m e s n e s f f i d o t n i p e s n e s e h t o s l a s i t i . e n i l s n e s f f i d s u b i s c s e h t s e v i r d t i . n i p n o i t c n u f l a u d a s i s i h t a h t i w d e l b a s i d e b n a c e v i r d t u p t u o e s n e s f f i d . ) d v h r o e s , d v l ( e d o m s u b i s c s e h t t c e t e d f f i d o t d e t c e n n o c y l l a n r e t n i . 2 e l b a t d n a 1 e l b a t e e s . n i p e v a l s / r e t s a m e h t n o l e v e l w o l k 0 2 h g u o r h t n i p b ? . r o t s i s e r b f f i d k 0 2 h g u o r h t n i p e s n e s f f i d o t d e t c e n n o c y l l a n r e t n i ? e s n e s e d o m a s a d e s u e b n a c t i . r o t s i s e r r e t l i f c r n a . ) w o l s i n i p e v a l s / r e t s a m ( r o t a n i m r e t g n i l l o r t n o c - n o n a s i e c i v e d e h t n e h w n i p k 0 2 ( ? 1 . 0 / . r e m i t l a n r e t n i n a s a h t i s a , 2 4 / 1 4 2 5 p m i e h t n o d e r i u q e r t o n s i ) f e s . e d o m e s n i g n i t a r e p o s i r o t a n i m r e t e h t , h g i h n e h w . t u p t u o d e d n e - e l g n i s d v l . e d o m d v l n i g n i t a r e p o s i r o t a n i m r e t e h t , h g i h n e h w . t u p t u o l a i t n e r e f f i d e g a t l o v w o l d v h . e d o m d v h n i g n i t a r e p o s i r o t a n i m r e t e h t , h g i h n e h w . t u p t u o l a i t n e r e f f i d e g a t l o v h g i h k n i s t a e h t a e h a d e r e d i s n o c e b d l u o h s s n i p . n i p d n g o t d e d n o b t o n t u b , d a p g n i t n u o m e i d o t d e h c a t t a o t d e t c e n n o c e b s n i p e s e h t t a h t d e d e n e m m o c e r s i t i . n o i t c e n n o c d n u o r g e u r t a t o n d n a , y l n o k n i s . g n i t a o l f t f e l e b n a c t u b , d n u o r g 3 t a . 8 0 t _ 2 4 / 1 4 2 5
imp52 imp52 4 4 1/42 1/42 4 408-432-9100/www.impweb.com ?2000 imp, inc. unless otherwise specified, these specifications apply over the operating ambient temperature range of 0 c t a 70 c. termpwr = 4.75v. disconnect: imp5241 = low, disconnect: imp5242 = high. low duty cycle pulse testing techniques are used which maintain junction and case temperatures equal to the ambient temperature. r e t e m a r a pl o b m y sn i mp y tx a ms t i n u e g a t l o v r w p m r e td v lv m r e t 0 . 35 2 . 5v e s5 . 35 2 . 5 e g a t l o v e n i l l a n g i s 00 . 5v e g a t l o v t u p n i t c e n n o c s i d 0v m r e t v c 2 4 2 5 / c 1 4 2 5 p m i e g n a r e r u t a r e p m e t n o i t c n u j l a u t r i v g n i t a r e p o 00 7 c . l a n o i t c n u f s i e c i v e d e h t h c i h w r e v o e g n a r . 2 : e t o n s p e . 3 0 t _ 2 4 / 1 4 2 5 r e t e m a r a pl o b m y sn o i t i d n o cn i mp y tx a ms t i n u n o i t c e s r o t a n i m r e t d v l t n e r r u c y l p p u s r w p m r e td v l c c i n e p o = s e n i l r o t a n i m r e t l l a5 20 3a m v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i5 15 3 a v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i e g a t l o v e d o m n o m m o cv m c 5 2 1 . 15 2 . 15 7 3 . 1v e g a t l o v t e s f f ov b s f ) 3 e t o n e e s ( + d n a n e e w t e b t i u c r i c n e p o0 0 12 1 15 2 1v m r o t a n i m r e t l a i t n e r e f f i de c n a d e p m iz d v t u o v 1 o t v 1 = l a i t n e r e f f i d0 0 15 0 10 1 1 ? e c n a d e p m i e d o m n o m m o cz m c v 5 . 2 o t v 00 0 10 0 20 0 3 ? e c n a t i c a p a c t u p t u oc o v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i5 . 2f p v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i e g a k a e l t u p t u oi k a e l v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i2 a v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i v e n i l t , v 4 o t v 0 = a 2 =5 c v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i1 v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i v m r e t v , v 0 = e n i l v 7 . 2 = y a l e d e g n a h c e d o mt f d v 0 o t v 4 . 1 = e s n e s f f i d5 1 1s m n o i t c e s e s n e s f f i d e g a t l o v t u p t u o e s n e s f f i dv f f i d 2 . 13 . 14 . 1v t n e r r u c e c r u o s t u p t u o e s n e s f f i di f f i d v f f i d v 0 =0 . 50 . 5 1a m t n e r r u c k n i s e s n e s f f i di ) f f i d ( k n i s v f f i d v 5 7 . 2 =0 0 2 a e g a k a e l t u p t u o e s n e s f f i di ) f f i d ( k a e l v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i0 1 a v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i t a 2 =5 c n o i t c e s r o t a n i m r e t d e d n e - e l g n i s t n e r r u c y l p p u s r w p m r e ti e s c c , n e p o = s e n i l r o t a n i m r e t l l ae v a l s / r e t s a mv 0 =70 1a m , v 2 . 0 = s e n i l r o t a n i m r e t l l ae v a l s / r e t s a mv 0 =4 1 26 2 2 v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i5 15 3 a v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i e g a t l o v h g i h t u p t u o r o t a n i m r e tv o 6 . 25 8 . 2v t n e r r u c t u p t u oi o v t u o v 2 . 0 =1 23 24 2a m . e g a t l o v e f a s l i a f t i u c r i c n e p o . 3 : e t o n s p e . 4 0 t _ 2 4 / 1 4 2 5 recommended operating conditions 2 electrical characteristics
imp52 imp52 4 4 1/42 1/42 ?2000 imp, inc. data communications 5 r e t e m a r a pl o b m y sn o i t i d n o cn i mp y tx a ms t i n u ) . t n o c ( n o i t c e s r o t a n i m r e t d e d n e - e l g n i s t n e r r u c k n i si k n i s v t u o s e n i l l l a , v 4 =5 45 6a m e c n a t i c a p a c t u p t u oc o v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i5 . 2f p v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i t n e r r u c e g a k a e li k a e l v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i2 a v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i v t u o t , v 4 o t v 0 = a 2 =5 c v 0 . 2 > t c e n n o c s i d : 1 4 2 5 p m i1 v 8 . 0 < t c e n n o c s i d : 2 4 2 5 p m i v m r e t v , v 0 = e n i l t , v 7 . 2 = a 2 =5 c e c n a d e p m i r e v i r d d n u o r gz g a m 1 = i0 0 1 ? n w o d t u h s l a m r e h t 0 5 1 c n o i t c e s t c e n n o c s i d s d l o h s e r h t t c e n n o c s i dv h t 8 . 00 . 2v t n e r r u c t u p n ii l i v 0 = t c e n n o c s i d : 1 4 2 5 p m i0 1 a i l i v 0 = t c e n n o c s i d : 2 4 2 5 p m i0 0 1 a n i h i v 4 . 2 = t c e n n o c s i d : 1 4 2 5 p m i0 0 1a n i h i v 4 . 2 = t c e n n o c s i d : 2 4 2 5 p m i0 1 a n o i t c e s e v a l s / r e t s a m s d l o h s e r h t e v a l s / r e t s a mv ) s m ( h t 8 . 00 . 2v t n e r r u c t u p n ii ) s m ( l i v 0 = e v a l s / r e t s a m0 1 a i ) s m ( l i v 4 . 2 = e v a l s / r e t s a m0 0 1a n 3 t a . 5 0 t _ 2 4 / 1 4 2 5 electrical characteristics
imp52 imp52 4 4 1/42 1/42 6 408-432-9100/www.impweb.com ?2000 imp, inc. imp5241 imp5241 5241/42_06.eps ++ figure 1. bus voltage figure 2. v od v (+) v ( ) v cm 5241/42_04.eps v od = v ( ) v (+) , logic = 0 negated 100mv 100mv 0v 5241/42_05.eps figure 3. e v a l s / r e t s a ms u t a t s e s n e s f f i dt n e r r u c t u p t u o * lz i ha m 0 hv 3 . 1e c r u o s a m 5 1 ) p u - l l u p ( n e p ov 3 . 1e c r u o s a m 5 1 . e t a t s e n i l e s n e s f f i d e h t t c e t e d l l i w r o t a n i m r e t e h t , e t a t s w o l e h t n i n e h w * 3 t a . 6 0 t _ 2 4 / 1 4 2 5 table 1. master/slave function table table 2. diffsense/power up/power down function table 1 4 2 5 p m i t c e n n o c s i d 2 4 2 5 p m i t c e n n o c s i de s n e s f f i d s t u p t u o t n e r r u c s u t a t se p y t lh v 5 . 0 < le l b a n ee sa m 7 lh v 9 . 1 o t v 7 . 0e l b a n ed v la m 1 2 lh v 4 . 2 > he l b a s i dz i ha m 1 hlxe l b a s i dz i h0 1 a n e p on e p oxe l b a s i dz i h0 1 a s p e . 7 0 t _ 2 4 / 1 4 2 5 application information
imp52 imp52 4 4 1/42 1/42 ?2000 imp, inc. data communications 7 + + 1 v term disconnect termpower disconnect m/s gnd 1+ 9 data lines (9) data lines (9) data lines (9) 9+ diffsense diff b* imp5241 imp5242 1 v term 4.7 f disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 1 v term disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 1 v term disconnect termpower disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 host peripheral 1 v term 4.7 f disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 1 v term disconnect m/s gnd 1+ 9 9+ diffsense diff b* * the diff b pin is not present on the imp5241/5242 24-pin pw package. the diffsens signal must be connected to the diffsense pin on the pw package. imp5241 imp5242 5241/42_07.eps figure 4. imp terminator application schematic application information
imp52 imp52 4 4 1/42 1/42 8 408-432-9100/www.impweb.com ?2000 imp, inc. application information 1 v term disconnect termpower disconnect m/s gnd nc* nc* pin 1 1+ 9 data lines (9) data lines (9) data lines (9) 9+ diffsense diff b* 20k imp5241 imp5242 1 v term 4.7 f disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 1 v term disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 1 v term disconnect termpower disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 host peripheral 1 v term 4.7 f disconnect m/s gnd 1+ 9 9+ diffsense diff b* imp5241 imp5242 1 v term disconnect m/s gnd 1+ 9 9+ diffsense diff b* * the capacitor on pin 1 can be placed on the IMP5241CDB, imp5242cdb to be pin compatible with other devices. this v reg /ref capacitor is not required with imp devices. imp5241 imp5242 5241/42_08.eps + + 4.7 f* + pin 1 4.7 f* + 0.1 f + 0.1 f + nc* pin 1 4.7 f* + nc* pin 1 4.7 f* + nc* pin 1 4.7 f* + nc* pin 1 4.7 f* + 20k figure 5. suggested imp5241/5242 universal application schematic (please reference manufacture s current data sheet to ensure compatibility)
imp52 imp52 4 4 1/42 1/42 ?2000 imp, inc. data communications 9 plastic (ssop) widebody soic (36-pin) s e h c n is r e t e m i l l i m n i mx a mn i mx a m ) n i p - 6 3 ( c i o s y d o b e d i w ) p o s s ( c i t s a l p a4 8 0 . 00 0 1 . 04 1 . 24 5 . 2 b1 1 0 . 00 2 0 . 09 2 . 01 5 . 0 c1 9 0 0 . 05 2 1 0 . 03 2 . 02 3 . 0 d8 9 5 . 06 0 6 . 00 2 . 5 10 4 . 5 1 e1 9 2 . 09 9 2 . 00 4 . 70 6 . 7 fc s b 1 3 0 . 0c s b 0 8 . 0 g4 0 0 . 02 1 0 . 00 1 . 00 3 . 0 h6 9 0 . 04 0 1 . 04 4 . 24 6 . 2 l6 1 0 . 00 5 0 . 00 4 . 07 2 . 1 m 0 8 0 8 p8 9 3 . 04 1 4 . 01 1 . 0 11 5 . 0 1 c l * 4 0 0 . 0 0 1 . 0 ) n i p - 4 2 ( ) p o s s t ( e n i l t u o k n i r h s l l a m s n i h t a2 3 0 .1 4 0 .0 8 . 05 0 . 1 b7 0 0 . 02 1 0 . 09 1 . 00 3 . 0 c5 3 0 0 . 09 7 0 0 . 09 0 . 00 2 . 0 d3 0 3 . 01 1 3 . 00 7 . 70 9 . 7 e9 6 1 . 06 7 1 . 00 3 . 45 . 4 fc s b 5 2 0 . 0c s b 5 6 . 0 g2 0 0 . 05 0 0 . 05 0 . 05 1 . 0 h 7 4 0 . 0 0 2 . 1 l7 1 0 . 00 3 0 . 05 4 . 05 7 . 0 m 0 8 0 8 p6 4 2 . 06 5 2 . 05 2 . 60 5 . 6 c l * 4 0 0 . 0 0 1 . 0 *. y t i r a n a l p o c d a e l s p e . 1 0 t _ 2 4 / 1 4 2 5 d e p f 36 19 18 1 b h g e m a l c 36-pin (ssop).eps seating plane 3 2 1 ep d seating plane b g a h f e l 24-pin (tssop).eps c m thin small shrink outline (tssop) (24-pin) pw db package dimensions
imp, inc. corporate headquarters 2830 n. first street san jose, ca 95134-2071 tel: 408-432-9100 tel: 800-438-3722 fax: 408-434-0335 e-mail: info@impinc.com http://www.impweb.com the imp logo is a registered trademark of imp, inc. all other company and product names are trademarks of their respective owners. ? 2000 imp, inc. printed in usa publication #: 7001 revision: b issue date: 07/31/00 type: product imp52 imp52 4 4 1/42 1/42
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