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  rev.1.00, aug.20.2004, page 1 of 6 bcr08as-12 triac low power use rej03g0292-0100 rev.1.00 aug.20.2004 features ? i t (rms) : 0.8 a ? v drm : 600 v ? i fgti , i rgti , i rgt : 5 ma ? i fgt : 10 ma ? non-insulated type ? planar passivation type outline 2, 4 1 3 1. t 1 terminal 2. t 2 terminal 3. gate terminal 4. t 2 terminal sot-89 2 1 3 4 applications hybrid ic, solid state relay, electric fan, washing m achine, and other general purpose control applications maximum ratings voltage class parameter symbol 12 (mark bf) unit repetitive peak off-state voltage note1 v drm 600 v non-repetitive peak off-state voltage note1 v dsm 720 v
bcr08as-12 rev.1.00, aug.20.2004, page 2 of 6 parameter symbol ratings unit conditions rms on-state current i t (rms) 0.8 a commercial frequency, sine full wave 360 conduction, ta = 40 c note3 surge on-state current i tsm 8 a 60hz sinewave 1 full cycle, peak value, non-repetitive i 2 t for fusing i 2 t0.26a 2 s value corresponding to 1 cycle of half wave 60hz, surge on-state current peak gate power dissipation p gm 1w average gate power dissipation p g (av) 0.1 w peak gate voltage v gm 10 v peak gate current i gm 1a junction temperature tj ? 40 to +125 c storage temperature tstg ? 40 to +125 c mass ? 48 mg typical value notes: 1. gate open. electrical characteristics parameter symbol min. typ. max. unit test conditions repetitive peak off-state current i drm ? ? 2.0 ma tj = 125 c, v drm applied on-state voltage v tm ? ? 2.0 v tc = 25 c, i tm = 1.2 a, instantaneous measurement v fgt ??2.0v ? v rgt ??2.0v ?? v rgt ?? ??2.0v gate trigger voltage note2 v v fgt ?? ??2.0v tj = 25 c, v d = 6 v, r l = 6 ? , r g = 330 ? i fgt ?? 5ma ? i rgt ?? 5ma ?? i rgt ?? ?? 5ma gate trigger current note2 v i fgt ?? ??10ma tj = 25 c, v d = 6 v, r l = 6 ? , r g = 330 ? gate non-trigger voltage v gd 0.1 ? ? v tj = 125 c, v d = 1/2 v drm thermal resistance r th (j-a) ??65 c/w junction to ambient note3 critical-rate of rise of off-state commutating voltage note4 (dv/dt)c 0.5 ? ? v/ s tj = 125 c notes: 2. measurement using the gate trigger characteristics measurement circuit. 3. soldering with ceramic plate (25 mm 25 mm t0.7 mm). 4. test conditions of the critical-rate of rise of off- state commutating voltage is shown in the table below. test conditions commutating voltage and current waveforms (inductive load) 1. junction temperature tj = 125 c 2. rate of decay of on -state commutating current (di/dt)c = ? 0.4 a/ms 3. peak off-state voltage v d = 400 v supply voltage time time time main current main voltage (di/dt)c v d (dv/dt)c
bcr08as-12 rev.1.00, aug.20.2004, page 3 of 6 performance curves maximum on-state characteristics on-state voltage (v) on-state current (a) rated surge on-state current conduction time (cycles at 60hz) surge on-state current (a) gate characteristics gate current (ma) gate voltage (v) gate trigger voltage vs. junction temperature junction temperature (c) gate trigger voltage (tj = tc) gate trigger voltage (tj = 25c) 100 (%) gate trigger current vs. junction temperature junction temperature (c) gate trigger current (tj = tc) gate trigger current (tj = 25c) 100 (%) maximum transient thermal impedance characteristics (junction to ambient) conduction time (cycles at 60hz) transient thermal impedance (c/w) 10 ? 1 10 1 7 5 3 2 012 10 0 7 5 3 2 345 4 4 10 0 2510 1 4 2 37 10 2 4 25 37 4 6 8 10 0 10 0 23 10 0 5710 1 23 5710 2 23 5710 3 10 2 7 5 3 2 10 1 7 5 3 2 7 5 3 2 10 ? 1 v gt 10 1 10 3 7 5 3 2 ?60 ?20 20 10 2 7 5 3 2 60 100 140 4 4 ?40 0 40 80 120 i v rgt v rgt iii i v fgt v fgt iii 10 1 10 3 7 5 3 2 ?60 ?20 20 10 2 7 5 3 2 60 100 140 4 4 ?40 0 40 80 120 10 1 23 10 ?1 5710 0 23 5710 1 23 5710 2 10 3 7 5 3 2 10 2 7 5 3 2 7 5 3 2 10 0 23 10 2 5710 3 23 5710 4 23 5710 5 junction to ambient * * 25mm 25mm t0.7mm ceramic plate tj = 25c tj = 125c typical example v gm = 10v i gm = 1a v gd = 0.2v i fgt i , i fgt iii i rgt i , i rgt iii p gm = 1w p g(av) = 0.1w i fgt i , i rgt iii , i rgt i i fgt iii typical example
bcr08as-12 rev.1.00, aug.20.2004, page 4 of 6 on-state power dissipation (w) rms on-state current (a) maximum on-state power dissipation rms on-state current (a) ambient temperature (c) allowable ambient temperature vs. rms on-state current junction temperature (c) repetitive peak off-state current (tj = tc) repetitive peak off-state current (tj = 25c) 100 (%) repetitive peak off-state current vs. junction temperature holding current vs. junction temperature junction temperature (c) holding current (tj = tc) holding current (tj = 25c) 100 (%) latching current (ma) latching current vs. junction temperature junction temperature (c) 2.0 1.6 1.2 0.8 0.4 0 2.0 0 0.4 0.8 1.2 1.6 160 120 100 60 20 0 1.6 00.2 0.6 1.0 1.4 40 80 140 0.4 0.8 1.2 10 3 7 5 3 2 10 2 7 5 3 2 10 1 160 100 80 40 20 0 140 40 ?40 ?60 ?20 0 20 60 80 140 100120 60 120 140 40 ?40 ? 60 ?20 0 20 60 80 100 120 10 5 7 5 3 2 10 4 7 5 3 2 10 3 7 5 3 2 10 2 140 40 ?40 ?60 ?20 0 20 60 80 100 120 160 ? 40 0 40 80 120 10 2 7 5 3 2 10 1 7 5 3 2 10 0 7 5 3 2 10 ? 1 typical example typical example distribution breakover voltage vs. junction temperature junction temperature (c) breakover voltage (tj = tc) breakover voltage (tj = 25c) 100 (%) 360 conduction resistive, inductive loads curves apply regardless of conduction angle resistive, inductive loads natural convection typical example t 2 + , g ? typical example t 2 + , g + t 2 ? , g ? t 2 ? , g + typical example ? ? ? 25mm 25mm t0.7mm ceramic plate
bcr08as-12 rev.1.00, aug.20.2004, page 5 of 6 rate of rise of off-state voltage (v/ s) breakover voltage (dv/dt = xv/ s) breakover voltage (dv/dt = 1v/ s) 100 (%) breakover voltage vs. rate of rise of off-state voltage commutation characteristics critical rate of rise of off-state commutating voltage (v/ s) rate of decay of on-state commutating current (a/ms) gate trigger current (tw) gate trigger current (dc) 100 (%) gate current pulse width ( s) gate trigger current vs. gate current pulse width test procedure i test procedure iii test procedure iv test procedure ii gate trigger characteristics test circuits 23 10 0 5710 1 23 5710 2 23 5710 3 120 0 20 40 60 80 100 140 160 10 ?1 23 5710 0 10 0 7 5 3 2 23 5710 1 10 1 7 5 3 2 10 ?1 10 1 10 3 7 5 3 2 10 0 2510 1 10 2 7 5 3 2 37 10 2 4 4 425 37 4 6 ? 6 ? 6 ? 6 ? 6v 6v 6v 6v 330 ? 330 ? 330 ? 330 ? a v a v a v a v typical example tj = 125c i quadrant iii quadrant minimum characteristics value i quadrant iii quadrant typical example tj = 125c i t = 1a = 500 s v d = 200v typical example i fgt i i fgt iii i rgt i i rgt iii
bcr08as-12 rev.1.00, aug.20.2004, page 6 of 6 package dimensions sot-89 eiaj package code jedec code mass (g) (reference value) lead material ? 0.048 cu alloy conforms symbol dimension in millimeters min typ max a a 1 a 2 b d e e x y 1 y zd ze 4.4 0.1 0.4 0.1 1.6 0.2 3.9 0.3 2.5 0.1 0.8 min 1.5 0.1 3.0 0.4 0.05 1.5 0.1 0.5 0.1 note 1) the dimensional figures indicate representative values unless otherwise the tolerance is specified. order code lead form standard packing quantity standard order code standard order code example surface-mounted type stick 25 type name +a bcr08as-12a surface-mounted type taping 3000 type name +a ?t +direction (1 or 2)+3 bcr08AS-12A-T13 note : please confirm the specificat ion about the shipping in detail.
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is a lways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme nt of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn ology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi als. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 200 4. re nesas technology corp ., all rights reser v ed. printed in ja pan. colophon .1.0


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