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LD7591 04/30/2009 1 leadtrend technology corporation LD7591-ds-p03 apr. 2009 transition-mode pfc controller wi th fault condition protection datasheet. p03 (for internal use only) general description the LD7591 is a voltage mode pfc controller operating on transition mode, integrated several functions of protection, such as ovp, ocp, and brow n-in protection. it minimizes the components counts and is available in a sop-8 or dip-8 package. those make it an ideal design for low cost applications. it provides functions of low startup current, over voltage protection, open feedba ck protection, disable function, over current protection, under voltag e lockout and integrated leb of the current sensing. also, the LD7591 features without mains voltage sensing compared with traditional current mode pfc for power saving. the LD7591 can be disabled if the inv pin voltage is lower than 0.45v and the operating current decreases to 65 a . typical application for boost pfc features z transition mode of pfc pre-regulator z voltage mode control z programmable max. on-time z low startup current (<30 a) z uvlo (under voltage lockout) z leb (leading-edge blanking) on cs pin z open-feedback protection and disable function z ovp (over voltage protection) z ocp (cycle by cycle current limiting) z 800/-1200ma driving capability z internal otp function applications z output above 65w adaptor. z open frame switching power supply z lcd tv power supply z led power supply patent pending ac inpu t 8 5 3 7 4 6 emi filter 1 2 http:///
LD7591 2 leadtrend technology corporation LD7591-ds-p03 apr. 2009 typical application for led (flyback pfc) a c i n p u t 8 5 3 7 4 6 1 2 emi filter http:///
LD7591 3 leadtrend technology corporation LD7591-ds-p03 apr. 2009 pin configuration (top view) inv comp ramp cs vcc out gnd zcd ordering information part number package top mark shipping LD7591 gs sop-8 green package LD7591gs 3600/ tube/ carton LD7591 gn dip-8 green package LD7591gn 3000/ tube/ carton pin descriptions name pin (sop-8/dip-8) function inv 1 output voltage feed back control comp 2 output of the error amplifier for vo ltage loop compensation to achieve stable ramp 3 ramp generator, connecting a resistor to gnd pin to set the saw tooth signal cs 4 current sense pin, connect to sense the mosfet current for ocp zcd 5 detecting zero crossing of input signal gnd 6 ground out 7 gate drive output to drive the external mosfet vcc 8 power source vcc pin recommended operating conditions item min. max. unit vcc pin capacitor 22 47 f comp pin capacitor 0.1 0.47 f ramp pin resistor 4.7k 100k http:///
LD7591 4 leadtrend technology corporation LD7591-ds-p03 apr. 2009 block diagram http:///
LD7591 5 leadtrend technology corporation LD7591-ds-p03 apr. 2009 absolute maximum ratings supply voltage vcc 30v out -0.3 ~vcc comp, inv, cs, ramp, zcd -0.3 ~7v maximum junction temperature 150 c operating junction temperature range -40 c to 125 c operating ambient temperature range -40 c to 85 c storage temperature range -65 c to 150 c package thermal resistance (so-8, ja ) 155 c/w package thermal resistance (dip-8, ja ) 100 c/w power dissipation (sot-8, at ambient temperature = 85 c) 420mw power dissipation (dip-8, at ambient temperature = 85 c) 650mw lead temperature (soldering, 10sec) 260 c esd voltage protection, human body model 2.5 kv esd voltage protection, machine model 250 v gate output current 800ma/-1200ma caution: stresses beyond the ratings specified in ?absolute maximum r atings? may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this s pecification is not implied. http:///
LD7591 6 leadtrend technology corporation LD7591-ds-p03 apr. 2009 electrical characteristics (v cc =14.0v, t a = 25 o c unless otherwise specified.) parameter conditions min typ max units supply voltage (vcc pin) startup current vcc LD7591 7 leadtrend technology corporation LD7591-ds-p03 apr. 2009 parameter conditions min typ max units maximum on-time, ton-max (ramp pin) maximum on time voltage rramp=40.5k 2.784 2.900v 3.016 v maximum on time programming rramp=40.5k 19 24 33 s maximum on time rramp R 100k 40 s minimum off-time minimum off-time 1 s minimum off-time programming 0.10 ton-max gate drive output (out pin) output low level v cc =12v, isink=20ma 0.5 v output high level v cc =12v, isource=20ma 9 12 v output high clamp level v cc =18v 11.5 13 14.5 v rising time vcc=12v, cl=1000pf 75 150 ns falling time vcc=12v, cl=1000pf 25 100 ns starter start timer period 50 150 300 s otp (over temp. protection) otp trip level 140 c otp hysteresis 30 c http:///
LD7591 8 leadtrend technology corporation LD7591-ds-p03 apr. 2009 typical performance characteristics uvlo (on) (v) fig. 1 uvlo (on) vs. temperature temperature ( c) 11 .0 11 .5 12.0 12.5 13.0 13.5 -40 0 40 80 120 125 uvlo (off) (v) temperature ( c) fig. 2 uvlo (off ) vs. temperature 7.5 8.5 9.0 10 8.0 -40 0 40 80 120 125 9 . 5 istartup ( a) temperature ( c) fig. 3 startup current vs. temperature -40 0 40 80 120 1 2 5 2 0 2 2 2 4 2 6 2 8 1 8 30 vcc ovp ( v) temperature ( c) fig. 4 vcc ovp vs. temperature 10 15 20 25 30 35 -40 0 40 80 120 125 vref (v) temperature ( c) fig. 5 vref vs. temperature 2.44 2.46 2.48 2.50 2.52 2.54 -40 0 40 80 120 125 inv ovp ( v) temperature ( c) fig. 6 inv ovp vs. temperature 2.5 2.55 2.6 2.6 5 2.7 2.75 -40 0 40 80 120 125 http:///
LD7591 9 leadtrend technology corporation LD7591-ds-p03 apr. 2009 ena ble voltage (v) temperature ( c) fig. 7 enable voltage vs. temperature 0.3 0.3 5 0.4 0.45 0 . 5 0.55 -40 0 40 80 120 125 v cs (off) (v) te m p e r a t u r e ( c) fig. 8 v cs (off) vs. temperature 0.78 0.79 0.80 0.81 0.82 0.83 -40 0 40 80 120 125 ma ximum on -time voltage ( v) temperature ( c) fig. 9 maximum on-time voltage vs. temperature 2.86 2.88 2.9 2.92 2 .94 2.96 -40 0 40 80 120 125 maximum on-time ( s) temperature ( c) fig. 10 maximum on-time vs. temperature -40 0 40 80 120 125 22 23 24 25 26 21 star t timer period ( s) temperature ( c) fig. 11 start timer period vs. temperature 140 145 15 0 15 5 160 16 5 -40 0 40 80 120 125 http:///
LD7591 10 leadtrend technology corporation LD7591-ds-p03 apr. 2009 application information operation overview the LD7591 is an excellent voltage mode pfc controller. it meets the iec61000-3-2 requirement and is intended for the use in those pre-regulator that demand low power harmonics distortion. it integr ated more functions to reduce the external components counts and the size. its major features are described as below. under voltage lockout (uvlo) an uvlo comparator is implemented in it to detect the voltage on the vcc pin. it would assure the supply voltage enough to turn on the LD7591 pfc controllers and further to drive the power mosfet. as shown in fig. 12, a hysteresis is built in to prevent the shutdown from the voltage dip during start up. the turn-on and turn-off threshold level are set at 12.0v and 8.5v, respectively. vcc uvlo(on) uvlo(off) t t i(vcc) startup current (~ua) operating current (~ ma) fig. 12 startup current and startup circuit the typical startup circuit to generate the LD7591 vcc is shown in fig. 13. during the startup transient, the vcc is lower than the uvlo threshold thus there is no gate pulse produced from LD7591 to drive power mosfet. therefore, the current through r1 will provide the startup current and to charge the capacitor c1. whenever the vcc voltage is high enough to turn on the LD7591 and further to deliver the gate drive signal, the supply current is provided from the auxiliary winding of th e pfc choke. lower startup current requirement on the pfc controller will help to increase the value of r1 and then reduce the power consumption on r1. by using cmos process and the special circuit design, the maximum startup current of LD7591 is only 30 a. if a higher resistance value of r1 is chosen, it usually takes more time to start up. to carefully select the value of r1 and c1 will optimize the power consumption and startup time. fig. 13 output voltage setting the LD7591 monitors the output voltage signal at inv pin through a resistor divider pair ra and rb. a transconductance amplifier is used instead of the conventional voltage amplif ier. the transconductance amplifier (voltage controlled current source) aids the implementation of ovp and di sable function. the output current of the amplifier chan ges according to the voltage difference of the inverting an d non-inverting input of the amplifier. the output voltage of the amplifier is compared with the internal ramp signal to generate the turn-off signal. the output voltage is determined by the following relationship. ) 1 ( 5 . 2 r b ra v v out + = where ra and rb are top and bottom feedback resistor values (as shown in the figure 14). fig. 14 http:///
LD7591 11 leadtrend technology corporation LD7591-ds-p03 apr. 2009 ovp and disable on inv pin to prevent the over voltage on the output capacitor from the fault condition, LD7591 is implemented with an ovp function on inv pin. whenever the inv voltage is higher than the ovp threshold voltage 2.675v, the output gate drive circuit will be shutdown simultaneously thus to stop the switching of the power mosfet until the inv pin down to 2.5v. the ovp function in LD7591 is an auto-recovery type protection. the figure 15 shows its operation. on the other hand, if the ovp condition is removed, the vcc level will get back to normal level and the output will automatically return to the normal operation. the disable comparator disables the operation of the LD7591 when the voltage of the inverting input is lower than 0.35v and there is 100mv hysteresis. an external small signal mosfet can be used to disable the ic, referring to figure 14. the ic operating current decreases below 65 a to reduce power consumption if the ic is disabled. fig. 15 zero current detection (zcd) figure 16 shows typical zcd-block. the zero current detection block switches on the external mosfet as the current through the boost inductor has gone to zero using an auxiliary winding coupled with the inductor. this feature allows transition-mode operation. if the voltage of the zcd pin goes higher than 0.2v, the zcd comparator waits until the voltage goes below 0.1v. if the voltage goes below 0.1v, the zero current detector turns on the mosfet. the zcd pin is protected internally by two clamps, 6.7v-high clamp and -0.7v-low clamp. the 150us timer generates a mosfet turn on signal if the driver output has been low for more than 150us from the falling edge of the driver output. fig. 16 figure 17 shows typical zcd-related waveforms. because the zcd pin has some capacitance, there can be some delay caused by rz1 and the turn-on time can be delayed. ideally, the switch must be turned on when the inductor current reaches zero; but because of the structure of the zcd delay, it is turned on after some delay time. during this delay time, the stored charge of the coss (mosfet output capacitor) is discharged through the path indicated in figure18. this charge is transferred into a small filter capacitor, cin1, which is connected to the bridge diode. therefore, there is no current flow from the input side, meaning the input current i in is zero during this period. in order to reduce the negative current flowing the internal diode, the resistance of r z1 is suggested larger than 47k . i peak t zero i neg t on t dis inductor current aux voltage v ds 0a 0v 0v -n v in delay time -n (v out ? v in ) v out minimum voltage turn-on out comp ramp zcd voltage 0.1v -n (v out ? v in )ra/(ra+rb) -0.7v-clamp fig. 17 http:///
LD7591 12 leadtrend technology corporation LD7591-ds-p03 apr. 2009 fig. 18 ramp generator block the output of the gm error am plifier and the output of the ramp generator block are compared to determine the mosfet on time, as shown in figure 19. the slope of the ramp is determined by an external resistor connected to the ramp pin. the voltage of the ramp pin is 2.9v and the slope is proportional to the cu rrent flowing out of the ramp pin. the internal ramp signal has a 1v offset; therefore, the drive output is shut down if the voltage of the comp pin is lower than 1v. the programmed on-time is maximum when the comp pin is open. the comp pin open voltage is about 5.4~6.6v. according to the slope of the internal ramp, the maximum on-time can be programmed. the necessary maximum on-time depends on the boost inductor, lowest ac line voltage, and maximum output power. the resistor value should be designed properly. the maximum on-time can be obtained from below 9 ) ( 10 58 . 1 ? = ? ramp max time on r t fig. 19 output drive stage an output stage of a cmos buffer, with typical 800ma/-1200ma driving capability, is incorporated to drive a power mosfet directly. the output voltage is clamped at 13v to protect the mosfet gate even when the vcc voltage is higher than 13v. current sensing and leading-edge blanking the typical voltage mode of pfc controller feedbacks the voltage signal to close the control loop and achieve regulation. the LD7591 detects the primary mosfet current from the cs pin, which is for the pulse-by-pulse current limit. the maximum volt age threshold of the current sensing pin is set at 0.8v. from above, the mosfet peak current can be obtained from below. s max peak r v i 8 . 0 ) ( = a 350ns leading-edge blanking (leb) time is included in the input of cs pin to preven t the false-trigger from the current spike. in the low power application, if the total pulse width of the turn-on spikes is less than 350ns and the negative spike on the cs pin doesn?t exceed -0.3v, it could eliminated the r-c filter. however, the total pulse width of the turn-on spike is decided by the output power, circuit design and pcb layout. it is strongly recommended to ado pt a smaller r-c filter for higher power application to avoid the cs pin being damaged by the negative turn-on spike. fig. 20 fault protection there are several critical protec tions were integrated in the LD7591 to prevent the power supply or adapter had being damaged. those damages usually come from open or short condition on the pins of LD7591. under the conditions listed below, the gate output will turn off immediately to protec t the power circuit --- 1. ramp pin short to ground 2. ramp pin floating 3. cs pin floating http:///
13 leadtrend technology corporation LD7591-ds-p03 apr. 2009 reference application ci rcuit --- 400v/100w (90~264v ac ) http:///
14 leadtrend technology corporation LD7591-ds-p03 apr. 2009 bom p/n component value fuse 250v,t2a ntc 3a,5 r1 24 k , 0805 r2 620 k , 0805 r3 330 k , 1206 r3b 330 k , 1206 r4 270 , 1206 r5 110 k , 0805 r6 24 , 0805 r61 24 , 0805 r7 0.18 1/2w r8 10 k , 0805 r9 22 k , 1206 r10 2 m , 1206 r10b 2 m , 1206 r11 27 k , 0805 r12 360 k , 0805 r13 1 m , 1206 r14 1 m , 1206 r15 1 m , 1206 rz2 11 k , 0805 rz3 0 , 0805 rb4 200 , 0805 p/n component value note c1 0.1 f ,x-cap c2 0.22 f ,x-cap c3 2200pf,y1-cap c4 2200pf,y1-cap cy1 nc c5 0.47 f,400v mpf c5b 0.47 f,400v mpf c6 33 f, 50v electrolytic capacitor c61 100nf, 25v ,0805 c7 100nf, 50v, 0805 c8 220nf, 25v, 0805 c9 100 f, 450v electrolytic capacitor c91 1000pf, 1kv, 1206 c10 10nf, 100v, 1206 c11 nc c12 100pf/ 16v, 0805 c13 330pf/ 1kv/1206 c14 100pf/ 1kv/1206 cb2 100pf/16v, 0805 d1 ll4148 sod-80 d2 er206 600v/ 2a, do-15 d3 ll4148 sod-80 db uf206g 600v/2a, do-15 zd1 glz18c, 18v zener sod-80 bd sbu4j or gbu4j 600v/4a l1 leadtrend?s design lf1 leadtrend?s design lf2 leadtrend?s design q1 fqp13n50c 500v, 13a, to-220 ic1 LD7591 sop-8 v1 nc varistor t1 400uh ei30, 44/6 http:///
15 leadtrend technology corporation LD7591-ds-p03 apr. 2009 reference applicatio n circuit --- led -42v/350ma (90~264v ac ) ac input 8 5 3 7 4 6 1 2 http:///
16 leadtrend technology corporation LD7591-ds-p03 apr. 2009 bom p/n component value fuse 2a/250v ntc 0 , 1206 r1 18 k , 0805 r2 240 k , 0805 r3 300k , 1206 r3b 300k , 1206 r4 200 , 1206 r5 200 k , 0805 r6 51 , 0805 r61 10 , 0805 r7 0.6 1/2w r8 1 k , 0805 r9 22k , 1206 r10 1k , 0805 r10b 22k , 0805 r11 4.7k , 0805 r12 3.3 , 2w r12b nc,1206 r13 nc, 1206 r14 1 k , 0805 r15 7.5meg , 0805 d4 600 k , 0805 r16 100k , 1206 r17 100k , 1206 rb4 220 , 0805 rz2 22 k , 0805 rz3 0 , 0805 p/n component value note c1 0.1 f / 275vac x-cap c2 20nf/1kv,1206 c5 0.1 f / 400v mpf z c6 33uf/ 25v electrolytic capacitor c61 104pf/25v/0805 c7 nc uf/ 16v, 0805 c8 0.68uf/ 16v, 0805 c9 330 f, 50v electrolytic capacitor c9a 330 f, 50v electrolytic capacitor c10 0 , 1206 c11 nc c12 10pf, 0805 c13 nc c14 0.1 f/ 16v, 0805 cb2 220pf/16v, 0805 d1 ll4148 sod-80 d2 er502 200v/ 5a, d3 ll4148 sod-80 d5 ps106r 600v/1a zd1 nc dz1 zener, 43v 500mw dz2 0 , 0805 dz3 p6ke200a do-15 dz4 zener, 24v bd di106 600v/1a t1 ef20, 1000uh 106/32/13 lf1 uu9.8 lf2 0 q1 fqpf5n60c 600v, 4.5a, to-220 ic1 LD7591 sop-8 ic2 pc817 tl432 ahk432 http:///
17 leadtrend technology corporation LD7591-ds-p03 apr. 2009 package information sop-8 dimensions in millimeters dimensions in inch symbols min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.178 0.229 0.007 0.009 i 0.102 0.254 0.004 0.010 j 5.791 6.198 0.228 0.244 m 0.406 1.270 0.016 0.050 0 8 0 8 http:///
18 leadtrend technology corporation LD7591-ds-p03 apr. 2009 package information dip-8 dimension in millimeters dimensions in inches symbol min max min max a 9.017 10.160 0.355 0.400 b 6.096 7.112 0.240 0.280 c ----- 5.334 ------ 0.210 d 0.356 0.584 0.014 0.023 e 1.143 1.778 0.045 0.070 f 2.337 2.743 0.092 0.108 i 2.921 3.556 0.115 0.140 j 7.366 8.255 0.29 0.325 l 0.381 ------ 0.015 -------- important notice leadtrend technology corp. reserves the right to make changes or corrections to its products at any time without notice. custom ers should verify the datasheets are current and complete before placing order. http:///
19 leadtrend technology corporation LD7591-ds-p03 apr. 2009 revision history rev. date change notice 01 03/31/2009 preliminary specification 02 04/14/2009 reverse ton-max 03 04/30/2009 ramp pin resistor, bom http:///

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