Part Number Hot Search : 
LC78684E STD5KB36 HCF40 UDN298 DZ15B LM293DT UM2362S MAS8340
Product Description
Full Text Search
 

To Download AMP02AZ883C Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002. all rights reserved. amp02 high accuracy instrumentation amplifier functional block diagram general description the amp02 is the first precision instrumentation amplifier available in an 8-lead package. gain of the amp02 is set by a sin gle external resistor and can range from 1 to 10,000. no gain set resistor is required for unity gain. the amp02 includes an input protection network that allows the inputs to be taken 60 v beyond either supply rail without damaging the device. laser t rimming reduces the input offset v oltage to under 100 v. output offset voltage is below 4 mv, and gain accuracy is better than 0.5% for a gain of 1000. adi? proprietary thin-film resis- tor process ke eps the gain temperature coefficient under 50 ppm/ c. due to the amp02? design, its bandwidth remains very high over a wide range of gain. slew rate is over 4 v/ s, making the amp02 ideal for fast data acquisition systems. a reference pin is provided to allow the output to be referenced to an external dc level. this pin may be used for offset correc- tion or level shifting as required. in the 8-lead package, sense is internally connected to the output. for an instrumentation amplifier with the highest precision, consult the amp01 data sheet. features low offset voltage: 100  v max low drift: 2  v/  c max wide gain range: 1 to 10,000 high common-mode rejection: 115 db min high bandwidth (g = 1000): 200 khz typ gain equation accuracy: 0.5% max single resistor gain set input overvoltage protection low cost available in die form applications differential amplifier strain gage amplifier thermocouple amplifier rtd amplifier programmable gain instrumentation amplifier medical instrumentation data acquisition systems 8-lead pdip and cerdip 1 rg 1 2 3 4 ?n +in v 8 7 6 5 rg 2 v+ out reference 16-lead soic 1 nc 2 3 4 rg 1 nc ?n 5 +in 6 7 8 nc v nc 16 15 14 13 12 11 10 9 nc = no connect nc rg 2 nc v+ sense out reference nc + rg 1 rg 2 r g 3 1 8 2 +in ?n v+ v 4 5 6 7 out reference g = = + 1 v out (+in) ?(?n) 50k  r g () for sol connect sense to output figure 1. basic circuit connections
rev. e e2e amp02especifications amp02e amp02f parameter symbol conditions min typ max min typ max unit offset voltage input offset voltage v ios t a = 25 c20 100 40 200 v e40 c  t a  +85 c50 200 100 350 v input offset voltage drift tcv ios e40 c  t a  +85 c 0.5 2 1 4 v/ c output offset voltage v oos t a = 25 c1428mv e40 c  t a  +85 c410920mv output offset voltage drift tcv oos e40 c  t a  +85 c50 100 100 200 v/ c power supply rejection psr v s = 4.8 v to 18 v g = 100, 1000 115 125 110 115 db g = 10 100 110 95 100 db g = 1 80 90 75 80 db v s = 4.8 v to 18 v e40 c  t a  +85 c g = 1000, 100 110 120 105 110 db g = 10 95 110 90 95 db g = 1 75 90 70 75 db input current input bias current i b t a = 25 c210420na input bias current drift tci b e40 c  t a  +85 c 150 250 pa/ c input offset current i os t a = 25 c 1.2 5 2 10 na input offset current drift tci os e40 c  t a  +85 c9 15 pa/ c input input resistance r in differential, g  1000 10 10 g  common mode, g = 1000 16.5 16.5 g  input voltage range ivr t a = 25 c 1 11 11 v common-mode rejection cmr v cm = 11 v g = 1000, 100 115 120 110 115 db g = 10 100 115 95 110 db g = 1 80 95 75 90 db v cm = 11 v e40 c  t a  +85 c g = 100, 1000 110 120 105 115 db g = 10 95 110 90 105 db g = 1 75 90 70 85 db gain gain equation g = 1000 0.50 0.70 % accuracy g = 50 k  +1 g = 100 0.30 0.50 % r g g = 10 0.25 0.40 % g = 1 0.02 0.05 % gain range g 1 10k 1 10k v/v nonlinearity g = 1 to 1000 0.006 0.006 % temperature coefficient g tc 1  g  1000 2, 3 20 50 20 50 ppm/ c output rating output voltage swing v out t a = 25 c, r l = 1 k  12 13 12 13 v r l = 1 k  , e40 c  t a  +85 c 11 12 11 12 v positive current limit output-to-ground short 22 22 ma negative current limit output-to-ground short 32 32 ma noise voltage density, rti e n f o = 1 khz g = 1000 9 9 nv/  hz hz hz hz hz hz hzhz hz hz hz h
rev. e amp02 e3e amp02e amp02f parameter symbol conditions min typ max min typ max unit power supply supply voltage range v s 4.5 18 4.5 18 v supply current i sy t a = 25 c5656ma e40 c  t a  +85 c5656ma notes 1 input voltage range guaranteed by common-mode rejection test. 2 guaranteed by design. 3 gain tempco does not include the effects of external component drift. specifications subject to change without notice. absolute maximum ratings 1, 2 supply voltage 18 v common-mode input voltage [(ve) e 60 v] to [(v+) + 60 v] differential input voltage [(ve) e 60 v] to [(v+) + 60 v] output short-circuit duration continuous operating temperature range e40 c to +85 c storage temperature range e65 c to +150 c function temperature range e65 c to +150 c lead temperature (soldering, 10 sec) 300 c package type  ja 3  jc unit 8-lead plastic dip (p) 96 37 c/w 16-lead soic (s) 92 27 c/w ein +in r g1 r g2 25k  25k  25k  25k  v+ sense out reference ve figure 2. simplified schematic ordering guide v ios max @ v oos max @ temperature package model t a = 25  ct a = 25  c range description amp02ep 100 v4 mv e40 c to +85 c 8-lead plastic dip amp02fp 200 v8 mv e40 c to +85 c 8-lead plastic dip amp02az/883c 200 v 10 mv e55 c to +125 c 8-lead cerdip amp02fs 200 v8 mv e40 c to +85 c 16-lead soic amp02gbc die amp02fs-reel 200 v8 mv e40 c to +85 c 16-lead soic notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. 3  ja is specified for worst case mounting conditions, i.e.,  ja is specified for device in socket for p-dip package;  ja is specified for device soldered to printed circuit board for soic package.
rev. e e4e amp02 1. rg 1 2. ein 3. +in 4. ve 5. reference 6. out 7. v+ 8. rg 2 9. sense connect substrate to ve 8 1 die size 0.103 inch  0.116 inch, 11,948 sq. mils (2.62 mm  2.95 mm, 7.73 sq. mm) note: pins 1 and 8 are kelvin connected die characteristics w afer test limits * (@ v s =  15 v, v cm = 0 v, t a = 25  c, unless otherwise noted.) amp02 gbc parameter symbol conditions limits unit input offset voltage v ios 200 v max output offset voltage v oos 8 mv max v s = 4.8 v to 18 v g = 1000 110 power supply psr g = 100 110 db rejection g = 10 95 g = 1 75 input bias current i b 20 na max input offset current i os 10 na max input voltage range ivr guaranteed by cmr tests 11 v min v cm = 11 v g = 1000 110 common-mode cmr g = 100 110 db rejection g = 10 95 g = 1 75 gain equation accuracy g = 50 k  r g + 1, g = 1000 0.7 % max output voltage swing v out r l = 1 k  12 v min supply current i sy 6 ma max * electrical tests are performed at wafer probe to the limits shown. due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. consult factory to negotiate specifications based on dice lot qualifications through samp le lot assembly and testing. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the amp02 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
rev. e t ypical performance characteristicseamp02 e5e input offset voltage e  v number of units 1100 e100 e80 e60 e40 e30 0 20 40 60 80 100 1000 900 800 700 600 500 400 300 200 100 0 t a = 25  c v s =  15v 3000 units from 3 runs tpc 1. typical distribution of input offset voltage output offset voltage e mv number of units 1100 e5 e4 e3 e2 e1 012345 1000 900 800 700 600 500 400 300 200 100 0 t a = 25  c v s =  15v 3000 units from 3 runs tpc 4. typical distribution of output offset voltage temperature e  c input offset current e na 3.0 e50 0507 5 100 2.5 2.0 1.5 1.0 0.5 0 v s =  15v v cm = 0v e25 25 tpc 7. input offset current vs. temperature tcv ios e  v/  c number of units 160 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 140 120 100 80 60 40 20 0 400 units from 3 runs v s =  15v tpc 2. typical distribution of tcv ios tcv oos e  v/  c number of units 200 0 20 40 60 80 100 120 140 160 175 150 125 100 75 50 25 0 400 units from 3 runs v s =  15v tpc 5. typical distribution of tcv oos temperature e  c input bias current e na 32 e50 0507 5 100 24 16 12 8 4 0 v s =  15v v cm = 0v e25 25 28 20 tpc 8. input bias current vs. temperature power supply voltage e v input offset voltage e  v 20 0  5  10  15  20 15 10 5 0 e5 e10 t a = 25  c tpc 3. input offset voltage change vs. supply voltage power supply voltage e v input offset voltage e mv 1.5 0  5  10  15  20 1.0 0.5 0 e0.5 e1.0 e1.5 t a = 25  c tpc 6. output offset voltage change vs. supply voltage power supply voltage e v input bias current e na 6 0  10  15  20 4 2 1 0 v s =  15v v cm = 0v  5 5 3 tpc 9. input bias current vs. supply voltage
rev. e e6e amp02 frequency e hz vo lta ge gain e db 80 1k 100k 1m 10m 40 0 e20 e40 t a = 25  c v s =  15v 10k 60 20 g = 1000 g = 100 g = 10 g = 1 tpc 10. closed-loop voltage gain vs. frequency frequency e hz power supply rejection e db 1 10k 100k 0 t a = 25  c v s =  15v  v s =  1v 100 20 40 60 80 100 120 140 1k 10 g = 1 g = 10 g = 1000 g = 100 tpc 13. positive psr vs. frequency frequency e hz vo ltag e noise density e nv/ hz hz hz hz hz hz h h 1s 100mv noise voltage e 200nv/div tpc 18. 0.1 hz to 10 hz noise a v = 1000
rev. e amp02 e7e frequency e hz peak- to-peak amplitude e v 30 100 10k 100k 1m 20 10 5 0 t a = 25  c v s =  15v r l = 1k  1k 25 15 tpc 19. maximum output swing vs. frequency supply voltage e v supply current e ma 0  20 1 t a = e25  c, +25  c, +85  c  10 3 4 5 6 7 8  15  5 tpc 22. supply current vs. supply voltage load resistance e  output voltage e v 16 10 1k 10k 100k 8 4 2 0 t a = 25  c v s =  15v 100 12 6 14 10 tpc 20. maximum output voltage vs. load resistance vo lta ge gain e g slew rate e v  s 1 100 1k 1 t a = e40  c, +25  c, +85  c 10 2 3 4 5 6 7 8 v s =  15v tpc 23. slew rate vs. voltage gain frequency e hz output impedance e  100 1m 10m e20 t a = 25  c v s =  15v i out = 20ma p-p 10k 0 20 40 60 80 100 120 100k 1k tpc 21. closed loop output impedance vs. frequency
rev. e e8e amp02 the voltage gain can range from 1 to 10,000. a gain set resistor is not required for unity-gain applications. metal-film or wirewound resistors are recommended for best results. the total gain accuracy of the amp02 is determined by the tolerance of the external gain set resistor, r g , combined with the gain equation accuracy of the am p02. total gain drift com bines the mismatch of the external gain set resistor drift with that of the internal resistors (20 ppm/ c typ). maximum gain drift of the amp02 independent of the external gain set resistor is 50 ppm/ c. all instrumentation amplifiers require attention to layout so thermocouple effects are minimized. thermocouples formed between copper and dissimilar metals can easily destroy the tcv os performance of the amp02, which is typically 0.5 v/ c. resistors themselves can generate thermoelectric emfs when mounted parallel to a thermal gradient. the amp02 uses the triple op amp instrumentation amplifier configuration with the input stage consisting of two transimped- ance amplifiers followed by a unity-gain differential amplifier. the input stage and output buffer are laser-trimmed to increase gain accuracy. the amp02 maintains wide bandwidth at all gains as shown in figure 3. for voltage gains greater than 10, the bandwidth is over 200 khz. at unity gain, the bandwidth of the amp02 exceeds 1 mhz. frequency e hz vo lta ge gain e db 80 1k 100k 1m 10m 40 0 e20 e40 t a = 25  c v s =  15v 10k 60 20 g = 1 g = 10 g = 100 g = 1000 figure 3. the amp02 keeps its bandwidth at high gains common-mode rejection ideally, an instrumentation amplifier responds only to the differ- ence between the two input signals and rejects common-mode voltages and noise. in practice, there is a small change in output voltage when both inputs experience the same common-mode voltage change; the ratio of these voltages is called the common-mode gain. common-mode rejection (cmr) is the logarithm of the ratio of differential-mode gain to common-mode gain, expressed in db. laser trimming is used to achieve the high cmr of the amp02. applications information input and output offset voltages instrumentation amplifiers have independent offset voltages associated with the input and output stages. the input offset component is directly multiplied by the amplifier gain, whereas output offset is independent of gain. therefore at low gain, output-offset errors dominate while at high gain, input-offset errors dominate. overall offset voltage, v os , referred to the output ( rto ) is calculated as follows: v rto v g v os ios oos () = () + where v ios and v oos are the input and output offset voltage specifications and g is the amplifier gain. the overall offset voltage drift tcv os , referred to the output, is a combination of input and output drift specifications. input offset voltage drift is multiplied by the amplifier gain, g , and summed with the output offset drift: tcv rto tcv g tcv os ios oos () = () + where tcv ios is the input offset voltage drift, and tcv oos is the output offset voltage drift. frequently, the amplifier drift is referred back to the input ( rti ), which is then equivalent to an input signal change: tcv rti tcv tcv g os ios oos () =+ for example, the maximum input-referred drift of an amp02ep set to g = 1000 becomes: tcv rti v c vc vc os () =+ = 2 100 1000 21 o o o . input bias and offset currents input transistor bias currents are additional error sources that can degrade the input signal. bias currents flowing through the signal source resistance appear as an additional offset voltage. equal source resistance on both inputs of an ia will minimize offset changes due to bias current variations with signal voltage and temperature; however, the difference between the two bias currents (the input offset current) produces an error. the mag- ni tude of the error is the offset current times the source resistance. a current path must always be provided between the differential inputs and analog ground to ensure correct amplifier operation. floating inputs such as thermocouples should be grounded close to the signal source for best common-mode rejection. gain the amp02 only requires a single external resistor to set the voltage gain. the voltage gain, g , is: g = 50 k  r g + 1 and r g = 50 k  g e1
rev. e amp02 e9e 25k  v 2 r 25k  25k  v 1 r 25k  r g r g2 r g1 +in ein 25k  25k  sense (s oic-16 only) out reference 3 8 1 2 5 6 figure 4. triple op amp topology grounding the majority of instruments and data acquisition systems have separate grounds for analog and digital signals. analog ground may also be divided into two or more grounds that will be tied to gether at one point, usually at the analog power supply ground. in addition, the digital and analog grounds may be joined? normally at the analog ground pin on the a/d converter. following this basic practice is essential for good circuit performance. mixing grounds causes interactions between digital circuits and the analog signals. since the ground returns have finite resistance and inductance, hundreds of millivolts can be developed between the system ground and the data acquisition components. using separate ground returns minimizes the current flow in the sensi tive analog return path to the system ground point. consequently, n oisy ground currents from logic gates interact with the analog signals. inevitably, two or more circuits will be joined together with their grounds at differential potentials. in these situations, the differential input of an instrumentation amplifier, with its high cmr, can accurately transfer analog information from one circuit to another. sense and reference terminals the sense terminal completes the feedback path for the instrumen- tation amplifier output stage and is internally connected directly to the output. for soic devices, connect the sense terminal to the output. the output signal is specified with respect to the refer- ence terminal, which is normally connected to analog ground. the reference may also be used for offset correction level shift- ing. a reference source resistance will reduce the common-mode rejection by the ratio of 25 k  /r ref . if the reference source resis- tance is 1  , the cmr will be reduced 88 db (25 k  /1  = 88 db). figure 4 shows the triple op amp configuration of the amp02. with all instrumentation amplifiers of this type, it is critical not to exceed the dynamic range of the input amplifiers. the ampli- fied differential input signal and the input common-mode volt- age must not force the amplifier?s output voltage beyond 12 v (v s = 15 v) or nonlinear operation will result. the input stage amplifier?s output voltages at v 1 and v 2 equal: v r r v v g v v v r r v v g v v g d cm d cm g d cm d cm 1 2 1 2 2 2 1 2 2 2 =+    
+ =+ =+    
+ =+ e e where: v d = differential input voltage = (+in) e (ein) v cm = common-mode input voltage g = gain of instrumentation amplifier if v 1 and v 2 can equal 12 v maximum, the common-mode input voltage range is: cmvr v gv d = ?    
12 2
rev. e e10e amp02 overvoltage protection instrumentation amplifiers invariably sit at the front end of instrumentation systems where there is a high probability of exposure to overloads. voltage transients, failure of a trans ducer, or removal of the amplifier power supply while the signal source is connected may destroy or degrade the performance of an unpro- tected device. a common technique is to place limiting resistors in series with each input, but this adds noise. the amp02 includes internal protection circuitry that limits the input current to 4 ma for a 60 v differential overload (see figure 5) with power off, 2.5 ma with power on. differential input voltage 4 e100 leakage current e ma 3 1 e1 e3 e4 2 0 e2 e80 e60 e40 e20 0 20 40 60 80 100 power on power off t a = 25  c v s =  15v figure 5. amp02?s input protection circuitry limits input current during overvoltage conditions power supply considerations achieving the rated performance of precision amplifiers in a practical circuit requires careful attention to external influences. for example, supply noise and changes in the nominal voltage directly affect the input offset voltage. a psr of 80 db means that a change of 100 mv on the supply (not an uncommon value) will produce a 10 v input offset change. consequently, care should be taken in choosing a power unit that has a low output noise level, good line and load regulation, and good temperature stability. in addition, each power supply should be properly bypassed.
rev. e amp02 e11e outline dimensions 8-lead plastic dual-in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.015 (0.38) min 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095aa 8-lead ceramic dip - glass hermetic seal [cerdip] (q-8) dimensions shown in inches and (millimeters) 1 4 85 0.310 (7.87) 0.220 (5.59) pin 1 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) controlling dimensions are in inches; millimeters dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design 16-lead standard small outline package [soic] wide body (r-16) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013aa seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 16 9 8 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 10.50 (0.4134) 10.10 (0.3976) 0.32 (0.0126) 0.23 (0.0091) 8  0  0.75 (0.0295) 0.25 (0.0098)  45  1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10
rev. e c00248e0e1/03(e) printed in u.s.a. e12e amp02 revision history location page 1/03?data sheet changed from rev. d to rev. e. edits to f igure 2 .............................................................................................................. ...............................................................3 edits to d ie c haracteristics ................................................................................................... ..........................................................4 updated outline di mensi ons ..................................................................................................... ........................................11


▲Up To Search▲   

 
Price & Availability of AMP02AZ883C

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X