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october 2010 doc id 10880 rev 3 1/28 1 VND810SP-E double channel high-side driver features ecopack ? : lead free and rohs compliant automotive grade: compliance with aec guidelines very low standby current cmos compatible input on-state open-load detection off-state open-load detection thermal shutdown protection and diagnosis undervoltage shutdown overvoltage clamp output stuck to v cc detection load current limitation reverse battery protection electrostatic discharge protection description the VND810SP-E is a monolithic device made by using stmicroelectronics? vipower? m0-3 technology, intended for driving any kind of load with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). active current limitatio n combined with thermal shutdown and automatic restart protects the device against overload. the device detects open-load condition both in on-state and off-state. output shorted to v cc is detected in the off-state. device automatically turns-off in case of ground pin disconnection. type r ds(on) i out v cc VND810SP-E 160 m (1) 1. per each channel. 3.5 a (1) 36 v 1 10 powerso-10? table 1. order codes package order code tube tape and reel powerso-10? VND810SP-E vnd810sptr-e www.st.com
contents VND810SP-E 2/28 doc id 10880 rev 3 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17 3.1.1 solution 1: a resistor in the ground line (rgnd only) . . . . . . . . . . . . . . 17 3.1.2 solution 2: a diode (d gnd ) in the ground line . . . . . . . . . . . . . . . . . . . . 18 3.1.3 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2.1 open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 powerso-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.2 powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 powerso-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
VND810SP-E list of tables doc id 10880 rev 3 3/28 list of tables table 1. order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 7. v cc output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 8. status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 9. switching (v cc = 13 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 11. logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 12. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 13. electrical transient requirements on v cc pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 14. electrical transient requirements on v cc pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 15. electrical transient requirements on v cc pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 16. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 17. powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of figures VND810SP-E 4/28 doc id 10880 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 13. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 14. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 15. open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 18. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 19. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 21. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 22. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 23. i lim vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 24. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 25. open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 26. maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 27. powerso-10 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 28. powerso-10 rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . 21 figure 29. powerso-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 22 figure 30. thermal fitting model of a double channel hsd in powerso-10 . . . . . . . . . . . . . . . . . . . . 22 figure 31. powerso-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 32. powerso-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 26 figure 33. tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VND810SP-E block diagram and pin description doc id 10880 rev 3 5/28 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin status n.c. output input floating x x x x to ground x through 10 k resistor overtemp. 1 v cc gnd input1 output1 overvoltage logic driver 1 status1 v cc clamp undervoltage clamp 1 open-load on 1 current limiter 1 open-load off 1 output2 driver 2 clamp 2 open-load on 2 open-load off 2 overtemp. 2 input2 status2 current limiter 2 1 2 3 4 5 6 7 8 9 10 11 output 1 output 1 n.c. output 2 output 2 ground input 1 status 1 status 2 input 2 v cc powerso-10
electrical specifications VND810SP-E 6/28 doc id 10880 rev 3 2 electrical specifications figure 3. current and voltage conventions 1) v fn = v ccn - v outn during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in ta b l e 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to th e stmicroelectronics sure progra m and other rele vant quality document. i s i gnd output 2 v cc gnd status 2 input 2 i out2 i in2 i stat2 v stat2 v in2 v cc v out2 output 1 i out1 v out1 input 1 i in1 status 1 i stat1 v in1 v stat1 v f1 (1) table 3. absolute maximum ratings symbol parame ter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage -0.3 v - i gnd dc reverse ground pin current -200 ma i out dc output current internally limited a - i out reverse dc output current -6 a i in dc input current +/- 10 ma i stat dc status current +/- 10 ma v esd electrostatic discharge (human body model: r=1.5k ; c=100pf) ? input ?status ?output ?v cc 4000 4000 5000 5000 v v v v
VND810SP-E electrical specifications doc id 10880 rev 3 7/28 2.2 thermal data 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 36 v; -40 c < t j < 150 c, unless otherwise stated. (per each channel) ) e max maximum switching energy (l = 1.4 mh; r l =0 ; v bat =13.5v; t jstart = 150 c; i l =5a) 24 mj p tot power dissipation t c =25c 52 w t j junction operating temperature internally limited c t c case operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parame ter value unit table 4. thermal data symbol parameter value unit r thj-case thermal resistance junction-case 2.4 c/w r thj-amb thermal resistance junction-ambient 52.4 (1) 1. when mounted on a standard single-sided fr-4 board with 0.5 cm 2 of cu (at least 35 m thick). horizontal mounting and no artificial air flow. 37 (2) 2. when mounted on a standard single-sided fr-4 board with 6 cm 2 of cu (at least 35 m thick). horizontal mounting and no artificial air flow c/w table 5. power output symbol parameter test conditions min. typ. max. unit v cc (1) operating supply voltage 5.5 13 36 v v usd (1) undervoltage shutdown 3 4 5.5 v v ov (1) overvoltage shutdown 36 v r on on-state resistance i out =1a; t j =25c i out =1a; v cc >8v 160 320 m m i s (1) supply current off-state; v cc =13v; v in =v out =0v off-state; v cc =13v; v in =v out =0v; t j =25 c on-state; v cc =13v; v in =5v; i out =0a 12 12 5 40 25 7 a a ma i l(off1) off-state output current v in =v out =0v 0 50 a
electrical specifications VND810SP-E 8/28 doc id 10880 rev 3 i l(off2) off-state output current v in =0v; v out =3.5v -75 0 a i l(off3) off-state output current v in =v out =0v; v cc =13v; t j =125 c 5 a i l(off4) off-state output current v in =v out =0v; v cc =13v; t j =25c 3 a 1. per device. table 6. protection (1) symbol parameter t est conditions min. typ. max. unit t tsd shutdown temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c t sdl status delay in overload conditions t j >t tsd 20 s i lim current limitation v cc =13v 5.5 v < v cc <36v 3.5 5 7.5 7.5 a a v demag turn-off output clamp voltage i out =1a; l=6mh v cc -41 v cc -48 v cc -55 v 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles table 7. v cc output diode symbol parameter test conditions min typ max unit v f forward on voltage -i out = 0.5 a; t j = 150 c - - 0.6 v table 8. status pin symbol parameter test conditions min typ max unit v stat status low output voltage i stat = 1.6 ma 0.5 v i lstat status leakage current normal operation; v stat = 5 v 10 a c stat status pin input capacitance normal operation; v stat = 5 v 100 pf v scl status clamp voltage i stat = 1 ma i stat = -1 ma 66.8 -0.7 8v v table 5. power output (continued) symbol parameter test conditions min. typ. max. unit
VND810SP-E electrical specifications doc id 10880 rev 3 9/28 x table 9. switching (v cc =13v) symbol parameter test c onditions min typ max unit t d(on) turn-on delay time r l =13 from v in rising edge to v out =1.3v -30- s t d(off) turn-off delay time r l =13 from v in falling edge to v out =11.7v -30- s dv out /dt (on) turn-on voltage slope r l =13 from v out = 1.3 v to v out = 10.4 v - see ta bl e 2 1 -v/ s dv out /dt (off) turn-off voltage slope r l =13 from v out =11.7v to v out =1.3v - see ta bl e 2 2 -v/ s table 10. open-load detection symbol parameter test co nditions min typ max unit i ol open-load on-state detection threshold v in = 5v 20 40 80 ma t dol(on) open-load on-state detection delay i out = 0 a 200 s v ol open-load off-state voltage detection threshold v in = 0 v 1.5 2.5 3.5 v t dol(off) open-load detection delay at turn-off 1000 s table 11. logic input symbol parameter test conditions min typ max unit v il input low level 1.25 v i il low level input current v in = 1.25 v 1 a v ih input high level 3.25 v i ih high level input current v in = 3.25 v 10 a v hyst input hysteresis voltage 0.5 v v icl input clamp voltage i in = 1 ma i in = -1 ma 66.8 -0.7 8v v
electrical specifications VND810SP-E 10/28 doc id 10880 rev 3 figure 4. status timing figure 5. switching time waveforms v inn v stat n t dol(off) open-load status timing (with external pull-up) v inn v stat n overtemperature status timing t sdl t sdl i out < i ol v out > v ol t dol(on) t j > t tsd t t v outn v inn 80% 10% dv out /dt (on) t d(off) 90% dv out /dt (off) t d(on)
VND810SP-E electrical specifications doc id 10880 rev 3 11/28 table 12. truth table conditions input output status normal operation l h l h h h current limitation l h h l x x h (t j < t tsd ) h (t j > t tsd ) l overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h output voltage > v ol l h h h l h output current < i ol l h l h h l
electrical specifications VND810SP-E 12/28 doc id 10880 rev 3 table 13. electrical transient requirements on v cc pin (part 1) iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms, 10 2 +25 v +50 v +75 v +100 v 0.2 ms, 10 3a -25 v -50 v -100 v -150 v 0.1 s, 50 3b +25 v +50 v +75 v +100 v 0.1 s, 50 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 5 +26.5 v +46.5 v +66.5 v +86.5 v 400 ms, 2 table 14. electrical transient requirements on v cc pin (part 2) iso t/r 7637/1 test pulse test levels i ii iii iv 1cccc 2cccc 3acccc 3bcccc 4cccc 5c e e e table 15. electrical transient requirements on v cc pin (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
VND810SP-E electrical specifications doc id 10880 rev 3 13/28 figure 6. waveforms open-load without external pull-up status n input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc status n input n status n status n input n status n input n open-load with external pull-up undefined overtemperature input n status n t tsd t r t j output voltage n v cc v ol v ol v cc >v ov
electrical specifications VND810SP-E 14/28 doc id 10880 rev 3 2.4 electrical char acteristics curves figure 7. off-state output current figure 8. high level input current figure 9. input clamp voltage figure 10. status leakage current figure 11. status low output voltage figure 12. status clamp voltage -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 0.16 0.32 0.48 0.64 0.8 0.96 1.12 1.28 1.44 1.6 il(off1) (ua) off state vcc=36v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.01 0.02 0.03 0.04 0.05 ilstat (ua) vstat=5v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 vstat (v) istat=1.6ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vscl (v) istat=1ma
VND810SP-E electrical specifications doc id 10880 rev 3 15/28 figure 13. on-state resistance vs t case figure 14. on-state resistance vs v cc figure 15. open-load on-state detection threshold figure 16. open-load off-state detection threshold figure 17. input high level figure 18. input low level -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 50 100 150 200 250 300 350 400 ron (mohm) iout=1a vcc=8v; 13v & 36v 5 10152025303540 vcc (v) 0 50 100 150 200 250 300 350 400 ron (mohm) iout=1a tc= - 40oc tc= 25oc tc= 125oc -50 -25 0 25 50 75 100 125 150 175 tc (c) 10 15 20 25 30 35 40 45 50 55 60 iol (ma) vcc=13v vin=5v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vol (v) vin=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v)
electrical specifications VND810SP-E 16/28 doc id 10880 rev 3 figure 19. input hysteresis voltag e figure 20. overvoltage shutdown figure 21. turn-on voltage slope figure 22. turn-off voltage slope figure 23. i lim vs t case -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 100 200 300 400 500 600 700 800 900 1000 dvout/dt(on) (v/ms) vcc=13v rl=13ohm -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 50 100 150 200 250 300 350 400 450 500 dvout/dt(off) (v/ms) vcc=13v rl=13ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 10 ilim (a) vcc=13v
VND810SP-E application information doc id 10880 rev 3 17/28 3 application information figure 24. application schematic 3.1 gnd protection network against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: a resistor in the ground line (r gnd only) this can be used with any type of load. the following shows how to dimension the r gnd resistor: 1. r gnd 600 mv / i s(on)max . 2. r gnd (-v cc ) / (-i gnd ) where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device?s datasheet. power dissipation in r gnd (when v cc < 0 during reverse battery situations) is: p d = (-v cc ) 2 / r gnd this resistor can be shared amongst several different hsd. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that, if the microprocessor ground is not common with the device ground, then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high side drivers sharing the same r gnd . v cc output2 d ld +5v r prot output1 status1 input1 +5v status2 input2 gnd +5v c r prot r prot r prot d gnd r gnd v gnd
application information VND810SP-E 18/28 doc id 10880 rev 3 if the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then st suggests using section 3.1.2 described below. 3.1.2 solution 2: a diode (d gnd ) in the ground line a resistor (r gnd = 1 k ) should be inserted in parallel to d gnd if the device is driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network produce a shift (~600 mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift does not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. 3.1.3 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds v cc max dc rating. the same applies if the device is subjected to transients on the v cc line that are greater than the ones shown in ta bl e 1 3 . 3.2 mcu i/o protection if a ground protection network is used and negative transients are present on the v cc line, the control pins is pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/o pins from latching up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: -v ccpeak / i latchup r prot (v oh c - v ih - v gnd ) / i ihmax example for the following conditions: v ccpeak = -100 v i latchup 20 ma v oh c 4.5 v 5k r prot 65 k . the recommended values are: r prot = 10 k 3.2.1 open-load detection in off-state off-state open-load detection requires an external pull-up resistor (r pu ) connected between output pin and a positive supply voltage (v pu ) like the +5 v line used to supply the microprocessor. the external resistor has to be selected according to the following requirements:
VND810SP-E application information doc id 10880 rev 3 19/28 1. no false open-load indication when load is connected: in this case it needs to avoid v out to be higher than v olmin ; this results in the following condition: v out =(v pu /(r l +r pu ))r l application information VND810SP-E 20/28 doc id 10880 rev 3 3.3 maximum demagn etization energy figure 26. maximum turn-off current versus load inductance 1. values are generated with r l =0 in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. a = single pulse at t jstart =150c b = repetitive pulse at t jstart =100c c = repetitive pulse at t jstart =125c conditions: v cc = 13.5 v v in , i l t demagnetization demagnetization demagnetization 1 10 0,01 0,1 1 10 100 l( mh ) i lm ax (a) a b c
VND810SP-E package and pcb thermal data doc id 10880 rev 3 21/28 4 package and pcb thermal data 4.1 powerso-10 thermal data figure 27. powerso-10 pc board 1. layout condition of r th and z th measurements (pcb fr4 area= 58 mm x 58 mm, pcb thickness = 2 mm, cu thickness = 35 m, copper areas: from minimum pad lay-out to 8 cm 2 ). figure 28. powerso-10 r thj-amb vs pcb copper area in open box free air condition 30 35 40 45 50 55 0246810 pcb cu heatsink area (cm^2) rthj_amb (c/w) tj-tamb=50c
package and pcb the rmal data VND810SP-E 22/28 doc id 10880 rev 3 figure 29. powerso-10 thermal impeda nce junction ambient single pulse figure 30. thermal fitting model of a double channel hsd in powerso-10 equation 1: pulse calculation formula t_amb pd1 c1 r4 c3 c4 r3 r1 r6 r5 r2 c5 c6 c2 pd2 r2 c1 c2 r1 tj_1 tj_2 z th r th z thtp 1 ? () + ? = where t p t ? =
VND810SP-E package and pcb thermal data doc id 10880 rev 3 23/28 table 16. thermal parameter area/island (cm 2 ) footprint 6 r1 (c/w) 0.35 r2 (c/w) 1.8 r3(c/w) 1.1 r4 (c/w) 0.8 r5 (c/w) 12 r6 (c/w) 37 22 c1 (w.s/c) 0.0001 c2 (w.s/c) 7e-04 c3 (w.s/c) 0.008 c4 (w.s/c) 0.3 c5 (w.s/c) 0.75 c6 (w.s/c) 3 5
package and packing information VND810SP-E 24/28 doc id 10880 rev 3 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. 5.2 powerso-10 mechanical data figure 31. powerso-10 package dimensions detail "a" plane seating l a1 f a1 h a d d1 = = = = e4 0.10 a e c a b b detail "a" seating plane e2 10 1 eb he 0.25
VND810SP-E package and packing information doc id 10880 rev 3 25/28 table 17. powerso-10 mechanical data symbol millimeters min typ max a 3.35 3.65 a (1) 1. muar only poa p013p 3.4 3.6 a1 0.00 0.10 b 0.40 0.60 b (1) 0.37 0.53 c 0.35 0.55 c (1) 0.23 0.32 d 9.40 9.60 d1 7.40 7.60 e 9.30 9.50 e2 7.20 7.60 e2 (1) 7.30 7.50 e4 5.90 6.10 e4 (1) 5.90 6.30 e1.27 f 1.25 1.35 f (1) 1.20 1.40 h 13.80 14.40 h (1) 13.85 14.35 h0.50 l 1.20 1.80 l (1) 0.80 1.10 a0 8 (1) 2 8
package and packing information VND810SP-E 26/28 doc id 10880 rev 3 5.3 powerso-10 packing information figure 32. powerso-10 suggested pad layout and tube shipment (no suffix) figure 33. tape and reel shipment (suffix ?tr?) 6.30 10.8 - 11 14.6 - 14.9 9.5 1 2 3 4 5 1.27 0.67 - 0.73 0. 54 - 0.6 10 9 8 7 6 b a c all dimensions are in mm. base q.ty bulk q.ty tube length ( 0.5) a b c ( 0.1) casablanca 50 1000 532 10.4 16.4 0.8 muar 50 1000 532 4.9 17.2 0.8 reel dimensions all dimensions are in mm. base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
VND810SP-E revision history doc id 10880 rev 3 27/28 6 revision history table 18. document revision history date revision changes 01-oct-2004 1 initial release. 25-may-2010 2 changed document template. reformatted entire document. changed features list. 08-oct-2010 3 updated following tables: ? table 6: protection ? table 12: truth table ? table 17: powerso-10 mechanical data updated figure 26: maximum turn-off cu rrent versus load inductance
VND810SP-E 28/28 doc id 10880 rev 3 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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