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| datashee t product structure silicon monolithic integrated circuit this product has no designed protec tion against radioactive rays 1/33 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 14? 001 www.rohm.com serial eeprom series standard eeprom i 2 c bus eeprom (2-wire) br24g16-3 general description br24g16-3 is a serial eeprom of i 2 c bus interface method features ? completely conforming to the world standard i 2 c bus. all controls available by 2 ports of serial clock (scl) and serial data (sda) ? other devices than eeprom can be connected to the same port, saving microcontroller port ? 1.6v to 5.5v single power source operation most suitable for battery use ? 1.6v to 5.5v wide limit of operating voltage, possible fast mode 400khz operation ? page write mode useful for initial value write at factory shipment ? self-timed programming cycle ? low current consumption ? prevention of write mistake ? write (write protect) function added ? prevention of write mistake at low voltage ? more than 1 million write cycles ? more than 40 years data retention ? noise filter built in scl / sda terminal ? initial delivery state ffh packages w(typ) x d(typ) x h(max) br24g16-3 capacity bit format type power supply voltage dip-t8 sop8 sop-j8 ssop-b8 tssop-b8 tssop-b8j msop8 vson008 x2030 16kbit 2k8 br24g16-3 1.6v to 5.5v figure 1. sop8 5.00mm x 6.20mm x 1.71mm sop- j8 4.90mm x 6.00mm x 1.65mm v son008x2030 2.00mm x 3.00mm x 0.60mm tssop-b8 3.00mm x 6.40mm x 1.20mm dip-t8 9.30mm x 6.50mm x 7.10mm tssop-b8j 3.00mm x 4.90mm x 1.10mm msop8 2.90mm x 4.00mm x 0.90mm ssop-b8 3.00mm x 6.40mm x 1.35mm
datasheet 2/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com absolute maximum ratings (ta=25 ) parameter symbol rating unit remark supply voltage v cc -0.3 to +6.5 v power dissipation pd 450 (sop8) mw derate by 4.5mw/c when operating above ta=25c 450 (sop-j8) derate by 4.5mw/c when operating above ta=25c 300 (ssop-b8) derate by 3.0mw/c when operating above ta=25c 330 (tssop-b8) derate by 3.3mw/c when operating above ta=25c 310 (tssop-b8j) derate by 3.1mw/c when operating above ta=25c 310 (msop8) derate by 3.1mw/c when operating above ta=25c 300 (vson008x2030) derate by 3.0mw/c when operating above ta=25c 800 (dip-t8) derate by 8.0mw/c when operating above ta=25c storage temperature tstg -65 to +150 operating temperature topr -40 to +85 input voltage / output voltage \ -0.3 to vcc+1.0 v the max value of input voltage/out put voltage is not over 6.5v. when the pulse width is 50ns or less, the min value of input voltage/output voltage is not lower than -1.0v. junction temperature tjmax 150 junction temperature at the storage condition memory cell characteristics (ta=25 , vcc=1.6v to 5.5v) parameter limit unit min typ max write cycles ( 1 ) 1,000,000 - - times data retention ( 1 ) 40 - - years (1) not 100% tested recommended operating ratings parameter symbol rating unit power source voltage v cc 1.6 to 5.5 v input voltage v in 0 to vcc dc characteristics ( unless otherwise specified, ta=-40 to +85 , vcc=1.6v to 5.5v ) parameter symbol limit unit conditions min typ max input high voltage1 v ih1 0.7v cc - v cc +1.0 v 1.7v Qv cc Q 5.5v input low voltage1 v il1 -0.3 (2) - +0.3v cc v 1.7v Qv cc Q 5.5v input high voltage2 v ih2 0.8v cc - v cc +1.0 v 1.6v Qv cc 1.7v input low voltage2 v il2 -0.3 (2) - +0.2v cc v 1.6v Qv cc 1.7v output low voltage1 v ol1 - - 0.4 v i ol =3.0ma, 2.5v Qv cc Q5.5v (sda) output low voltage2 v ol2 - - 0.2 v i ol =0.7ma, 1.6v Qv cc 2.5v (sda) input leakage current i li -1 - +1 a v in =0 to v cc output leakage current i lo -1 - +1 a v out =0 to v cc (sda) supply current (write) i cc1 - - 2.0 ma v cc =5.5v, f scl =400khz, t wr =5ms, byte write, page write supply current (read) i cc2 - - 0.5 ma v cc =5.5v, f scl =400khz random read, current read, sequential read standby current i sb - - 2.0 a v cc =5.5v, sda ?scl=v cc a0,a1,a2=gnd,wp=gnd (2) when the pulse width is 50ns or less, it is -1.0v. datasheet 3/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com ac characteristics (unless otherwise specified, ta=-40 to +85 , v cc =1.6v to 5.5v) parameter symbol limit unit min typ max clock frequency f scl - - 400 khz data clock high period t high 0.6 - - s data clock low period t low 1.2 - - s sda, scl (input) rise time (1) t r - - 1.0 s sda, scl (input) fall time (1) t f1 - - 1.0 s sda (output) fall time (1) t f2 - - 0.3 s start condition hold time t hd:sta 0.6 - - s start condition setup time t su:sta 0.6 - - s input data hold time t hd:dat 0 - - ns input data setup time t su:dat 100 - - ns output data delay time t pd 0.1 - 0.9 s output data hold time t dh 0.1 - - s stop condition setup time t su:sto 0.6 - - s bus free time t buf 1.2 - - s write cycle time t wr - - 5 ms noise spike width (sda and scl) t i - - 0.1 s wp hold time t hd:wp 1.0 - - s wp setup time t su:wp 0.1 - - s wp high period t high:wp 1.0 - - s (1) not 100% tested. condition input data level:v il =0.2v cc v ih =0.8v cc input data timing reference level: 0.3v cc /0.7v cc output data timing reference level: 0.3v cc /0.7v cc rise/fall time : Q 20ns serial input / output timing input read at the rise edge of scl data output in sync with the fall of scl figure 2-(a). serial input / output timing figure 2-(b). start-stop bit timing figure 2-(c). write cycle timing figure 2-(d). wp timing at write execution figure 2-(e). wp timing at write cancel 70% 70% tsu:sta thd:sta start condition tsu:sto stop condition 30% 30% 70% 70% d0 ack twr write data (n-th address) start condition stop condition 70% 70% data(1) d0 ack d1 data(n) ack twr 30% 70% stop condition thd:wp tsu:wp 30% 70% data(1) d0 d1 ack data(n) ack thigh:wp 70% 70% twr 70% scl sda ( ) sda ( ) tr tf1 thigh tsu:dat tlow thd:dat tdh tpd tbuf thd:sta 70% 30% 70% 70% 30% 70% 70% 30% 30% 70% 70% 30% 70% 70% 70% 70% 30% 30% 30% 30% tf2 (input) (output) datasheet 4/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com block diagram figure 3. block diagram pin configuration (top view) pin descriptions terminal name input/ output descriptions a0 - don?t use (1) a1 - don?t use (1) a2 - don?t use (1) gnd - reference voltage of all input / output, 0v sda input/ output serial data input serial data output scl input serial clock input wp input write protect terminal vcc - connect the power source. (1) pins not used as device address may be set to any of ?h?, 'l', and 'hi-z'. 16kbit eeprom array 11bit 2 5 6 vcc scl gnd br24g16-3 1 3 4 7 8 wp sda a 2 a 1 a 0 8 7 6 5 4 3 2 1 sda scl wp vcc gnd a 2 a 1 a 0 16kbit eeprom arra y a ddress decoder word a ddress register data register control circuit high voltage generating circuit power source voltage detection 8bit a ck start stop datasheet 5/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 6. output low voltage1 vs output low current (vcc=2.5v) figure 7. output low voltage2 vs output low current (vcc=1.6v) figure 4. input high vo ltage1,2 vs supply voltage (scl, sda, wp) figure 5. input low voltage1,2 vs supply voltage (scl, sda, wp) typical performance curves 1pin mark 0 0.2 0.4 0.6 0.8 1 0123456 output low current: i ol (ma) output low voltage1: v ol1 (v) spec ta=-40 ta= 25 ta= 85 0 0.2 0.4 0.6 0.8 1 0123456 output low current: i ol (ma) output low voltage2: v ol2 (v) ta=-40 ta= 25 ta= 85 spec 0 1 2 3 4 5 6 0123456 supply voltage: vcc(v) input high voltage: v ih1 (v) ta=-40 ta= 25 ta= 85 spec input high voltage1,2: v ih1,2 (v) 0 1 2 3 4 5 6 0123456 supply voltage: vcc(v) input low voltage: v il1 (v) ta=-40 ta= 25 ta= 85 spec input low voltage1,2: v il1,2 (v) datasheet 6/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 11. suppl y current (read) vs supply voltage (f scl =400khz) figure 8. input leakage current vs supply voltage (scl, wp) figure 9. output leakage current vs supply voltage (sda) figure 10. suppl y current (write) vs supply voltage (f scl =400khz) typical performance curves \ continued 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage: vcc(v) input leakage current: i li (a) ta=-40 ta= 25 ta= 85 spec 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage: vcc(v) output leakage current: i lo (a) ta=-40 ta= 25 ta= 85 spec 0 0.5 1 1.5 2 2.5 3 0123456 su p p l y vo l ta g e : vcc(v) supply current (write) : icc1(ma) ta=-40 ta= 25 ta= 85 spec 0 0.1 0.2 0.3 0.4 0.5 0.6 0123456 supply voltage: vcc(v) supply current (read) : i cc2 (ma) spec ta=-40 ta= 25 ta= 85 datasheet 7/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 13. clock frequency vs supply voltage figure 14. data clock high period vs supply voltage figure 12. s t andby current vs supply voltage figure 15. data clock low period vs supply voltage typical performance curves \ continued 0.1 1 10 100 1000 10000 0123456 supply voltage: vcc(v) clock frequency: fscl(khz) spec ta=-40 ta= 25 ta= 85 0 0.5 1 1.5 2 2.5 0123456 supply voltage: vcc(v) standby current: i sb (a) spec ta=-40 ta= 25 ta= 85 0 0.2 0.4 0.6 0.8 1 0123456 supply voltage: vcc(v) data clock high period : t high (s) spec ta=-40 ta= 25 ta= 85 0 0.3 0.6 0.9 1.2 1.5 0123456 supply voltage: vcc(v) data clock low period : t low (s) spec ta=-40 ta= 25 ta= 85 datasheet 8/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 17. start condition setup time vs supply voltage figure 18. input data hold time vs supply voltage ( high ) figure 16. start condition hold time vs supply voltage figure 19. input data hold time vs supply voltage (low) typical performance curves \ continued 0 0.2 0.4 0.6 0.8 1 0123456 supply voltage: vcc(v) start condition hold time: t hd:sta (s) spec ta=-40 ta= 25 ta= 85 -0.2 0 0.2 0.4 0.6 0.8 1 0123456 supply voltage: vcc(v) start condition setup time: t su:sta (s) spec ta=-40 ta= 25 ta= 85 -200 -150 -100 -50 0 50 0123456 supply voltage vcc(v) input data hold time : t hd:dat (ns) spec ta=-40 ta= 25 ta= 85 -200 -150 -100 -50 0 50 0123456 supply voltage: vcc(v) input data hold time : t hd:dat (ns) spec ta=-40 ta= 25 ta= 85 datasheet 9/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 23. ?h? output data delay time vs supply voltage (high) figure 21. input data setup time vs supply voltage (low) figure 22. ?l? output data delay time vs supply voltage (low) figure 20. input data setup time vs supply voltage (high) typical performance curves \ continued -200 -100 0 100 200 300 0123456 supply voltage: vcc(v) input data setup time : t su:dat (ns) spec ta=-40 ta= 25 ta= 85 -200 -100 0 100 200 300 0123456 supply voltage: vcc(v) input data setup time : t su:dat (ns) spec ta=-40 ta= 25 ta= 85 0 0.5 1 1.5 2 0123456 supply voltage: vcc(v) output data delay time : t pd (s) spec spec ta=-40 ta= 25 ta= 85 0 0.5 1 1.5 2 0123456 su p p l y vo l ta g e : vcc(v) output data delay time : t pd (s) spec spec ta=-40 ta= 25 ta= 85 datasheet 10/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 24. stop condition setup time vs supply voltage figure 27. noise spike width vs supply voltage (scl high) figure 25. bus free time vs supply voltage figure 26. write cycle time vs supply voltage typical performance curves \ continued -0.5 0 0.5 1 1.5 2 0123456 supply voltage: vcc(v) stop condition setup time: t su:sto (s) spec ta=-40 ta= 25 ta= 85 0 0.5 1 1.5 2 0123456 su p p l y vo l ta g e : vcc(v) bus free time : t buf (s) spec ta=-40 ta= 25 ta= 85 0 1 2 3 4 5 6 0123456 supply voltage: vcc(v) write cycle time : t wr (ms) ta=-40 ta= 25 ta= 85 spec 0 0.1 0.2 0.3 0.4 0.5 0.6 0123456 supply voltage: vcc(v) noise spike width(scl high) : ti(s) spec ta=-40 ta= 25 ta= 85 datasheet 11/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 29. noise spike width vs supply voltage (sda high) figure 30. noise spike width vs supply voltage (sda low) figure 31. wp hold time vs supply voltage figure 28. noise spike width vs supply voltage (scl low) typical performance curves \ continued 0 0.1 0.2 0.3 0.4 0.5 0.6 0123456 supply voltage: vcc(v) noise spike width(scl low : ti(s) spec ta=-40 ta= 25 ta= 85 0 0.1 0.2 0.3 0.4 0.5 0.6 0123456 supply voltage: vcc(v) noise spike width(sda low) : ti(s) spec ta=-40 ta= 25 ta= 85 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage: vcc(v) wp hold time : t hd:wp (s) spec ta=-40 ta= 25 ta= 85 0 0.1 0.2 0.3 0.4 0.5 0.6 0123456 supply voltage: vcc(v) noise spike width(sda high) : ti(s) spec ta=-40 ta= 25 ta= 85 datasheet 12/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com figure 32. wp setup time vs supply voltage figure 33. wp high period vs supply voltage typical performance curves \ continued -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0123456 supply voltage: vcc(v) wp setup time : t su:wp (s) spec ta=-40 ta= 25 ta= 85 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage: vcc(v) wp high period : t high:wp ( s) spec ta=-40 ta= 25 ta= 85 datasheet 13/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com timing chart 1. i 2 c bus data communication i 2 c bus data communication starts by start condition input, and ends by stop condition input. data is always 8bit long, and acknowledge is always required after each byte. i 2 c bus data communication with several devices is possible by connecting with 2 communication lines: serial data (sda) and serial clock (scl). among the devices, there should be a ?master? that generates clock and c ontrol communication start and end. the rest become ?slave? which are controlled by an address pe culiar to each device, like this eeprom. the device that outputs data to the bus during data communication is called ?transmitter?, and the device that receiv es data is called ?receiver?. 2. start condition (start bit recognition) (1) before executing each command, start condition (start bit) where sda goes from 'high' down to 'low' when scl is 'high' is necessary. (2) this ic always detects whether sda and scl are in star t condition (start bit) or not, therefore, unless this condition is satisfied, any command cannot be executed. 3. stop condition (stop bit recognition) (1) each command can be ended by a stop condition (stop bit) where sda goes from 'low' to 'high' while scl is 'high'. 4. acknowledge (ack) signal (1) this acknowledge (ack) signal is a software rule to show whether data transfer has been made normally or not. in master-slave communication, the device (ex. -com sends slave address input for write or read command to this ic) at the transmitter (sending) side re leases the bus after output of 8bit data. (2) the device (ex. this ic receives the slave address input for write or read command from the -com) at the receiver (receiving) side sets sda 'low' during 9 th clock cycle, and outputs acknowledge signal (ack signal) showing that it has received the 8bit data. (3) this ic, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ack signal) 'low'. (4) after receiving 8bit data (word address and write data) during each write operation, this ic outputs acknowledge signal (ack signal) ?low?. (5) during read operation, this ic outputs 8bit data (read data) and detects acknowledge signal (ack signal) 'low'. when acknowledge signal (ack signal) is detected, and stop condition is not sent from the master (-com) side, this ic continues to output dat a. when acknowledge signal (ack signal) is not detected, this ic stops data transfer, recognizes stop condition (stop bit), and ends read operation. t hen this ic becomes ready for another transmission. 5. device addressing (1) slave address comes after start condition from master. (2) the significant 4 bits of slave address are used for recognizing a device type. the device code of this ic is fixed to '1010'. (3) the most insignificant bit ( w/r --- read/ write ) of slave address is used for designating write or read operation, and is as shown below. setting w/r to 0 ------- write (setting 0 to word address setting of random read) setting w/r to 1 ------- read slave address maximum number of connected buses 1 0 1 0 p2 p1 p0 r/ w DD 1 p0 to p2 are page select bits. 89 89 89 s p condition condition ack stop ack data data addres s start r/w ack 1-7 sda scl 1-7 1-7 figure 34. data transfer timing datasheet 14/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com write command 1. write cycle (1) arbitrary data can be written to this eeprom. when wr iting only 1 byte, byte write is normally used, and when writing continuous data of 2 bytes or more, simultaneous write is possible by page write cycle. the maximum number of bytes is specified per device of each capacity. up to 8 arbitrary bytes can be written. (2) during internal write execution, all input commands are ignored, theref ore ack is not returned. (3) data is written to the address designated by word address (n-th address) (4) by issuing stop bit after 8bit data input, internal write to memory cell starts. (5) when internal write is started, command is not accepted for t wr (5ms at maximum). (6) using page write cycle, writing in bulk is done as follows: when data of more than 16 bytes is sent, the bytes in excess overwrite the data already sent first. (refer to "internal address increment".) (7) as for page write cycle of br24g16-3, where 2 or more bytes of data is intended to be written, after the page select bits ?p0?, ?p1?, and ?p2? of slave address are designa ted arbitrarily, only the value of 4 least significant bits in the address is incremented internally, so that data up to 16 bytes of memory only can be written. in the case br24g16-3, 1 page=16 bytes, but the page write cycle time is 5ms at maximum for 16byte bulk write. it does not stand 5ms at maximum 16byte=80ms (max). 2. internal address increment page write mode (in the case of br24g16-3) 3. write protect (wp) terminal write protect (wp) function when wp terminal is set at vcc (h level), data rewrite of all addresses is prohibited. when it is set gnd (l level), data rewrite of all address is enabled. be sure to connect this terminal to vcc or gnd, or control it to h level or l level. do not leave it open. in case of using it as rom, it is recommended to connec t it to pull up or vcc. at extremely low voltage at power on/off, by setting the wp terminal ?h?, write error can be prevented. p1 p2 w a 7 d7 1 1 0 0 w r i t e s t a r t r / w s t o p word address data slave address p0 w a 0 d0 a c k sda line a c k a c k figure 35. byte write cycle figure 36. page write cycle for example, when it is started from address 0eh, then, increment is made as below, 0eh 0fh 00h 01h ??? please take note. 0eh ??? 0e in hexadecimal, therefore, 00001110 becomes a binary number. wa7 wa4 wa3 wa2 wa1 wa0 0 00000 0 00001 0 00010 0 01110 0 01111 0 00000 increment 0eh significant bit is fixed. no digit up w r i t e s t a r t r / w a c k s t o p word address(n) data(n) sda line a c k a c k data(n+15) a c k slave address 1 0 0 1 p0 p1 p2 w a 7 d0 d7 d0 w a 0 datasheet 15/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com read command 1. read cycle read cycle is when data of eeprom is read. read cycle c ould be random read cycle or current read cycle. random read cycle is a command to read data by designating a specif ic address, and is used generally. current read cycle is a command to read data of internal address register without des ignating an address, and is used when to verify just after write cycle. in both the read cycles, sequential read cy cle is available where the next address data can be read in succession. (1) in random read cycle, data of designated word address can be read. (2) when the command just before current read cycle is r andom read cycle, current read cycle (each including sequential read cycle), data of incremented last read addr ess (n)-th, i.e., data of the (n+1)-th address is output. (3) when ack signal 'low' after d0 is detected, and stop co ndition is not sent from ma ster (-com) side, the next address data can be read in succession. (4) read cycle is ended by stop condition where 'h' is input to ack signal after d0 and sda signal goes from ?l? to ?h? while scl signal is 'h'. (5) when 'h' is not input to ack signal after d0, sequential read gets in, and the next data is output. therefore, read command cycle cannot be ended. to end read command cycle, be sure to input 'h' to ack signal after d0, and the stop condition where sda goes from ?l? to ?h? while scl signal is 'h'. (6) sequential read is ended by stop condition where 'h' is input to ack signal after arbitrary d0 and sda is asserted from ?l? to ?h? while scl signal is 'h'. figure 37. random read cycle figure 38. current read cycle figure 39. sequential read cycle (in the case of current read cycle) w r i t e s t a r t r / w a c k s t o p word address(n) sd a line a c k a c k data(n) a c k slave address 10 0 1 p0 p1 p2 wa 7 a0 d0 slave address 10 0 1a1 a2 s t a r t d7 r / w r e a d wa 0 s t a r t s t o p sda line a c k data(n) a c k slave address 10 0 1 p0 p1 p2 d0 d7 r / w r e a d r e a d s t a r t r / w a c k s t o p data ( n ) sda line a c k a c k data ( n+x ) a c k slave address 10 0 1 p0 p1 p2 d0 d7 d0 d7 datasheet 16/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com software reset software reset is executed to avoid malfunction after po wer on, and during command input. software reset has several kinds, and 3 kinds of them are shown in the figure below. (ref er to figure 40-(a), figure 40-(b), figure 40-(c).) within the dummy clock input area, the sda bus is released ('h' by pu ll up) and ack output and read data '0' (both 'l' level) may be output from eeprom. therefore, if 'h' is input forcibly, output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. acknowledge polling during internal write execution, all input commands are ignored , therefore ack is not returned . during internal automatic write execution after write cycle input, next command (slave addre ss) is sent. if the first ack signal sends back 'l', then it means end of write operation, el se 'h' is returned, which means writing is still in progress. by the use of acknowledge polling, next command can be executed without waiting for t wr = 5ms. to write continuously, w/r = 0, then to carry out current read cycle after write, slave address with w/r = 1 is sent, and if ack signal sends back 'l', then execute word address input and data output and so forth. 1 2 13 14 scl dummy clock14 start2 scl figure 40-(a). the case of dummy clock14 + start+start+ command input start command from start input. 2 1 8 9 dummy clock 9 start figure 40-(b). the case of start + dummy clock9 + start + command input start normal command normal command normal command normal command start 9 sda sda scl sd 1 2 3 8 9 7 figure 40-(c). start9 + command input normal command normal command sda slave address word address s t a r t first write command a c k h a c k l slave address slave address slave address data write command during internal write, ack = high is returned. after completion of internal write, ack=low is returned, so input next word address and data in succession. t wr t wr second write command s t a r t s t a r t s t a r t s t a r t s t o p s t o p a c k h a c k h a c k l a c k l figure 41. case of continuous write by acknowledge polling datasheet 17/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com wp valid timing (write cancel) wp is usually fixed to 'h' or 'l', but when wp is used to ca ncel write cycle and so on, pay attention to the following wp valid timing. during write cycle execution, inside cancel valid area, by setting wp='h', write cycle can be cancelled. in both byte write cycle and page write cycle, the area fr om the first start condition of command to the rise of clock to take in d0 of data(in page write cycle, the first byte data) is the cancel invalid area. wp input in this area becomes ?don't care?. the area from the rise of scl to take in d0 to the stop condition input is the cancel valid area. furthermore, after the execution of forced end by wp, the ic enters standby status. command cancel by start condition and stop condition during command input, by continuously inputting start condit ion and stop condition, command can be cancelled. (figure 43.) however, within ack output area and during data read, sd a bus may output 'l'. in this case, start condition and stop condition cannot be input, so reset is not available. therefore, execute software reset. when command is cancelled by start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined. therefore, it is not possible to carry out current read cycle in succession. to carry out read cycle in succession, carry out random read cycle. ? rise of d0 taken clock scl d0 ack enlarged view scl sda ack d0 ? rise of sda sda wp wp cancel invalid area wp cancel valid area data is not written. figure 42. wp valid timing slave address d7 d6 d5 d4 d3 d2 d1 d0 data t wr sda d1 s t a r t a c k l a c k l a c k l a c k l s t o p word address figure 43. case of cancel by start, stop condition during slave address input scl sda 1 1 0 0 start condition stop condition enlarged view wp cancel invalid area datasheet 18/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com i/o peripheral circuit 1. pull-up resistance of sda terminal sda is nmos open drain, so it requires a pull up resistor. as for this resistor value (r pu ), select an appropriate value from microcontroller v il , i l , and v ol -i ol characteristics of this ic. if r pu is large, operating fr equency is limited. the smaller the r pu , the larger is the supply current (read). 2. maximum value of r pu the maximum value of r pu is determined by the following factors: (1)sda rise time to be determined by the capacitance (c bus ) of bus line and r pu of sda should be t r or lower. furthermore, ac timing shou ld be satisfied even when sda rise time is slow. (2)the bus? electric potential a to be determined by the input current leak total (i l ) of the device connected to the bus with output of 'h' to the sda line and r pu should sufficiently secure the input 'h' level (v ih ) of microcontroller and eeprom including recommended noise margin of 0.2vcc. v cc - i l r pu - 0.2 v cc R v ih ex.) v cc =3v i l =10a v ih =0.7 v cc from(2) Q 30 [k ] 3. minimum value of r pu the minimum value of r pu is determined by the following factors. (1) when ic outputs low, it should be satisfied that v olmax =0.4v and i olmax =3ma. (2) v olmax =0.4v should secure the input 'l' level (v il ) of microcontroller and eeprom including recommended noise margin 0.1v cc . v olmax Q v il - 0.1 v cc ex.) v cc =3v, v ol =0.4v, i ol =3ma, microcontroller, eeprom v il =0.3v cc from (1) R 867 [ ] and v ol =0.4 [v] v il =0.3 3 =0.9 [v] therefore, the condition (2) is satisfied. 4. pull-up resistance of scl terminal when scl control is made at the cmos output port, there is no need for a pull up resistor. but when there is a time where scl becomes 'hi-z', add a pull up resistor. as for the pull up resistor value, one of several k to several ten k is recommended in consideration of drive per formance of output port of microcontroller. figure 44. i/o circuit diagram microcontroller r pu a sda terminal i l i l bus line capacity c bus br24gxx r pu Q 0.8v cc v ih i l r pu Q 0.8 3 0.7 3 1010 -6 r pu R v cc -v ol r pu Qi ol v cc v ol i ol r pu R 3 0.4 3 10 3 datasheet 19/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15? 001 www.rohm.com cautions on microcontroller connection 1. r s in i 2 c bus, it is recommended that sda por t is of open drain input/output. however, when using cmos input / output of tri state to sda port, insert a series resistance r s between the pull up resistor r pu and the sda terminal of eeprom. this is to control over current that may occur when pmos of the microcontroller and nm os of eeprom are turned on simultaneously. r s also plays the role of protecting the sda terminal against surge. therefore, even when sda port is open drain input/output, r s can be used. 2. maximum value of r s the maximum value of r s is determined by the following relations: (1) sda rise time to be determined by the capacitance (c bus ) of bus line and r pu of sda should be t r or lower. furthermore, ac timing shou ld be satisfied even when sda rise time is slow. (2) the bus? electric potential a to be determined by r pu and r s the moment when eeprom outputs 'l' to sda bus should sufficiently secure the input 'l' level (v il ) of microcontroller including recommended noise margin of 0.1vcc. ex) v cc =3v v il =0.3v cc v ol =0.4v r pu =20k ? 3. minimum value of r s the minimum value of r s is determined by over current at bus collision. when over current flows, noises in power source line and instantaneous power failure of power source may o ccur. when allowable over current is defined as i, the following relation must be satisfied. determine the allowable cu rrent in consideration of t he impedance of power source line in set and so forth. set the over current to eeprom at 10ma or lower. ex) v cc =3v i=10ma (v cc v ol )r s r pu +r s r pu microcontroller r s eeprom figure 45. i/o circuit diagram figure 46. input / output collision timing a ck 'l' output of eeprom 'h' output of microcontroller over current flows to sda line by 'h' output of microcontroller and 'l' output of eeprom. scl sda microcontroller eeprom 'l'output r s r pu 'h' output over current i figure 48. i/o circuit diagram figure 47. i/o circuit diagram r pu micro controller r s eeprom i ol a bus line capacity c bus v ol v cc v il +v ol +0.1v cc Qv il r s Q r pu v il v ol 0.1v cc 1.1v cc v il Q1.67 [k?] r s Q 0.3 3 0.4 0.1 3 1.1 3 0.3 3 2010 3 r s R 3 1010 3 R300 [ ?] v cc r s Qi r s R v cc i datasheet 20/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com i/o equivalence circuit 1. input (scl, wp) 2. input / output (sda) figure 49. input pin circuit diagram figure 50. input / output pin circuit diagram datasheet 21/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com power-up/down conditions at power on, the ic?s internal circuits may go through unstabl e low voltage area as the vcc rises, making the ic?s internal logic circuit not completely reset, hence, malfunction may occur. to prevent this, the ic is equipped with por circuit and lvcc circuit. to assure the operation, obser ve the following conditions at power on. 1. set sda = 'h' and scl ='l' or 'h? 2. start power source so as to satisfy the recommended conditions of t r , t off , and v bot for operating por circuit. t off t r v bot 0 v cc 3. set sda and scl so as not to become 'hi-z'. when the above conditions 1 and 2 cannot be obs erved, take the following countermeasures. (1) in the case when the above condition 1 cannot be observed such that sda becomes 'l' at power on . control scl and sda as shown below, to make scl and sda, 'h' and 'h'. (2) in the case when the above condition 2 cannot be observed. after power source becomes stable, execute software reset(page 16). (3) in the case when the above conditions 1 and 2 cannot be observed. carry out (1), and then carry out (2). low voltage malfunction prevention function lvcc circuit prevents data rewrite operation at low power, and pr events write error. at lvcc voltage (typ=1.2v) or below, data rewrite is prevented. noise countermeasures 1. bypass capacitor when noise or surge gets in the power source line, malfunct ion may occur, therefore, it is recommended to connect a bypass capacitor (0.1f) between the ic?s v cc and gnd pins. connect the capacitor as close to the ic as possible. in addition, it is also recommended to connect a bypass capacitor between board?s v cc and gnd. recommended conditions of t r , t off ,v bot t r t off v bot 10ms or below 10ms or larger 0.3v or below 100ms or below 10ms or larger 0.2v or below figure 51. rise waveform diagram fig ure 52. when scl= 'h' and sda= 'l' fig ure 53. when scl='l' and sda='l' t low t su:dat t dh a fter vcc becomes stable scl v cc sda t su:dat a fter vcc becomes stable datasheet 22/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com operational notes 1. described numeric values and data are design represent ative values only, and the va lues are not guaranteed. 2. we believe that the application circuit examples in this document are recommendable. howe ver, in actual use, confirm characteristics further sufficiently. if changing the fixed num ber of external parts is desired, make your decision with sufficient margin in consideration of st atic characteristics, transient characteri stics, and fluctuations of external parts and our lsi. 3. absolute maximum ratings if the absolute maximum ratings such as supply voltage, operating temperature range, and so on are exceeded, lsi may be destroyed. do not supply voltage or subject the ic to temperatures exceeding the absolute maximum ratings. in the case of fear of exceeding the absolute maximum rati ngs, take physical safety countermeasures such as adding fuses, and see to it that conditions exceeding the absol ute maximum ratings should not be supplied to the lsi. 4. gnd electric potential set the voltage of gnd terminal lowest at any operating condition. make sure that each terminal voltage is not lower than that of gnd terminal. 5. thermal design use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (pd) in actual operating conditions. 6. short between pins and mounting errors be careful when mounting the ic on printed circuit boards. the ic may be damaged if it is mounted in a wrong orientation or if pins are shorted toget her. short circuit may be caused by conductive particles caught between the pins. 7. operating the ic in the presence of strong electromagnetic field may ca use malfunction, ther efore, evaluate design sufficiently. datasheet 23/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com part numbering b r 2 4 g 1 6 x x x - 3 x x bus type 24i 2 c operating temperature/ power source voltage -40 to+85 / 1.6v to 5.5v capacity 16=16k package blank :dip-t8 f :sop8 fj :sop-j8 fv : ssop-b8 fvt : tssop-b8 fvj : tssop-b8j fvm : msop8 nux : vson008x2030 process code packaging and forming specification e2 : embossed tape and reel (sop8,sop-j8, ssop-b8,tssop-b8, tssop-b8j) tr : embossed tape and reel (msop8, vson008x2030) none : tube (dip-t8) datasheet 24/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com physical dimensions tape and reel information ? order quantity needs to be multiple of the minimum quantity. datasheet 25/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com ? order quantity needs to be multiple of the minimum quantity. datasheet 26/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com ? order quantity needs to be multiple of the minimum quantity. datasheet 27/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com ? order quantity needs to be multiple of the minimum quantity. datasheet 28/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com direction of feed reel ? order quantity needs to be multiple of the minimum quantity. datasheet 29/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com direction of feed reel ? order quantity needs to be multiple of the minimum quantity. datasheet 30/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com direction of feed reel ? order quantity needs to be multiple of the minimum quantity. datasheet 31/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com ? order quantity needs to be multiple of the minimum quantity. datasheet 32/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com marking diagrams (top view) dip-t8 (top view) part number marking lot numbe r sop8 (top view) part number marking lot number sop-j8 (top view) part number marking tssop-b8 (top view) part number marking lot number 1pin mark tssop-b8j (top view) part number marking lot numbe r 1pin mark ssop-b8 (top view) part number marking 1pin mark vson008x2030 (top view) part number marking lot numbe r 1pin mark msop8 (top view) part number marking lot number 1pin mark 1pin mark lot number lot number 1pin mark br24g16 4g16 4 g e 4 g 1 6 4g16 4g1 6 3 4ge 4g1 6 3 datasheet 33/33 br24g16-3 tsz02201-0r2r0g100200-1-2 25.feb.2013 rev.002 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 www.rohm.com revision history date revision changes 15.jun.2012 001 new release 25.feb.2013 002 update some english words, sentences? descriptions, grammar and formatting. add tf2 in ac characteristic and serial input / output timing datasheet datasheet notice - rev.004 ? 2013 rohm co., ltd. all rights reserved. notice general precaution 1) before you use our products, you are requested to care fully read this document and fully understand its contents. rohm shall not be in any way responsible or liable for fa ilure, malfunction or accident arising from the use of any rohm?s products against warning, caution or note contained in this document. 2) all information contained in this document is current as of the issuing date and subjec t to change without any prior notice. before purchasing or using rohm?s products, please confirm the la test information with a rohm sales representative. precaution on using rohm products 1) our products are designed and manufactured for applicat ion in ordinary electronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring extremel y high reliability (such as medical equipment, transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (?specific applications?), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hm?s products for specific applications. 2) rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3) our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohm?s products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4) the products are not subjec t to radiation-proof design. 5) please verify and confirm characteristics of the final or mounted products in using the products. 6) in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse) is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7) de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8) confirm that operation temperature is within t he specified range described in the product specification. 9) rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. datasheet datasheet notice - rev.004 ? 2013 rohm co., ltd. all rights reserved. precaution for mounting / circuit board design 1) when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2) in principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification precautions regarding application examples and external circuits 1) if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2) you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own indepen dent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1) product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2) even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3) store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4) use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohm?s internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1) all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2) no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. datasheet datasheet notice - rev.004 ? 2013 rohm co., ltd. all rights reserved. other precaution 1) the information contained in this document is provi ded on an ?as is? basis and rohm does not warrant that all information contained in this document is accurate and/or error-free. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or concerning such information. 2) this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 3) the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 4) in no event shall you use in any way whatsoever the pr oducts and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 5) the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. |
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