cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 1/8 MTA90N03ZN3 cystek product specification 30v n-channel enhancement mode mosfet MTA90N03ZN3 bv dss 30v i d 3.2a r dson @v gs =4.5v, i d =2.5a 130m (typ) features r dson @v gs =3v,i d =2.5a 144m (typ) ? simple drive requirement. ? small package outline. ? esd protected. ? pb-free lead plating and halogen-free package. symbol outline absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 12 v continuous drain current @ t a =25 c , v gs =4.5v 3.2 continuous drain current @ t a =70 c, v gs =4.5v i d 2.6 pulsed drain current (notes 1, 2) i dm 10 a p d 1.38 (note 3) w maximum power dissipation@ t a =25 linear derating factor 0.01 w/ c esd susceptibility 1000 (note 4) v operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width limited by maximum junction temperature. 2. pulse width 300 s, duty cycle 2%. 3. surface mounted on 1 in2 copper pad of fr-4 board, t 10s. 4. human body model, 1.5k in series with 100pf. MTA90N03ZN3 sot-23 g gate s source d drain g s d
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 2/8 MTA90N03ZN3 cystek product specification thermal performance parameter symbol limit unit thermal resistance, j unction-to-ambient(pcb mounted) rth,ja 90 c/w note : surface mounted on 1 in2 c opper pad of fr-4 board, 270 c/w when mounted on minimum copper pad. electrical characteristics (tj=25 c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, i d =250 a v gs(th) 0.5 0.9 1.5 v v ds =v gs , i d =250 a i gss - - 10 v gs = 12v, v ds =0 - - 1 v ds =30v, v gs =0 i dss - - 10 a v ds =24v, v gs =0 (tj=70 c) - 130 160 v gs =4.5v, i d =2.5a *r ds(on) - 145 180 m v gs =3v, i d =2.5a *g fs - 5.4 - s v ds =3v, i d =1.6a dynamic ciss - 309 - coss - 50 - crss - 38 - pf v ds =10v, v gs =0, f=1mhz t d(on) - 15 - t r - 35 - t d(off) - 51 - t f - 27 - ns v ds =15v, i d =500ma, v gs =2.5v, r g =6 qg - 8 - qgs - 0.8 - qgd - 2.8 - nc v ds =15v, i d =3.2a, v gs =4.5v source-drain diode *v sd - 0.8 1.2 v v gs =0v, i s =1a *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping MTA90N03ZN3-0-t1-g sot-23 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 3/8 MTA90N03ZN3 cystek product specification typical characteristics typical output characteristics 0 2 4 6 8 10 00 . 511 . 5 2 v gs =3v v gs =10v v ds , drain-source voltage(v) i d , drain current (a) v gs =4.5v v =2.5v gs v gs =2v v gs =1.8 v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 0 50 100 150 200 250 300 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3v v gs =2v v gs =4.5v reverse drain current vs source-drain voltage 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 i dr , reverse drain current (a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 50 100 150 200 250 300 024681 0 drain-source on-state resistance vs junction tempearture 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =4.5v, i d =2.5a v gs =3v, i d =2.5a v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =2.5a i d =100ma
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 4/8 MTA90N03ZN3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) v gs( th) , normalized threshold voltage i d =250 a single pulse power rating, junction to ambient (note on page 2) 0 2 4 6 8 10 0.01 0.1 1 10 100 pulse width(s) power (w) t j( m ax) =150c t a =25c r ja =90c/w forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =5v v d s =3v maximum safe operating area 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =4.5v, r ja =90c/w single pulse maximum drain current vs junctiontemperature 0 0.5 1 1.5 2 2.5 3 3.5 4 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =4.5v, r ja =90c/w
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 5/8 MTA90N03ZN3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0.01 0.1 1 10 100 1000 10000 00.511.522.5 v gs , gate-source voltage(v) i d , drain current (ma) v ds =3v 150c 25c 0c -40c power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t) 4.r ja =90 c/w
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 6/8 MTA90N03ZN3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 7/8 MTA90N03ZN3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c831n3 issued date : 2012.07.04 revised date : 2012.12.28 page no. : 8/8 MTA90N03ZN3 cystek product specification sot-23 dimension *: typical h j k d a l g v c b 3 2 1 s style: pin 1.gate 2.source 3.drain marking: te 3-lead sot-23 plastic surface mounted package cystek package code: n3 2306 inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1102 0.1204 2.80 3.04 j 0.0032 0.0079 0.08 0.20 b 0.0472 0.0669 1.20 1.70 k 0.0118 0.0266 0.30 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1161 2.10 2.95 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.0000 0.0040 0.00 0.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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