description the CXP84700 is a cmos 8-bit single chip micro- computer of piggyback/evaluator combined type, which is developed for evaluating the function of the cxp84716/84720/84724. features a wide instruction set (213 instructions) which covers various types of data. 16-bit operation/multiplication and division/ boolean bit operation instructions minimum instruction cycle 333ns at 12mhz operation (3.0 to 5.5v) 250ns at 16mhz operation (4.5 to 5.5v) applicable eprom lcc type 27c512 (maximum 60k bytes are available.) incorporated ram capacity 2144 bytes peripheral functions ?a/d converter 8 bits, 8 channels, successive approximation method (conversion time of 1.6 s/16mhz) ?serial interface start-stop sync type (uart), 1 channel incorporated buffer ram (auto transfer for 1 to 32 bytes), 2 channels 8-bit clock sync type (msb/lsb first selectable), 1 channel ?timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer, 16-bit capture timer/counter ?high precision timing pattern generator ppg: maximum of 11-pins, 16-stages programmable, 2 channels ?pwm output 8 bits, 8 channels ?frc capture unit incorporated 24-bit and 6-stage fifo interruption 19 factors, 15 vectors, multi-interruption possible standby mode sleep/stop package 100-pin ceramic pqfp note) mask option depends on the type of the CXP84700. refer to the products list for details. structure silicon gate cmos ic ?1 CXP84700 e96z12-ps cmos 8-bit single chip microcomputer sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. piggyback/ evaluator 100 pin pqfp (ceramic) qfp supported lqfp supported
?2 CXP84700 pin assignment in piggyback mode (qfp package) note) 1. nc (pin 90) is left open. 2. v ss (pins 41 and 88) are both connected to gnd. pf3 pf4 pf5 pf6/txd pf7/rxd pd0/ppo0 pd1/ppo1 pd2/ppo2 pd3/ppo3 pd4/ppo4 pd5/ppo5 pd6/ppo6 pd7/ppo7 pc0 pc1 pc2 pc3 pc4 pc5 pc6 pc7 ph0/ppo8 ph1/ppo9 ph2/ppo10 ph3/ppo11 ph4/ppo12 ph5/ppo13 ph6/ppo14 ph7/ppo15 pj0/ppo16 pi1/int1 pi0/int0 pe7/to pe6 pe5 pe4 pe3/nmi pe2 pe1/ec1 pe0/ec0 pb7/so1 pb6/si1 pb5/sck1 pb4/cs1 pb3 pb2 pb1 pb0/cint so0 si0 sck0 cs0 pa7 pa6 pa5 pa4 pa3/an7 pa2/an6 pa1/an5 pa0/an4 pj1/ppo17 pj2/ppo18 pj3/ppo19 pj4/ppo20 pj5/ppo21 pj6/exi0 pj7/exi1 rst extal xtal vss exi2 exi3 avss av ref av dd an0 an1 an2 an3 pf2 pf1 pf0 pg7/pwm7 pg6/pwm6 pg5/pwm5 pg4/pwm4 pg3/pwm3 pg2/pwm2 pg1/pwm1 nc v dd v ss pg0/pwm0 pi7/so2 pi6/si2 pi5/sck2 pi4/int4 pi3/int3 pi2/int2 a8 a9 a11 nc oe a10 ce d7 d6 a6 a5 a4 a3 a2 a1 a0 nc d0 a7 a12 a15 nc v dd a14 a13 d1 d2 gnd nc d3 d4 d5 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 40 39 38 37 36 35 34 31 32 33 41 42 43 44 45 46 47 48 50 51 52 53 54 55 56 57 58 59 60 70 69 68 67 63 64 65 66 61 62 71 72 73 74 75 76 77 78 79 80 81 82 83 84 88 87 86 85 89 90 10 0 99 98 97 96 95 94 91 92 93 49
?3 CXP84700 pin assignment in piggyback mode (lqfp package) note) 1. nc (pin 88) is left open. 2. v ss (pins 39 and 86) are both connected to gnd. a a pe6 pe5 pe4 pe3/nmi pe2 pe1/ec1 pe0/ec0 pb7/so1 pb6/si1 pb5/sck1 pb4/cs1 pb3 pb2 pb1 pb0/cint so0 si0 sck0 cs0 pa7 pa6 pa5 pa4 pa3/an7 pa2/an6 pf5 pf6/txd pf7/rxd pd0/ppo0 pd1/ppo1 pd2/ppo2 pd3/ppo3 pd4/ppo4 pd5/ppo5 pd6/ppo6 pd7/ppo7 pc0 pc1 pc2 pc3 pc4 pc5 pc6 pc7 ph0/ppo8 ph1/ppo9 ph2/ppo10 ph3/ppo11 ph4/ppo12 ph5/ppo13 ph6/ppo14 ph7/ppo15 pj0/ppo16 pj1/ppo17 pj2/ppo18 pj3/ppo19 pj4/ppo20 pj5/ppo21 pj6/exi0 pj7/exi1 rst extal xtal vss exi2 exi3 avss av ref av dd an0 an1 an2 an3 pa0/an4 pa1/an5 pf4 pf3 pf2 pf1 pf0 pg7/pwm7 pg6/pwm6 pg5/pwm5 pg4/pwm4 pg3/pwm3 pg2/pwm2 pg1/pwm1 nc v dd vss pg0/pwm0 pi7/so2 pi6/si2 pi5/sck2 pi4/int4 pi3/int3 pi2/int2 pi1/int1 pi0/int0 pe7/to 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 1 51 52 53 54 55 56 57 58 59 60 70 69 68 67 63 64 65 66 61 62 71 72 73 74 75 76 77 78 79 80 81 82 83 84 88 87 86 85 89 90 10 0 99 98 97 96 95 94 91 92 93 2 3 4 5 6 7 8 9 10 11 12 13 14 1 15 16 17 18 19 20 21 22 23 24 25 26 27 28 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 gnd v dd a14 a13 a8 a9 a11 oe a10 ce d7 d6 d5 d4 d3 26 27 28 29 30 33 50 40 39 38 37 36 35 34 31 32 41 42 43 44 45 46 47 48 49
?4 CXP84700 pin assignment in evaluator mode (qfp package) note) 1. nc (pin 90) is left open. 2. v ss (pins 41 and 88) are both connected to gnd. pf3 pf4 pf5 pf6/txd pf7/rxd pd0/ppo0 pd1/ppo1 pd2/ppo2 pd3/ppo3 pd4/ppo4 pd5/ppo5 pd6/ppo6 pd7/ppo7 pc0 pc1 pc2 pc3 pc4 pc5 pc6 pc7 ph0/ppo8 ph1/ppo9 ph2/ppo10 ph3/ppo11 ph4/ppo12 ph5/ppo13 ph6/ppo14 ph7/ppo15 pj0/ppo16 pi1/int1 pi0/int0 pe7/to pe6 pe5 pe4 pe3/nmi pe2 pe1/ec1 pe0/ec0 pb7/so1 pb6/si1 pb5/sck1 pb4/cs1 pb3 pb2 pb1 pb0/cint so0 si0 sck0 cs0 pa7 pa6 pa5 pa4 pa3/an7 pa2/an6 pa1/an5 pa0/an4 pj1/ppo17 pj2/ppo18 pj3/ppo19 pj4/ppo20 pj5/ppo21 pj6/exi0 pj7/exi1 rst extal xtal vss exi2 exi3 avss av ref av dd an0 an1 an2 an3 pf2 pf1 pf0 pg7/pwm7 pg6/pwm6 pg5/pwm5 pg4/pwm4 pg3/pwm3 pg2/pwm2 pg1/pwm1 nc v dd v ss pg0/pwm0 pi7/so2 pi6/si2 pi5/sck2 pi4/int4 pi3/int3 pi2/int2 a8 a9 a11 nc halt a10 e/p i/t mon a6/d6 a5/d5 a4/d4 a3/d3 a2/d2 a1/d1 a0/d0 nc rd a7/d7 a12 a15 nc v dd a14 a13 wr sync gnd nc c2 c1 rst 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 40 39 38 37 36 35 34 31 32 33 41 42 43 44 45 46 47 48 50 51 52 53 54 55 56 57 58 59 60 70 69 68 67 63 64 65 66 61 62 71 72 73 74 75 76 77 78 79 80 81 82 83 84 88 87 86 85 89 90 10 0 99 98 97 96 95 94 91 92 93 49
?5 CXP84700 pin assignment in evaluator mode (lqfp package) note) 1. nc (pin 88) is left open. 2. v ss (pins 39 and 86) are both connected to gnd. aa pe6 pe5 pe4 pe3/nmi pe2 pe1/ec1 pe0/ec0 pb7/so1 pb6/si1 pb5/sck1 pb4/cs1 pb3 pb2 pb1 pb0/cint so0 si0 sck0 cs0 pa7 pa6 pa5 pa4 pa3/an7 pa2/an6 pf5 pf6/txd pf7/rxd pd0/ppo0 pd1/ppo1 pd2/ppo2 pd3/ppo3 pd4/ppo4 pd5/ppo5 pd6/ppo6 pd7/ppo7 pc0 pc1 pc2 pc3 pc4 pc5 pc6 pc7 ph0/ppo8 ph1/ppo9 ph2/ppo10 ph3/ppo11 ph4/ppo12 ph5/ppo13 ph6/ppo14 ph7/ppo15 pj0/ppo16 pj1/ppo17 pj2/ppo18 pj3/ppo19 pj4/ppo20 pj5/ppo21 pj6/exi0 pj7/exi1 rst extal xtal vss exi2 exi3 avss av ref av dd an0 an1 an2 an3 pa0/an4 pa1/an5 pf4 pf3 pf2 pf1 pf0 pg7/pwm7 pg6/pwm6 pg5/pwm5 pg4/pwm4 pg3/pwm3 pg2/pwm2 pg1/pwm1 nc v dd vss pg0/pwm0 pi7/so2 pi6/si2 pi5/sck2 pi4/int4 pi3/int3 pi2/int2 pi1/int1 pi0/int0 pe7/to 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 1 51 52 53 54 55 56 57 58 59 60 70 69 68 67 63 64 65 66 61 62 71 72 73 74 75 76 77 78 79 80 81 82 83 84 88 87 86 85 89 90 10 0 99 98 97 96 95 94 91 92 93 26 27 28 29 30 33 50 40 39 38 37 36 35 34 31 32 41 42 43 44 45 46 47 48 49 2 3 4 5 6 7 8 9 10 11 12 13 14 1 15 16 17 18 19 20 21 22 23 24 25 26 27 28 a15 a12 a7/d7 a6/d6 a5/d5 a4/d4 a3/d3 a2/d2 a1/d1 a0/d0 rd wr sync gnd v dd a14 a13 a8 a9 a11 halt a10 e/p i/t mon rst c1 c2
?6 CXP84700 eprom read timing (ta = ?0 to +75?, v dd = 3.0 to 5.5v, vss = 0v reference) address ? data hold time address ? data input delay time item symbol pin min. max. unit t ih t acc a0 to a15 d0 to d7 a0 to a15 d0 to d7 0 100 * 1 75 * 2 ns ns t acc t ih 0.8v dd 0.8v dd 0.2v dd 0.2v dd input data address data a0 to a15 d0 to d7 products list * 1 at 12mhz operation (v dd = 4.5 to 5.5v) * 2 at 12mhz operation (v dd = 3.0 to 5.5v), at 16mhz operation (v dd = 4.5 to 5.5v) products package pull-up resistor for reset pin power-on-reset circuit mask product piggyback/evaluator product option item 100-pin plastic qfp/lqfp 100-pin ceramic pqfp existent/non-existent existent/non-existent cxp84720 cxp84724 CXP84700-u01q CXP84700-u01r 16k bytes 20k bytes eprom 60k bytes 24k bytes 27c512 1 existent cxp84716 rom capacity existent
?7 CXP84700 pin 1 index pin 1 marking lcc type eprom pin 1 marking piggyback mode piggyback/evaluator product evaluator mode cpu probe note) note) eprom adaptor pin 1 marking cpu probe for lqfp pin 1 index evaluation cap should be connected to cpu probe. piggyback mode/evaluator mode can be switched as shown below.
?8 CXP84700 package outline unit: mm sony code eiaj code jedec code package structure package material lead treatment lead material package weight ceramic gold plating 42 alloy 10.44 max 0.50 0.25 0.15 ?0.02 + 0.05 3.57 0.36 18.7 16.3 0.2 100 81 31 50 80 51 1 30 9.48 11.66 15.58 0.2 24.7 22.3 0.25 6.0 4.5 0.3 1.27 0.13 12.02 14.22 18.12 0.2 pin no. 1 index index pqfp-100c-l01 aqfp100-c-0000-a 100pin pqfp (ceramic) 81 80 51 1 30 100 50 31 0.3 0.08 0.65 0.05 pin no. 1 index 0.7 1.0 1.3 0.3 0.45 5.7g sony code eiaj code jedec code package structure package material lead treatment lead material package weight ceramic gold plating 42 alloy 2.2g pqfp-100c-l02 aqfp100-c-1414-a 100pin pqfp (ceramic) 16.0 0.4 14.0 0.2 12.8 0.2 25 1 51 75 50 26 76 100 index 0.18 ?0.03 + 0.08 0.5 0.05 12.0 0.15 1.5 3.2 0.2 0.2 ?0.13 + 0.15 0.127 ?0.02 + 0.05 3.32 6.9 0.18 ?0.03 + 0.08 0.5 0.05 12.0 0.15 12.4 index 0.8 0.2
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