hi-8787, hi-8788 description features pin configuration the hi-8787 and hi-8788 are system components for interfacing 16 bit parallel data to an arinc 429 bus. they combine logic and line driver on one chip. the hi-8787 has an output resistance of 37.5 ohms, and the hi-8788 has output resistance of 10 ohms to facilitate external lightning protection circuitry. the technology is analog/digital cmos. both products offer high speed data bus transactions into a buffer register. after loading 2 each 16-bit words, data is automatically transferred and transmitted. the data rate is equal to the clock rate. parity can be enabled in the 32nd bit. reset is used to initialize the logic upon startup. word gaps are sent automatically. the part requires +/- 10 volt supplies in addition to a 5 volt supply. automatically converts 16 bit parallel data to arinc 429 or 561 serial data high speed data bus interface on-chip line driver available in small tqfp package industrial and extended temperature ranges 32-pin plastic pqfp package 24 - txbout 23 - txaout 22 - v- 21 - parity enb 20 - xmt rdy 19 - xmit clk 18 - 17 - reset write d4-1 n/c - 2 d5-3 d6-4 d7-5 d8-6 d9-7 d10 - 8 d11 - 9 d12 - 10 gnd - 11 a0 - 12 d13 - 13 d14 - 14 d15 - 15 slp1.5 - 16 32 - d3 31 - d2 30 - d1 29 - d0 28 - 561 sync 27 - vcc 26 - v+ 25 - 561 data hi-8787pqi hi-8787pqt hi-8788pqi & hi-8788pqt (ds8787 rev. j) 02/09 arinc 429 & 561 interface device 16 bit parallel data in / arinc serial data out february 2009 holt integrated circuits www.holtic.com
hi-8787, hi-8788 pin descriptions functional description pin symbol function description 28 561 sync digital output arinc 561 sync signal 1, 3-10,13-15, 29-32 dn digital inputs parallel 16 bit bus input 11 gnd power supply ground 12 a0 digital input load address, a0=1 for 1st data load, a0=0 for 2nd data load 16 slp1.5 digital input selects the slope of the line driver. high=1.5us 17 digital input write strobe. loads data on rising edge. 18 digital input registers and sequencing logic initialized when low 19 xmit clk digital input clock input for the transmitter 20 xmt rdy digital output goes high if the buffer register is empty 21 parity enb digital input when high the 32nd bit output is odd parity 22 v- power supply -10 volt rail 23 txaout analog output line driver output - a side 24 txbout analog output line driver outpu t - b side 25 561 data digital output serial output for arinc 561 data 26 v+ power supply +10 volt rail 27 vcc power supply +5 volt rail, ?one? level out of line driver, inverted for ?zero? write reset the hi-8787 is a parallel to serial converter, which when loaded with two 16 bit parallel words, outputs the data as a 32 bit serial word. timing circuitry insert s a 4 bit gap at the end of each 32 bit word. an input buffer register allows load operations to take place while the previously loaded word is being transmitted. if the parity enb pin is high, the 32nd bit will be a parity bit, inserted so as to make the 32 bit word have odd parity. if the parity enb pin is low, the 32nd bit will be the d15 bit of the 2nd word loaded. outputs are provided for both arinc 429 (txaout and txbout pins) and arinc 561 (561 data and 561 sync pins) type data. a low signal applied to the pin resets the hi-8787?s internal logic so that spurious transmission does not take place during power-up. the registers are cleared so that a continuous gap will be transmitted until the first word is loaded into the transmitter. the xmit clk frequency is the same as the data rate. reset input data can be loaded when the xmt rdy signal is high, which indicates the input buffer register is empty. the first 16 bit word is loaded with the a0 input high. the sec- ond word is loaded with a0 in the low state. each data word is loaded into the input buffer register by a low pulse on the input. after the second word has been loaded, the xmt rdy output goes low. the contents of the input buffer register are transferred to the output register during the fourth bit period of the gap. if the fourth gap bit period of the previous word has already been transmitted, the contents of the input buffer register will be transferred to the output shift register during the first bit period after the second data load, and the xmt rdy out- put goes high. after the output shift register is loaded, the data is shifted out to the output logic in the order shown in figure 2. once a0 is set low, it must not go high until after the second byte is loaded. the 561 sync output pulses low when the xmit clk is low during the 8th bit of the arinc transmission. write holt integrated circuits 2
hi-8787, hi-8788 functional description (cont.) the hi-8787 and hi-8788 have an on-chip line driver de- signed to directly drive the arinc 429 bus. the two arinc outputs (txaout and txbout) provide a differential volt- age to produce a +10 volt one, a -10 volt zero, and a 0 volt null. the slope of the arinc outputs is controlled by the slp1.5 pin. if slp1.5 is high, the output rise and fall time is nominally 1.5s. if slp1.5 is set low, the rise and fall times are 10s. the hi-8787 has 37.5 ohms in series with each line driver output. the hi-8788 has 10.0 ohms in series. the hi-8788 is for applications where external series resistance is needed, typically for lightning protection devices. transmitter operation write set t ah asw t t hld t wpw t data bus a0 xmt rdy word 1 valid asw t word 2 valid xd t wpd t a0 load data bus arinc bits 1 word 1 d0 - d15 arinc 1 - arinc 16 0 word 2 d0 - d15 arinc 17 - arinc 32 figure 2. order of transmitted data figure 1. block diagram data bus 16 to 32 bit mux 32 bit buffer register 32 bit shift register write a0 16 32 32 status & control logic xmt rdy xmit clk word gap counter bit counter output logic line driver parity enb 561 data 561 sync txbout txaout slp1.5 power supply sequencing the power supplies must be controlled to prevent large currents during supply turn-on and turn-off. the required sequence is v+ followed by vcc, always ensuring that v+ is the most positive supply. the v- supply is not critical and can be asserted at any time. holt integrated circuits 3
phlx t phlx t plhx t plhx t 0v 10v -10v rx t t fx 10% 90% t 10% 90% t rx 10% fx differential voltage txaout - txbout line driver outputs xmt clk 32 33 34 2 35361234 3132333435361 gap write xmt rdy gap data transmission - example pattern 561 sync 561 sync 561 data arinc 429 data (txaout-txbout) xmit clk hi-8787, hi-8788 holt integrated circuits 4
hi-8787, hi-8788 note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. voltages referenced to ground supply voltages v+.................................................12.5v v-.................................................-12.5v dc current per input pin................ +10ma power dissipation at 25 plastic dil............1.0w, derate 10mw/c ceramic dil..........0.5w, derate 7mw/c solder temperature ........275c for 10 sec storage temperature........-65c to +150c vcc.................................................. 7v absolute maximum ratings recommended operating conditions supply voltages v+ ...................................... +10v... 5% v- ........................................ -10v... 5% temperature range industrial ....................... -40c to +85c extended .................... -55c to +125c vcc ....................................... 5v... 5% dc electrical characteristics vcc = 5.0v, v = 0v, v+ = 10v, v- = -10v, t = operating temperature range (unless otherwise specified). ss a hi-8787, hi-8788 parameter symbol condition min typ max units operating voltage v 4.75 5 5.25 v min. input voltage (hi) v 2.0 1.4 v max. input voltage (lo) v 1.4 0.7 v min. input current (hi) i v = 4.9v 280 a max. input current (lo) i v = 0.1v -1 a min. output voltage (hi) v i = -1.6ma 2.7 v max. output voltage (lo) v i = 1.6ma 0.4 v operating current drain i f = 100khz 0.8 2.8 ma input capacitance c not tested 20 pf cc cc operating voltage v+ 9.5 10 10.5 v operating voltage v- -9.5 -10 10.5 v line driver output levels (ref. to gnd) one no load, vcc = 5.0v 4.5 5.0 5.5 v null ? -0.25 0 0.25 v zero -5.5 -5.0 -4.5 v line driver output levels (differential txaout - txbout) one no load, vcc = 5.0v 9.0 10.0 11.0 v null ? -0.5 0 0.5 v zero ? -11.0 -10.0 -9.0 v minimum short circuit sink or source current i momentary magnitude 80 ma operating current drain (v+) i f = 100khz 6 20 ma operating current drain (v-) i f = 100khz -20 -6 ma ih il ih ih il il oh out ih out in out dd ee holt integrated circuits 5
10 ohms 27.5 ohms 37.5 ohms 0 part number 8787 8788 output series resistance built-in required externally package description 32 pin plastic quad flat pack pqfp (32ptqs) part number pq temperature range flow burn in -40c to +85c no i -55c to +125c no t part number t i part number 100% matte tin (pb-free, rohs compliant) f tin / lead (sn / pb) solder blank lead finish ordering information hi - 87xx xx x x parameter symbol test conditions min typ max units t t t t t t setup data bus to 20 ns hold 30 ns hold a0 to 0ns pulse width 40 1 clk ns delay between setup a0 to 20 ns delay last 80 ns line driver propagation delay no load output high to low tphlx - 500 - ns output low to high tplhx - 500 - ns line driver transition times output high to low t fx slp1.5 = logic 1 1.0 1.5 2.0 s output low to high t rx slp1.5 = logic 1 1.0 1.5 2.0 s output high to low t fx slp1.5 = logic 0 5 10 15 s output low to high t rx slp1.5 = logic 0 5 10 15 s data bus timing line driver timing write set wpd to data bus 40 ns to xmt rdy write write write write write write hld ah wpw asw xd t vcc = 5.0v, v+ = 10v, v- = -10v, v = 0v, t =operating temperature range (unless otherwise specified). ss a ac electrical characteristics hi-8787, hi-8788 holt integrated circuits 6
revision history revision date description of change ds8787, rev. j 02/04/09 clarified the extended temperature ranges and the power supply nomenclatures in the power sequencing description. hi-8787, hi-8788 holt integrated circuits 7
hi-8787, hi-8788 package dimensions 32 pin plastic quad flat pack (pqfp) inches (millimeters) package type: 32ptqs .354 (9.00) bsc sq .047 (1.20) .0315 (0.80) .015 .003 (0.375 .075) .0395 .015 (1.00 .03) .004 (.100) .004 .002 (0.10 .05) 0 7 .276 (7.00) bsc sq see detail a detail a .006 (0.150) .024 .006 (0.60 .15) .006 .002 (0.152 .051) max r ref r ref bsc bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) holt integrated circuits 8
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