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  irfr/u13n15d smps mosfet hexfet ? power mosfet v dss r ds(on) max i d 150v 0.18 w 14a parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 14 i d @ t c = 100c continuous drain current, v gs @ 10v 9.8 a i dm pulsed drain current ? 56 p d @t c = 25c power dissipation 86 w linear derating factor 0.57 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt ? 3.8 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c absolute maximum ratings d-pak IRFR13N15D i-pak irfu13n15d l high frequency dc-dc converters benefits applications l low gate-to-drain charge to reduce switching losses l fully characterized capacitance including effective c oss to simplify design, (see app. note an1001) l fully characterized avalanche voltage and current typical smps topologies l telecom 48v input active clamp forward converter www.freescale.net.cn 1 / 10
parameter min. typ. max. units conditions g fs forward transconductance 5.0 CCC CCC s v ds = 50v, i d = 8.3a q g total gate charge CCC 19 29 i d = 8.3a q gs gate-to-source charge CCC 5.5 8.2 nc v ds = 120v q gd gate-to-drain ("miller") charge CCC 9.4 14 v gs = 10v, ? t d(on) turn-on delay time CCC 8.0 CCC v dd = 75v t r rise time CCC 26 CCC i d = 8.3a t d(off) turn-off delay time CCC 12 CCC r g = 11 w t f fall time CCC 11 CCC v gs = 10v ? c iss input capacitance CCC 620 CCC v gs = 0v c oss output capacitance CCC 130 CCC v ds = 25v c rss reverse transfer capacitance CCC 38 CCC pf ? = 1.0mhz c oss output capacitance CCC 780 CCC v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance CCC 62 CCC v gs = 0v, v ds = 120v, ? = 1.0mhz c oss eff. effective output capacitance CCC 110 CCC v gs = 0v, v ds = 0v to 120v ? dynamic @ t j = 25c (unless otherwise specified) ns parameter typ. max. units e as single pulse avalanche energy ? CCC 130 mj i ar avalanche current ? CCC 8.3 a e ar repetitive avalanche energy ? CCC 8.6 mj avalanche characteristics s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.3 v t j = 25c, i s = 8.3a, v gs = 0v ? t rr reverse recovery time CCC 110 CCC ns t j = 25c, i f = 8.3a q rr reverse recoverycharge CCC 520 CCC nc di/dt = 100a/s ? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) diode characteristics 14 56 a static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 150 CCC CCC v v gs = 0v, i d = 250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC 0.17 CCC v/c reference to 25c, i d = 1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 0.18 w v gs = 10v, i d = 8.3a ? v gs(th) gate threshold voltage 3.0 CCC 5.5 v v ds = v gs , i d = 250a CCC CCC 25 a v ds = 150v, v gs = 0v CCC CCC 250 v ds = 120v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 30v gate-to-source reverse leakage CCC CCC -100 na v gs = -30v i gss i dss drain-to-source leakage current parameter typ. max. units r q jc junction-to-case CCC 1.75 r q ja junction-to-ambient (pcb mount)* CCC 50 c/w r q ja junction-to-ambient CCC 110 thermal resistance irfr/u13n15d www.freescale.net.cn 2 / 10
fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 5 6 7 8 9 10 11 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 14a 0.01 0.1 1 10 100 0.1 1 10 100 20 s pulse width t = 25 c j top bottom vgs 15v 12v 10v 8.0v 7.0v 6.0v 5.5v 5.0v v , drain-to-source volta g e (v) i , drain-to-source current (a) ds d 5.0v 0.1 1 10 100 0.1 1 10 100 20 s pulse width t = 175 c j top bottom vgs 15v 12v 10v 8.0v 7.0v 6.0v 5.5v 5.0v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 5.0v irfr/u13n15d www.freescale.net.cn 3 / 10
fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 5 10 15 20 25 30 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 8.3a v = 30v ds v = 75v ds v = 120v ds 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v ,source-to-drain volta g e (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 0.1 1 10 100 1000 1 10 100 1000 operation in this area limited by r ds(on) sin g le pulse t t = 175 c = 25 c j c v , drain-to-source volta g e (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 c, capacitance(pf) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd irfr/u13n15d www.freescale.net.cn 4 / 10
fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. v gs + - v dd fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 2 4 6 8 10 12 14 t , case temperature ( c) i , drain current (a) c d irfr/u13n15d www.freescale.net.cn 5 / 10
q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 w t p d.u.t l v ds + - v dd driver a 15v 20v 25 50 75 100 125 150 175 0 40 80 120 160 200 240 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 3.4a 5.9a 8.3a irfr/u13n15d www.freescale.net.cn 6 / 10
p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet ? power mosfets * v gs = 5v for logic level devices peak diode recovery dv/dt test circuit ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * irfr/u13n15d www.freescale.net.cn 7 / 10
d-pak (to-252aa) tape & reel information dimensions are shown in millimeters (inches) tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are show n in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch ? repetitive rating; pulse width limited by max. junction temperature. ? i sd 8.3a, di/dt 280a/s, v dd v (br)dss , t j 175c notes: ? starting t j = 25c, l = 3.8mh r g = 25 w , i as = 8.3a. ? pulse width 300s; duty cycle 2%. ? c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss irfr/u13n15d www.freescale.net.cn 10 / 10


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