www.siliconstandard.com 1 of 5 n-channel enhancement-mode power mosfet bv dss 30v r ds(on) 6.5mw i d 16a the SSM4426GM acheives fast switching performance with low gate charge without a complex drive circuit. it is suitable for low voltage applications such as dc/dc pb-free; rohs-compliant so-8 product summary description notes: 1.pulse width must be limited to avoid exceeding the maximum junction temperature of 150c. 2.pulse width <300us, duty cycle <2%. 3.mounted on a square inch of copper pad on fr4 board ; 125c/w when mounted on the minimum pad area required for soldering. converters and general load-switching circuits. the SSM4426GM is supplied in an rohs-compliant so-8 package, which is widely used for medium power commercial and industrial surface mount applications. s s s g d d d d so-8 absolute maximum ratings symbol parameter value units v ds v gs v i d i dm a p d w/c t stg t j symbol parameter value units r qja maximum thermal resistance, junction-ambient 3 50 c/w drain-source voltage 30 v gate-source voltage 20 continuous drain current, t c = 25c 16 a t c = 70c 12.8 a pulsed drain current 1 80 total power dissipation, t c = 25c 2.5 w -55 to 150 c operating junction temperature range -55 to 150 c linear derating factor 0.02 thermal characteristics storage temperature range ssm 4 42 6 g m 4/16/200 6 re v.3.01
www.siliconstandard.com 2 of 5 electrical characteristics (at tj = 25c, unless otherwise specified) notes: 1.pulse width must be limited to avoid exceeding the maximum junction temperature of 150c. 2.pulse width <300us, duty cycle <2%. symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 30 - - v d bv dss / dt j breakdown voltage temperature coefficient reference to 25c, i d =1ma - 0.02 - v/c r ds(on) static drain-source on-resistance 2 v gs =10v, i d =16a - - 6.5 mw v gs =4.5v, i d =12a - - 10 mw v gs(th) gate threshold voltage v ds =v gs , i d =250ua 0.8 - 2.5 v g fs forward transconductance v ds =10v, i d =16a - 30 - s i dss drain-source leakage current v ds =30v, v gs =0v - - 1 ua v ds =24v ,v gs =0v, tj = 70c - - 25 ua i gss gate-source leakage current v gs =20v - - 100 na q g total gate charge 2 i d =16a - 28 45 nc q gs gate-source charge v ds =25v - 5 - nc q gd gate-drain ("miller") charge v gs =4.5v - 16 - nc t d(on) turn-on delay time 2 v ds =15v - 12 - ns t r rise time i d =1a - 8 - ns t d(off) turn-off delay time r g =3.3w , v gs =10v - 44 - ns t f fall time r d =15w - 17 - ns c iss input capacitance v gs =0v - 2000 3200 pf c oss output capacitance v ds =25v - 500 - pf c rss reverse transfer capacitance f=1.0mhz - 1370 - pf source-drain diode symbol parameter test conditions min. typ. max. units v sd forward voltage 2 i s =1.9a, v gs =0v - - 1.3 v t rr reverse-recovery time i s =16a, v gs =0v, - 30 - ns q rr reverse-recovery charge di/dt=100a/s - 25 - nc ssm 4 42 6 g m 4/16/200 6 re v.3.01 rg gate resistance f=1.0mhz - 1.1 1.7 w
www.siliconstandard.com 3 of 5 ssm 4 42 6 g m 4/16/200 6 re v.3.01 fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance vs. gate voltage fig 4. normalized on-resistance vs. junction temperature fi g 5. forward characteristic of ff fig 6. gate threshold voltage vs. reverse diode junction temperature 5 10 15 20 2468 10 v gs , gate-to-source voltage (v) r ds(on) (m w ) i d =12a t a =25c 0 20 40 60 80 100 0246 v ds , drain-to-source voltage (v) i d , drain current (a) t a =25 o c 10v 7.0v 5.0v 4.5v v g =3.0v 0 20 40 60 80 100 0246 v ds , drain-to-source voltage (v) i d , drain current (a) t a = 150 o c 10v 7.0v 5.0v 4.5v v g =3.0v 0.4 0.9 1.4 1.9 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =16a v g =10v 0.0 0.5 1.0 1.5 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized v gs(th) (v) 0 3 6 9 12 0 0.2 0.4 0.6 0.8 1 1.2 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c
www.siliconstandard.com 4 of 5 SSM4426GM 4/16/2006 rev.3.01 fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. transfer characteristics fig 12. gate charge waveform q v g 4.5v q gs q gd q g charge 0 4 8 12 16 02 04 06 0 q g , total gate charge (nc) v gs , gate to source voltage (v) v ds =15v v ds =20v v ds =25v i d =16a 100 1000 10000 1 5 9 13 17 21 25 29 v ds , drain-to-source voltage (v) c (pf) f =1.0mh z c iss c oss c rss 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-to-source voltage (v) i d (a) t a =25 o c single pulse 100us 1ms 10ms 100ms 1s dc 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 t , pulse width (s) normalized thermal response (r thja ) p dm duty factor = t/t peak t j = p dm x r thja + t a r thja =125 o c/w t t 0.02 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse 0 20 40 60 80 100 012345 v gs , gate-to-source voltage (v) i d , drain current (a) t j =150 o c t j =25 o c v ds =5v
www.siliconstandard.com 5 of 5 physical dimensions part marking packing: moisture sensitivity level msl3 3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (mbb). symbol min max a 1.35 1.75 a1 0.10 0.25 b 0.33 0.51 c 0.19 0.25 d 4.80 5.00 e 3.80 4.00 e 1.27(typ) h 5.80 6.50 l 0.38 1.27 d h e a b a1 c e l dimensions do not include mold protrusions. part number: 4426gm xxxxx x ywwsss date/lot code: (ywwsss) y = last digit of the year ww = week sss = lot code sequence all dimensions in millimeters. ssm 4 42 6 g m 4/16/200 6 re v.3.01
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