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EL711DI 1a fast transient dc-dc buck converter with integrated silicon magnetics w ww.enpirion.com description the EL711DI is the first of a brand new linear direct r eplacement (ldr?) buck regulator family designed for the economical replacement of low drop-out (ldo) linear voltage regulators. the EL711DI is a 1000ma power system-on-chip, (powersoc) switch- mode dc-dc regulator with integrates mosfets, controller, compensation circuit and a proprietary on- chip silicon inductor. utilizing a 3x4.5x0.9mm dfn package, the EL711DI offers high efficiency at an excellent solution size and is a cost-effective alternative to ldos. with an 18mhz switching frequency, the EL711DI is the fastest in-class buck regulator with the lowest output ripple. due to its all- silicon powersoc construction, the EL711DI also offers superior reliability over standard discrete dcdc solutions. the EL711DI showcases enpirion?s proprietary monolithic magnetics-on-silicon inductor technology and is designed to meet the demand of high performance digital asics, dsps, and fpgas found in servers, routers, switches, and base stations. enpirion?s powersoc solution improves system design and productivity by offering simple board layout, small solution size, low cost, high efficiency, ultra-fast transient response and high performance. features ? output current up to 1000ma ? high efficiency ? 3 x 4.5 x 0.9 mm dfn package ? ultra-fast transient response ? 2% initial output voltage accuracy ? input voltage range: 2.7v to 5.5v ? output voltage range 0.6v to v in ? v do ? 18mhz switching frequency for ultra low ripple (8mvpp) ? 100% ic-level reliability in a powersoc solution ? short-circuit, uvlo and thermal protection ? rohs compliant, msl level 3, 260 c reflow applications ? voltage rails using ldo with thermal issues ? cost-effective compliance energy star initiative ? high density applications with limited ldo footprint ? very low noise and noise sensitive applications ? cpu, gpu, dsp, fpga or memory core voltage figure 1. simplified ap plications circuit figure 2. highest efficiency in smallest solution size 0 10 20 30 40 50 60 70 80 90 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current vout = 2.5v vout = 1.8v vout = 1.5v vout = 1.2v vout = 1.0v conditions v in = 3.6v 07889 november 28, 2012 rev: a
EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 2 ordering information part number package markings t ambient rating (c) package description EL711DI l711 -40 to +85 16-pin (3.0mm x 4.5mm x 0.9mm) dfn t&r EL711DI-e l711 dfn evaluation board packing and marking information : http://www.enpirion.com/resource-center-packing-and- marking-information.htm pin assignments (top view) figure 3: pin out diagram (top view) note a : nc pins are not to be electrically connected to each other or to any external signal, ground, or voltage. however, they must be soldered to the pcb. failure to follow this guideline may result in part malfunction or damage. note b : white ?dot? on top left is pin 1 indicator on top of the device package. pin description pin name function 1 pvin input power supply. connect to input power supply and place input filter capacitor(s) between this pin and the pgnd pin. refer to layout recommendations section for details. 2 pgnd power ground. connect this pin to the ground electrode of the output filter capacitor(s). 4 bgnd connect to gnd plane at all times. 8 vout regulated converter output. connect to the load and place output filter capacitor(s) between this pin and the pgnd pin. refer to layout recommendations section for details. 13 agnd analog ground. this is the quiet ground for the internal control circuits and the ground return for external feedback voltage divider. 14 vfb this is the external feedback input pin. a resistor divider connects from the output to agnd. the mid-point of the resistor divider is connected to vfb. a feed-forward capacitor (c a ) is required parallel to the upper feedback resistor (r a ). the output voltage regulation is based on the vfb node voltage equal to 0.6v. 15 avin analog input voltage for the control circuits. connect this pin to the input power supply (pvin) at a quiet point. 16 enable device enable pin. a high level or floating this pin enables the device while a low level disables the device. a voltage ramp from another power converter may be applied for precision enable. refer to power up sequencing. 3, 5, 6,7, 9, 10, 11, 12 nc no connect: these pins must be soldered to pcb but not electrically connected to each other or to any external signal, voltage, or ground. these pins may be connected internally. failure to follow this guideline may result in device damage. 17 pgnd not a perimeter pin. device thermal pad to be connected to the ground electrode of the input filter capacitor(s) with a wide trace. from that point, vias conduct heat to the system gnd plane. refer to layout recommendation section. 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 3 absolute maximum ratings caution : absolute maximum ratings are stress ratings only. functional operation beyond the recommended operating conditions is not implied. stress beyond the absolute maximum ratings may impair device life. exposure to absolute maximum rated conditions for extended periods may affect device reliability. parameter symbol min max units supply voltage: pvin, avin, vout v in -0.3 6.0 v voltages on: enable -0.3 v in + 0.3 v voltages on: v fb -0.3 2.7 v maximum operating junction temperature t j-abs 150 c storage temperature range t stg -65 150 c reflow temp, 10 sec, msl3 jedec j-std-020c 260 c esd rating (based on human body model) 2000 v esd rating (charge device model) 500 v recommended operating conditions parameter symbol min max units input voltage range v in 2.7 5.5 v output voltage range (note 1) v out 0.6 v in -v do v operating ambient temperature t a -40 +85 c operating junction temperature t j -40 +125 c thermal characteristics parameter symbol typ units thermal resistance: junction to ambient ?0 lfm (note 2) ja 60 c/w thermal overload trip point t j-tp +155 c thermal overload trip point hysteresis 15 c note 1 : v do (dropout voltage) is defined as (i load x max dropout resistance) / 0.375. maximum v out = v in - v do . low v in operation beyond the dropout region is not guaranteed. please refer to electrical characteristics table and typical performance curves. note 2 : based on 2oz. external copper layers and proper thermal design in line with eij/jedec jesd51-7 standard for high thermal conductivity boards. 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 4 electrical characteristics note: v in =5.5v, minimum and maximum values are over operating ambient temperature range unless otherwise noted. typical values are at t a = 25c. parameter symbol test conditions min typ max units operating input voltage range v in 2.7 5.5 v under voltage lock- out ? v in rising v uvlo_r 2.35 2.5 2.65 v under voltage lock- out ? v in falling v uvlo_f 2.2 2.35 2.5 v drop out resistance r do input to output resistance 340 500 m vfb voltage initial accuracy v fb t a = 25 c 0.588 0.600 0.612 v operating output voltage range v out note 1 0.6 v in -v do v line regulation ? v out_line 2.7v v in 5.5v 0.2 %/v load regulation ? v out_load 0a i load 1a 0.2 %/a temperature variation ? v out_templ -40 c t a +85 c 24 ppm/ c output current i out note 1 subject to dropout voltage limit 0 1.0 a shut-down current i sd enable = low 1.5 a over current protection (ocp) threshold i lim 2.7v v in 5.5v 0.6v v out 3.3v 1.5 2.2 a feedback pin input current i fb note 3 <100 na enable pin logic low v enlo 0 0.3 v enable pin logic high v enhi 1.4 avin v enable pin current i enable note 3 <100 na operating frequency f osc 18.5 mhz v out rise time t rise (note 3 and 4) 850 s note 3 : parameter not production tested but is guaranteed by design. note 4 : rise time calculation begins when avin > v uvlo and enable = high. 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 5 typical performance curves 0 10 20 30 40 50 60 70 80 90 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current vin = 3.3v vin = 4.3v vin = 5.0v vin = 5.5v conditions v out = 1.8v 0 10 20 30 40 50 60 70 80 90 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current vout = 2.5v vout = 1.8v vout = 1.5v vout = 1.2v vout = 1.0v conditions v in = 3.3v 0 10 20 30 40 50 60 70 80 90 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current vout = 2.5v vout = 1.8v vout = 1.5v vout = 1.2v vout = 1.0v conditions v in = 3.6v 0 10 20 30 40 50 60 70 80 90 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current vout = 3.3v vout = 2.5v vout = 1.8v vout = 1.5v vout = 1.2v vout = 1.0v conditions v in = 4.2v 0 10 20 30 40 50 60 70 80 90 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current vout = 3.3v vout = 2.5v vout = 1.8v vout = 1.5v vout = 1.2v vout = 1.0v conditions v in = 5.0v 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output voltage (v) output current (ma) output voltage vs. output current vout = 1.2v conditions v in = 3.3v 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 6 typical performance curves (continued) 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output voltage (v) output current (ma) output voltage vs. output current vout = 1.2v conditions v in = 5.0v 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output voltage (v) output current (ma) output voltage vs. output current vout = 1.8v conditions v in = 3.3v 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output voltage (v) output current (ma) output voltage vs. output current vout = 1.8v conditions v in = 5.0v 1.160 1.170 1.180 1.190 1.200 1.210 1.220 1.230 1.240 -40 -15 10 35 60 85 output voltage (v) ambient temperature ( c) output voltage vs. temperature load = 0ma load = 200ma load = 400ma load = 800ma load = 1000ma conditions v in = 3.3v v out_nom = 1.2v 1.160 1.170 1.180 1.190 1.200 1.210 1.220 1.230 1.240 -40 -15 10 35 60 85 output voltage (v) ambient temperature ( c) output voltage vs. temperature load = 0ma load = 200ma load = 400ma load = 800ma load = 1000ma conditions v in = 5v v out_nom = 1.2v 1.760 1.770 1.780 1.790 1.800 1.810 1.820 1.830 1.840 -40 -15 10 35 60 85 output voltage (v) ambient temperature ( c) output voltage vs. temperature load = 0ma load = 200ma load = 400ma load = 800ma load = 1000ma conditions v in = 3.3v v out_nom = 1.8v 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 7 typical performance curves (continued) 1.760 1.770 1.780 1.790 1.800 1.810 1.820 1.830 1.840 -40 -15 10 35 60 85 output voltage (v) ambient temperature ( c) output voltage vs. temperature load = 0ma load = 200ma load = 400ma load = 800ma load = 1000ma conditions v in = 5v v out_nom = 1.8v 1.760 1.765 1.770 1.775 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 output voltage (v) input voltage (v) output voltage vs. input voltage conditions load = 0a 1.760 1.765 1.770 1.775 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 output voltage (v) input voltage (v) output voltage vs. input voltage conditions load = 200ma conditions load = 600ma 1.760 1.765 1.770 1.775 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 output voltage (v) input voltage (v) output voltage vs. input voltage conditions load = 200ma conditions load = 1000ma 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 8 typical performance characteristics enable enable startup waveform (0a) conditions vin = 3.3v, vout = 1.8v, load = 0a vout load enable shutdown waveform (0a) conditions vin = 3.3v, vout = 1.8v, load = 0a vout load enable enable startup waveform (1a) conditions vin = 3.3v, vout = 1.8v, load = 1a vout load enable enable shutdown waveform (1a) conditions vin = 3.3v, vout = 1.8v, load = 1a vout load enable enable startup waveform (0a) conditions vin = 5v, vout = 1.8v, load = 0a vout load enable enable shutdown waveform (0a) conditions vin = 5v, vout = 1.8v, load = 0a vout load enable 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 9 typical performance characteristics (continued) enable startup waveform (1a) conditions vin = 5v, vout = 1.8v, load = 1a vout load enable enable shutdown waveform (1a) conditions vin = 5v, vout = 1.8v, load = 1a vout load enable output ripple at 20mhz bandwidth conditions vin = 3.3v, vout = 1.8v no load vout = 1.8v (ac coupled) 10mv / div load 500ma / div output ripple at 20mhz bandwidth conditions vin = 3.3v, vout = 1.8v load = 1a vout = 1.8v (ac coupled) 10mv / div load 500ma / div output ripple at 20mhz bandwidth conditions vin = 5v, vout = 1.8v load = 0a vout = 1.8v (ac coupled) 10mv / div load 500ma / div output ripple at 20mhz bandwidth conditions vin = 5v, vout = 1.8v load = 1a vout = 1.8v (ac coupled) 10mv / div load 500ma / div 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 10 typical performance characteristics (continued) load transient from 0 to 500ma vout = 1.8v (ac coupled) 50mv / div load 500ma / div conditions vin = 3.3v, vout = 1.8v cin = 4.7f (0603) cout = 10f (0603) + 0.22f (0402) load transient from 0 to 1a conditions vin = 3.3v, vout = 1.8v cin = 4.7f (0603) cout = 10f (0603) + 0.22f (0402) vout = 1.8v (ac coupled) 50mv / div load 500ma / div load transient from 0 to 500ma vout = 1.8v (ac coupled) 20mv / div load 500ma / div conditions vin = 5v, vout = 1.8v cin = 4.7f (0603) cout = 10f (0603) + 0.22f (0402) load transient from 0 to 1a vout = 1.8v (ac coupled) 20mv / div load 500ma / div conditions vin = 5v, vout = 1.8v cin = 4.7f (0603) cout = 10f (0603) + 0.22f (0402) 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 11 functional block diagram soft start vref (+) (-) error amp vout p-drive n-drive uvlo thermal limit current limit sawtooth generator (-) (+) pwm comp pvin pgnd logic control compensation network avin agnd gate drive vfb enable bgnd figure 4: functional block diagram 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 12 functional description functional overview the EL711DI integrates mosfet switches, the pwm controller, gate-drive, controller compensation, and a magnetics-on-silicon inductor into a small 3.0mm x 4.5mm x 0.9mm dfn package. advanced package design, along with the high level of integration, provides low output ripple and noise. the EL711DI uses voltage mode control for high noise immunity and load matching to advanced sub-90nm digital-chip loads. an external resistor divider is used to set the output voltage over the 0.6v to 5.0v range. the EL711DI provides exceptional power density for a 1000ma dc-dc converter solution. the key enabler of this revolutionary integration is enpirion?s proprietary high speed power mosfet technology combined with enpirion?s latest advanced magnetics-on-silicon inductor technology. the advanced mosfet switches are implemented in deep sub-micron cmos generating very low switching loss at ultra-high switching frequencies while allowing monolithic integration. the semiconductor process allows seamless integration of all switching, control, and inductive energy storage functions. the proprietary magnetic-on-silicon technology provides high-density, high-inductance in a very small footprint on a silicon die. enpirion magnetics are carefully matched to the control and compensation circuits yielding an optimal solution with assured performance over the entire operating range. protection features include under-voltage lock-out (uvlo), over-current protection (ocp), short circuit protection, and thermal overload protection. integrated inductor: low-loss, low noise the EL711DI utilizes a proprietary low loss integrated inductor technology. the integration of the inductor greatly simplifies the power supply design process. its inductor on silicon is manufactured with ultra-low loss alloys capable of operating in the 10-20 mhz regime. alloy shielding and compact die construction of the inductor silicon die reduces the conducted and radiated noise that can couple into the traces of the printed circuit board. further, the package layout is optimized to reduce the electrical path length for the high di/dt currents that are a major source of radiated emissions from dc-dc converters. the unique, leading-edge integrated inductor technology provides the optimal solution to complexity, output ripple, and costs that plague low power dc-dc converter design with a viable ldo alternative. controller topology the EL711DI utilizes on-chip type iii voltage-mode control. voltage-mode control is properly impedance matched to digital loads in the sub- 90nm process technologies that are used in today?s advanced ics. it also provides a high degree of noise immunity at light load currents so that low ripple and high accuracy are maintained over the entire load range. the very high switching frequency allows for a very wide control loop bandwidth and hence excellent transient performance. soft start internal soft start circuits limit in-rush current when the device starts up from a power down condition or when the ?enable? pin is asserted ?high?. digital control circuitry limits the v out ramp rate to levels that are safe for the power mosfets and the integrated inductor. the EL711DI has a pre-set, fixed v out ramp time. therefore, the ramp rate will vary with the output voltage setting. v out ramp time is given in the electrical characteristics table. due to this fixed startup ramp time, large and excessive bulk capacitance on the output of the device can cause an over-current trip condition at startup. the maximum total capacitance on the output, including the output filter capacitor and bulk and decoupling capacitances, at the load, is given as: c out_total_max (f) = 718 / v out (v) the nominal value for c out is 10f. see the applications section for more details. over-current and short-circuit protections (ocp and scp) the current limit function is achieved by sensing the current flowing in the high-side switch through a sense p-mosfet which is compared to a reference current. when this level is exceeded the high-side p-fet is turned off and the low-side n- fet is turned on, pulling v out low. this condition is maintained for approximately 0.2 ? 0.5 ms followed by a normal soft start procedure. if the over-current 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 13 condition still persists after soft start, this hiccup cycle will repeat itself indefinitely until the over- current condition is removed. figure 5. hiccup over-current protection under-voltage-lockout (uvlo) during initial power-up the under-voltage-lockout circuit will hold-off the switching circuitry until the input voltage reaches a sufficient level to insure proper operation. if the voltage drops below the uvlo threshold, the lockout circuitry will again disable switching. hysteresis is included to prevent chattering between states. power-up sequencing during power-up, enable should not be asserted before pvin, and pvin should not be asserted before avin. tying all three pins together meets these requirements. pre-bias precaution the EL711DI is not designed to be turned on into a pre-biased output voltage. be sure the output capacitors are not charged or the output of the EL711DI is not pre-biased when the EL711DI is first enabled. enable the enable pin provides a means to enable normal operation or to shut down the device. a logic high will enable the converter into normal operation. when the enable pin is asserted (high) the device will undergo a normal soft-start, allowing the output voltage to rise monotonically into regulation. a logic low will disable the converter and the device will power down in a controlled manner. floating the enable pin will cause the regulator to be in an indeterminate state. the enable should not be left floating. thermal shutdown when excessive power is dissipated in the chip, the junction temperature rises. once the junction temperature exceeds the internal thermal shutdown temperature, the thermal shutdown circuit turns off the converter output voltage thus allowing the device to cool down. when the junction temperature decreases by 15c, the device will initiate a normal startup process. this process will repeat itself if the thermal overload condition is not removed. hiccup mode over-current protection vout = 1.0v 500mv / div output current 2a / div 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 14 application information output voltage programming figure 6 : typical application circuit the EL711DI uses a simple resistor divider to set the output voltage. in figure 6, use 100k for the upper resistor (r a ). the value of the bottom resistor, r b in k is then given by: , figure 7 : feedback resistor network where, v fb = 0.6v nominal and v out is the desired output voltage. a 22pf mlcc capacitor is required in parallel with r a for proper control loop compensation. input filter capacitor selection the input capacitor, c in , should be at least 4.7f in a 0603 mlcc capacitor case. it must be either x5r or x7r or of an equivalent dielectric formulation. since y5v or equivalent dielectric formulations severely lose capacitance with frequency, bias, and temperature, they are not suitable for high frequency switch-mode dc-dc converter input filter applications such as the EL711DI. mfg p/n 4.7f, 10v, x5r, 10%, 0603 murata grm188r61a475ke15d 4.7f, 10v, x5r, 10%, 0603 taiyo yuden lmk107bbj475mklt 4.7f, 10v, x5r, 10%, 0603 avx 0603zd475kat2a 0.1f, 10v, x5r, 10%, 0402 taiyo yuden lmk105bj104kv-f table 1 . recommended input capacitors output filter capacitor selection the output filter is designed as an impedance network to provide both bulk (low frequency) filtering as well as impedance attenuation (high frequency) switching noise filtering. while only physical capacitors comprise the network, its high frequency equivalent circuit including esr and esl are taken into account in the design. for bulk charge and stability requirements, the minimum value of c out must be 10f in a minimum 0603 mlcc capacitor case. peak-to-peak ripple magnitude can be further reduced as needed by adding additional 10f 0603 and 0.22f 0402 mlcc capacitors. the maximum output filter capacitance permitted directly at the output pins of the device depends on v out and is calculated by the equation in the soft start section. v out must be sensed at the last output filter capacitor at the EL711DI output pins. wherever the sense location, it should not be at a point where an additional secondary lc filter is inadvertently created for example by placement of capacitors at a distance from one another where the intervening trace forms adequate inductance. down-stream filtering past the sense point is perfectly acceptable and will not pose any stability concerns. in fact the added benefit of the EL711DI?s high operating frequency is that the extra trace inductance will provide further ripple and noise attenuation to exceptionally low levels. of course proper hardware design practices must be followed to avoid resonances that naturally increase noise levels in any switch-mode power supply system. additional bulk capacitance for decoupling and bypass can be placed at the point-of-load as long as there is sufficient separation between the v out sense point and that bulk capacitance. excess total capacitance on the output (output 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 15 filter + bulk) will cause an over-current condition at startup. refer to the section on soft-start for the maximum total capacitance on the output. the output capacitor must have an x5r or x7r or equivalent dielectric formulation. y5v or equivalent dielectric formulations exhibit severe, unacceptable loss of capacitance with frequency, bias, and temperature, as much as 50% or more. they are not suitable for high frequency, switch-mode, dc- dc converter output filter applications such as the EL711DI. mfg p/n 10f, 10v, x5r, 10%, 0603 murata grm188r61a106ke69d 10f, 10v, x5r, 10%, 0603 taiyo yuden lmk107bbj106malt 10f, 10v, x5r, 20%, 0603 avx 0603zd106mat2a 0.22f, 10v, x5r, 10%, 0402 taiyo yuden lmk105bj224kv-f table 2 . recommended output capacitors 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 16 thermal considerations thermal considerations are important power supply design facts that cannot be avoided in the real world. whenever there are power losses in a system, the heat that is generated by the power dissipation needs to be accounted for. the enpirion powersoc helps alleviate some of those concerns. the enpirion EL711DI dc-dc converter is packaged in a 3x4.5x0.9mm 16-pin dfn package. the dfn package is constructed with copper lead frames that have exposed thermal pads. the exposed thermal pad on the package should be soldered directly on to a copper ground pad on the printed circuit board (pcb) to act as a heat sink. the recommended maximum junction temperature for continuous operation is 125c. continuous operation above 125c may reduce long-term reliability. the device has a thermal overload protection circuit designed to turn off the device at an approximate junction temperature value of 155c. the following example and calculations illustrate the thermal performance of the EL711DI. example: v in = 3.3v v out = 1.8v i out = 1000ma first calculate the output power. p out = 1.8v x 1a = 1.8w next, determine the input power based on the efficiency ( ) shown in figure 8. figure 8: efficiency vs. output current for v in = 3.3v, v out = 1.8v at 1a, 76% = p out / p in = 76% = 0.76 p in = p out / p in 1.8w / 0.76 2.37w the power dissipation (p d ) is the power loss in the system and can be calculated by subtracting the output power from the input power. p d = p in ? p out 2.37w ? 1.8w 0.57w with the power dissipation known, the temperature rise in the device may be estimated based on the theta ja value ( ja ). the ja parameter estimates how much the temperature will rise in the device for every watt of power dissipation. the EL711DI has a ja value of 60 oc/w without airflow. determine the change in temperature ( ? t) based on p d and ja . ? t = p d x ja ? t 0.57w x 60c/w = 34.2c 34c the junction temperature (t j ) of the device is approximately the ambient temperature (t a ) plus the change in temperature. we assume the initial ambient temperature to be 25c. t j = t a + ? t t j 25c + 34c 59c the maximum operating junction temperature (t jmax ) of the device is 125c, so the device can operate at a higher ambient temperature. the maximum ambient temperature (t amax ) allowed can be calculated. t amax = t jmax ? p d x ja 125c ? 34c 91c the maximum ambient temperature the device can reach is 85c given the input and output conditions. note that the efficiency will be slightly lower at higher temperatures and this calculation is an estimate. 0 10 20 30 40 50 60 70 80 90 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 efficiency (%) output current (a) efficiency vs. output current conditions v in = 3.3v v out = 1.8v 07889 november 28, 2012 rev: a ? enpirion 2012 all rights reserved, e&oe engineering schematic figure 9: engineering schematic enpirion confidential www engineering schematic for layout recommendation section EL711DI ww.enpirion.com , page 17 recommendation section 07889 november 28, 2012 rev: a EL711DI ? enpirion 2012 all rights reserved, e&oe enpirion confidential www.enpirion.com , page 18 layout recommendation figure 10: top layout with critical components only (top view). see figure 9 for corresponding schematic. this layout only shows the critical components and top layer traces for minimum footprint in single- supply mode with enable tied to avin. alternate enable configurations need to be connected and routed according to customer application. please see the gerber files at www.enpirion.com for details on all layers. due to the high switching frequency, the layout for this part is very critical. to ensure success for this product, these layout recommendations and the enpirion gerbers must be followed exactly. recommendation 1: input and output filter capacitors should be placed on the same side of the pcb, and as close to the el711 package as possible. they should be connected to the device with very short and wide traces. do not use thermal reliefs or spokes when connecting the capacitor pads to the respective nodes. the +v and gnd traces between the capacitors and the el711 should be as close to each other as possible so that the gap between the two nodes is minimized, even under the capacitors. recommendation 2: the pgnd connections for the input and output capacitors on layer 1 need to be separated with the input ground connected directly to the thermal pad. the output ground should be connected directly to the pgnd (pin 2). both input and output ground should have vias to the system ground planes below. the trace from the thermal pad to the input capacitor also carries heat from the thermal pad to the ground plane through the vias next to cin. recommendation 3: the system ground plane should be the first layer immediately below the surface layer. this ground plane should be continuous and un-interrupted below the input capacitor and the traces leading up to the device. there needs to be a copper void in layers 1, 2, and layer 3 under the inductor portion of the el711. please see the gerber files for exact details. recommendation 4 : multiple small vias should be used to connect ground terminal of the input capacitor and output capacitors to the system ground plane. these vias connect the input/output filter capacitors to the gnd plane, and help reduce parasitic inductances in the input and output current loops. recommendation 5 : avin is the power supply for the small-signal control circuits. it should be connected to the input voltage at a quiet point. in our recommended layout this connection is made on the back side at the input vias just above cin. see the gerber files for exact details. there is also a need for a decoupling capacitor cavin right next to the avin and agnd pins. recommendation 6 : in order to avoid unnecessary ground loops, the copper from the agnd pin should only connect to cavin, r b , and the via going to the ground plane. recommendation 7 : the layer 1 metal under the device must not be more than shown in figure 10. as with any switch-mode dc/dc converter, try not to run sensitive signal or control lines underneath the converter package on other layers. recommendation 8: the v out sense point should be just after the last output filter capacitor. keep the sense trace short in order to avoid noise coupling into the node. in our recommended layout this trace is on the back side. please see the gerber files. recommendation 9 : keep r a , c a , and r b close to the vfb pin (refer to figure 10). the vfb pin is a high-impedance, sensitive node. keep the trace to this pin as short as possible. whenever possible, connect r b directly to agnd instead of going through the gnd plane. recommendation 10 : follow all the layout recommendations and the gerber files exactly to optimize performance. verify with enpirion any deviations from our layout recommendations. contact enpirion applications engineering for detailed support ( techsupport@enpirion.com ). 07889 november 28, 2012 rev: a ? enpirion 2012 all rights reserved, e&oe recommended pcb footprint figure 1 enpirion confidential www recommended pcb footprint figure 1 1: EL711DI pcb footprint (top view) EL711DI ww.enpirion.com , page 19 07889 november 28, 2012 rev: a ? enpirion 2012 all rights reserved, e&oe package and mechanical figure 12 : packing and marking information : http://www.enpirion.com/resource contact information enpirion, inc. perryville iii corporate park 53 frontage road - suite 210 hampton, nj 08827 usa phone: 1.908.894.6000 fax: 1.908.894.6090 enpirion reserves the right to make changes in circuit design and/or specifications at any time without believed to be accurate and reliable. enpirion assumes no responsibility for its use or for infringement of patents or other result from its use. enpirion products are not authorize d for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from enpirion enpirion confidential www : EL711DI package dimensions (bottom view) http://www.enpirion.com/resource -center-packing-and- marking enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. information furnished by enpirion is believed to be accurate and reliable. enpirion assumes no responsibility for its use or for infringement of patents or other d for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from enpirion EL711DI ww.enpirion.com , page 20 marking -information.htm notice. information furnished by enpirion is believed to be accurate and reliable. enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may d for use in nuclear control systems, as critical components in life support systems or equipment 07889 november 28, 2012 rev: a |
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