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general description the max6650/max6651 fan controllers use an smbus/i 2 c-compatible interface to regulate and moni- tor the speed of 5vdc/12vdc brushless fans with built- in tachometers. they automatically force the fan? tachometer frequency (fan speed) to match a prepro- grammed value in the fan-speed register by using an external mosfet or bipolar transistor to linearly regu- late the voltage across the fan. the max6650 regulates the speed of a single fan by monitoring its tachometer output. the max6651 also regulates the speed of a sin- gle fan, but it contains additional tachometer inputs to monitor up to four fans and control them as a single unit when they are used in parallel. the max6650/max6651 provide general-purpose input/output (gpio) pins that serve as digital inputs, digital outputs, or various hardware interfaces. capable of sinking 10ma, these open-drain inputs/outputs can drive an led. to add additional hardware control, con- figure gpio1 to fully turn on the fan in case of software failure. to generate an interrupt when a fault condition is detected, configure gpio0 to behave as an active- low alert output. synchronize multiple devices by set- ting gpio2 (max6651 only) as an internal clock output or an external clock input. the max6650 is available in a space-saving 10-pin ?ax package, and the max6651 is available in a small 16-pin qsop package. ________________________applications raid desktop computers servers networking workstations telecommunications ____________________________features ? closed/open-loop fan-speed control for 5v/12v fans ? 2-wire smbus/i 2 c-compatible interface ? monitors tachometer output single tachometer (max6650) up to four tachometers (max6651) ? programmable alert output ? gpios ? hardware full-on override ? synchronize multiple fans ? four selectable slave addresses ? 3v to 5.5v supply voltage ? small packages 10-pin max (max6650) 16-pin qsop (max6651) fan-speed regulators and monitors with smbus/i 2 c-compatible interface max6650/max6651 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrated? website at www.maximintegrated.com. evaluation kit available 19-1784; rev 5; 12/12 ordering information ?ax is a registered trademark of maxim integrated products, inc. + denotes a lead(pb)-free/rohs-compliant package. max6650 v cc scl 10k sda gpio0 out add gnd fb tach0 v cc 3v to 5.5v v fan 5v or 12v c comp 10 f smbus/i 2 c interface gpio1 led fan full on alert typical operating circuit pin configurations appear at end of data sheet. part temp range pin-package max6650 eub -40 c to +85 c 10 ?ax max6650eub+ -40 c to +85 c 10 ?ax max6651 eee -40 c to +85 c 16 qsop max6651eee+ -40 c to +85 c 16 qsop
fan-speed regulators and monitors with smbus/i 2 c-compatible interface 2 maxim integrated max6650/max6651 absolute maximum ratings electrical characteristics (v cc = 3.0v to 5.5v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25? and v cc = 5v.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ..............................................................-0.3v to +6v fb, tach_ ..........................................................-0.3v to +13.2v all other pins..............................................-0.3v to (v cc + 0.3v) output voltages..........................................-0.3v to (v cc + 0.3v) maximum current into v cc , gnd, v out ...................................................100ma into all other pins ..........................................................50ma continuous power dissipation (t a = +70?) ?ax (derate 5.6mw/? above +70?) .....................444mw qsop (derate 8.3mw/? above +70?) .....................667mw operating temperature range ...........................-40? to +85? junction temperature .....................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) lead(pb)-free..............................................................+260? containing lead(pb) ....................................................+240? input low voltage input hysteresis v hys 200 mv tachometer threshold v tach_ v fb + 1.0 v fb +3 v 12v fan, 0 < v fb < 9v parameter symbol min typ max units output source current i source 50 ma output sink current i sink 10 ma output voltage range v out 0.3 v cc - 0.3 v v fb + 0.5 v fb +1.5 tachometer input impedance r tach_ 70 100 150 k supply voltage v cc 3.0 5.5 v supply current i cc 10 ma dac differential nonlinearity 5 lsb useful dac resolution 8 bits feedback input impedance r fb 70 100 150 k output sink current i gpio_ 10 ma conditions guaranteed monotonicity on fb (note 1) v out = v cc - 1.8v measured at fb (note 1) v out = 0.5v i out = ?00? 5v fan, 0 < v fb < 4.5v 0 < vfb < 9v 0 < v tach < 9v v gpio_ = 0.4v full-on mode, i out = 0 v 0.8 v il(gpio_) input high voltage v 2 v cc 3.6v v ih(gpio_) 3 v cc > 3.6v pullup resistor r gpio_ 100 k tachometer inputs (tach_) feedback (fb) general-purpose inputs/outputs (gpio_) (note 2) power supply (v cc ) output (out)
k 9.5 10.5 selects slave address 3eh (table 1) r add add external pulldown resistor to gnd selects slave address 36h (table 1) (note 3) ? -1 0 i ladd add input leakage electrical characteristics (continued) (v cc = 3.0v to 5.5v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25? and v cc = 5v.) timing characteristics (v cc = 3.0v to 5.5v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25? and v cc = 5v.) fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 3 max6650/max6651 selects slave address 96h (table 1) selects slave address 90h (table 1) conditions v v cc - 0.05 v ih(add) add input high voltage v 0.1 v il(add) add input low voltage units min typ max symbol parameter address select (add) parameter symbol conditions min typ max units ? 500 minimum pulse duration glitch rejection khz 254 f clk clock frequency khz 0 400 f scl scl clock frequency ? 1.3 t buf bus free time between stop and start condition hold-time start condition t hd:sta 0.6 ? ? 1.3 t low low period of the scl clock high period of the scl clock t high 0.6 ? ? 0 900 (note 5) t hd:dat data hold time data setup time t su:dat 100 ns ns 20 + 0.1c b (pf) 300 (note 6) t r rise-time sda/scl signal (receiving) fall-time sda/scl signal (receiving) t f (note 6) 20 + 0.1c b (pf) 300 ns ns 20 + 0.1c b (pf) 250 i sink < 6ma (note 6) t f fall-time sda signal (transmitting) % -10 +10 v cc = 5v f clk clock frequency uncertainty tachometers gpio2 (note 2) smbus/i 2 c interface (figures 3, 4) v add = 0.5v (note 4) smbus/i 2 c interface (sda, scl) ? -80 -40 i add add pulldown current v sda = 0.6v ma 6 i sda data output sink current v cc 3.6v v 2 v 0.8 v il input low voltage 0 < v in < v cc ? ? input leakage current v cc > 3.6v 3 v ih input high voltage mv 200 v hys input hysteresis
fan-speed regulators and monitors with smbus/i 2 c-compatible interface max6650/max6651 4 maxim integrated typical operating characteristics (t a = +25?, unless otherwise noted.) 240 245 255 250 260 265 3.0 4.0 3.5 4.5 5.0 5.5 internal oscillator frequency vs. supply voltage max6650/51-01 supply voltage (v) frequency (khz) 200 220 260 240 280 300 internal oscillator frequency vs. temperature max6650/51-02 temperature ( c) frequency (khz) -50 050 100 v cc = 5.5v v cc = 3.0v 2.0 2.1 2.3 2.2 2.4 2.5 feedback voltage vs. temperature max6650/51-03 temperature ( c) feedback voltage (v) -50 050 100 1.9 1.8 v cc = 5.5v, v fan = 5.5v, v fan = 12.0v v fan = 12.0v, v fan = 5.5v v cc = 3.0v 1.80 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 3.0 3.5 4.0 4.5 5.0 5.5 feedback voltage vs. supply voltage (dac set to 35) max6650/51-04 supply voltage (v) feedback voltage (v) v fan = 5.5v v fan = 12.0v 2.0 2.4 2.2 2.8 2.6 3.0 3.2 3.6 3.4 3.8 3.0 3.4 3.8 4.2 4.6 3.2 3.6 4.0 4.4 4.8 5.0 supply current vs. supply voltage max6650/51-05 supply voltage (v) supply current (ma) 1.5 2.0 3.0 2.5 3.5 4.0 -40 0 -20 20 40 60 80 100 supply current vs. temperature max6650/51-06 temperature ( c) supply current (ma) v cc = 5.5v v cc = 3v timing characteristics (continued) (v cc = 3.0v to 5.5v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25? and v cc = 5v.) note 1: for proper measurement of v fb , connect out and fb as shown in the typical operating circuit . note 2: gpio2, gpio3, and gpio4 only in the max6651. note 3: guaranteed by design and not 100% production tested. note 4: for r add component test purposes only. note 5: note that the transition must internally provide at least a hold time to bridge the undefined region (300ns max) of scl? falling edge. note 6: c b is the total capacitance of one bus line in pf. tested with c b = 400pf. rise and fall times are measured between 0.3 x v cc and 0.7 x v cc . parameter symbol conditions min typ max units ? ns 050 0.6 t spike t su:sto setup time for stop condition pulse width of spike suppressed
pin fan-speed regulators and monitors with smbus/i 2 c-compatible interface detailed description the max6650/max6651 use an smbus/i 2 c-compatible interface to regulate and monitor the speed of 5vdc/12vdc brush-less fans with built-in open-collec- tor/drain tachometers. regulating fan speed propor- tionally with temperature saves power, increases fan life, and reduces acoustic noise. since fan speed is proportional to the voltage across the fan, the max6650/max6651 control the speed by regulating the voltage on the low side of the fan with an external mos- fet or bipolar transistor. the max6650/max6651 each contain two internal con- trol loops. the first loop controls the voltage across the fan. the internal digital-to-analog converter (dac) sets the reference voltage for an internal amplifier (figure 1), which then drives the gate of an external n-channel mosfet (or the base of a bipolar transistor) to regulate the voltage on the low side of the fan. as the reference voltage provided by the dac changes, the feedback amplifier automatically adjusts the feedback voltage, which changes the voltage across the fan. the second control loop consists of the internal digital logic that controls the fan? speed. the max6650/ max6651 control fan speed by forcing the tachometer frequency to equal a reference frequency set by the fan-speed register, the prescaler, and the internal oscillator (see the fan-speed register section). when the tachometer frequency is too high, the value of the dac? input register is increased by the regulator. once the dac voltage increases, the analog control loop forces the feedback voltage to rise, which reduces the voltage across the fan. since fan speed is propor- tional to the voltage across the fan, the fan slows down. 2-wire smbus/i 2 c-compatible digital interface from a software perspective, the max6650/max6651 appear as a set of byte-wide registers that contain speed control, tachometer count, alarm conditions, or configuration bits. these devices use a standard smbus/i 2 c-compatible 2-wire serial interface to access the internal registers. pin description maxim integrated 5 max6650/max6651 function name pin max6650 max6651 tachometer input. used to close the loop around the tachometer. tach0 1 1 2, 3, 16 tach2, tach3, tach1 tachometer inputs. used to monitor tachometers only. ground gnd 4 2 3 5 sda 2-wire serial-data input/output (open drain) 2-wire serial clock input scl 6 4 5 8 add slave address select input (table 1) general-purpose input/output (open drain). configurable to act either as an out- put or as an input ( full on or general purpose). general-purpose input/output (open drain). configurable to act as a general input/output line or an active-low alert output. general-purpose input/output (open drain). configurable to act as a general input/output line, an internal clock output, or an external clock input. output. drives the external mosfet or bipolar transistor. +3.0v to +5.5v power supply feedback input. closes the loop around the external mosfet or bipolar tran- sistor. fb v cc out gpio2 gpio0 gpio1 9 6 7 10 11 13 8 9 14 15 10 7, 12 gpio4, gpio3 general-purpose input/output (open drain)
hex 96 36 3e 90 fan-speed regulators and monitors with smbus/i 2 c-compatible interface 6 maxim integrated max6650/max6651 the max6650/max6651 employ three standard smbus protocols: write byte, read byte, and receive byte (figure 2). the shorter protocol (receive) allows quicker transfers, provided that the correct data register was previously selected by a write or read byte instruction. use caution with the shorter protocol in multimaster systems, since a second master could overwrite the command byte without informing the first master. slave addresses the device address can be set to one of four different values. accomplish this by pin-strapping add so that more than one max6650/max6651 can reside on the same bus without address conflicts (table 1). smbus/i 2 c interface smbus/i 2 c interface v cc 3v to 5.5v v cc scl sda add gnd fan speed configure alarm enable alarm status tach count count time gpio def gpio status dac address decode tachometer count control logic 8-bit dac 10k v ref gpio blocks (figure 5) gpio0 out fb tach0 gpio1 10k 90k 90k 10k max6650 max6651 alert full on fan v fan = 5v or 12v v offset figure 1. block diagram table 1. slave address decoding (add) binary v cc 1001 011 no connection (high-z) 0011 011 10k resistor to gnd 0011 111 address add 1001 000 gnd
slave address command byte: selects which register you are writing to. data byte: data goes into the register set by the command byte (to set thresholds, configuration masks, and sampling rate). figure 2a. smbus protocol: write byte format slave address command byte: selects which register you are reading from. slave address. repeated due to change in data-flow direction data byte: reads from the register set by the command byte. figure 2b. smbus protocol: read byte format data byte: reads data from the register com- manded by the last read-byte or write-byte transmission; also used for smbus alert response return address. figure 2c. smbus protocol: receive byte format s = start condition shaded = slave transmission wr = write = 0 p = stop condition ack = acknowledged = 0 rd = read =1 a = not acknowledged = 1 fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 7 max6650/max6651 command s 8 bits p ack data 8 bits wr 0 ack address 7 bits ack command s 8 bits wr 0 ack address 7 bits ack s p a data 8 bits rd 1 address 7 bits ack s p a data 8 bits rd 1 address 7 bits ack slave address
fan-speed regulators and monitors with smbus/i 2 c-compatible interface 8 maxim integrated max6650/max6651 smbclk ab cd e fg h i j k smbdata t su:sta t hd:sta t low t high t su:dat t hd:dat t su:sto t buf a = start condition b = msb of address clocked into slave c = lsb of address clocked into slave d = r/w bit clocked into slave e = slave pulls smbdata line low l m f = acknowledge bit clocked into master g = msb of data clocked into slave h = lsb of data clocked into slave i = slave pulls smbdata line low j = acknowledge clocked into master k = acknowledge clock pulse l = stop condition, data executed by slave m = new start condition smbclk a = start condition b = msb of address clocked into slave c = lsb of address clocked into slave d = r/w bit clocked into slave ab cd e fg h i j smbdata t su:sta t hd:sta t low t high t su:dat t su:sto t buf k e = slave pulls smbdata line low f = acknowledge bit clocked into master g = msb of data clocked into master h = lsb of data clocked into master i = acknowledge clock pulse j = stop condition k = new start condition figure 3. smbus write timing diagram figure 4. smbus read timing diagram command-byte functions the 8-bit command-byte register (table 2) is the mas- ter index that points to the various other registers within max6650/max6651. the register? power-on reset (por) state is 0000 0000, so that a receive-byte trans- mission (a protocol that lacks the command byte) occurring immediately after por returns the current speed setting. fan-speed register in closed-loop mode, the max6650/max6651 use the fan-speed register to set the period of the tachometer signal that controls the fan speed. the fan-speed register is ignored in all other modes of operation. the max6650/max6651 regulate the fan speed by forcing the tachometer period (t tach ) equal to the scaled reg- ister value. one revolution of the fan generates two tachometer pulses, so the required fan-speed register value (k tach ) may be calculated as: t tach = 1 / (2 x fan speed) k tach = [t tach x k scale x (f clk / 128)] - 1 where the fan speed is in rotations per second (rps), t tach is the period of the tachometer signal, f clk is the internal oscillator frequency (254khz ?0%), and k scale is the prescaler value (see configuration-byte register ). since the fan speed is inversely proportional to the tachometer period, the fan-speed register value (k tach ) does not linearly control the fan speed (table 3). select the prescaler value so the fan? full speed is achieved with a register value of approximately 64 (0100 0000) to optimize speed range and resolution. the max6651 may be controlled by an external oscilla-
fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 9 max6650/max6651 tor that overrides the internal oscillator (see general- purpose input/output ). when using an external oscillator (f osc ), calculate the fan-speed register value with f clk equal to f osc . codes above f8h (1111 1000) are allowed, but will not significantly decrease the frequency. configuration-byte register the configuration-byte register (table 4) adjusts the prescaler, changes the tachometer threshold voltage, and sets the mode of operation. the three least-signifi- cant bits configure the prescaler division used to scale the tachometer period. select the prescaler value so the fan? full speed is achieved with a register value of approximately 64 (0100 0000) to optimize speed range and resolution (see the fan speed register section). the fourth bit selects the fan operating voltage. the fifth and sixth bits configure the operating mode. the max6650/max6651 have four modes of operation: full-on, full-off (shutdown), closed-loop, and open-loop. in closed-loop operation, the external microcontroller (?) sets the desired speed by writing an 8-bit word to the fan-speed register (see the fan-speed register section). the max6650/max6651 monitor the fan? tachometer output and automatically adjust the voltage table 2. command-byte assignments count x speed 0000 0000 x config 0000 0010 x read gpio def 0000 0100 0001 0110 x x x x write x 02h tachometer count time ffh 0ah 00h por (default) state command gpio definition register configuration fan speed function dac 0000 0110 x x 00h dac alarm enable 0000 1000 x x 00h alarm enable alarm 0000 1010 x 00h alarm status tach0 0000 1100 x 00h tachometer 0 count tach1 0000 1110 x 00h tachometer 1 count tach2 0001 0000 x 00h tachometer 2 count tach3 0001 0010 x 00h tachometer 3 count gpio stat 0001 0100 x 1fh gpio status table 3. fan speed * 0000 0000 1.0 * 0000 0001 1.0 * 0000 0010 1.5 k scale (ms) * * * t tach k scale 330 500 500 * * * k tach * * * fan speed (rps) * 500 480 240 0001 1110 16 3.9 * 32 128 64 0001 1111 16 4.0 1.0 31 124 0010 0000 17 4.2 20,000 1.0 30 120 30,000 30,000 0100 0000 33 8.2 2.1 15.3 61.1 1111 1000 125 31 7.8 4 15.9 1900 1900 1800 910 240 k scale * * * 7700 7400 7200 3700 960 * * * fan speed (rpm) * 30,000 29,000 15,000 3830 4 16 1 1 4 16 1 4 16 * the minimum allowed tachometer period is 1ms.
across the fan until the desired speed is reached. open- loop operation allows the ? to regulate fan speed direct- ly. the ? reads the fan speed from the tach- ometer-count register. based on the tachometer count, the ? decides if the fan speed requires adjust- ment, and changes the voltage across the fan by writ- ing an 8-bit word to the dac register. full-on mode applies the maximum voltage across the fan, forcing it to spin at full speed. configuring gpio1 (see the general-purpose input/output section) as an active-low input provides additional hardware control that fully turns on the fan and overrides all software commands. general-purpose input/output the gpio pins connect to the drain of the internal n- channel mosfet and pullup resistor (figure 5). when the n-channel mosfet is off (table 5), the pullup resis- tor provides a logic-level high output. however, with the mosfet off, the gpio may serve as an input pin and its state is read from the gpio status register (table 6). the max6650/max6651 power up with the mosfet off, so input signals may be safely connected to the gpio pins. when using the gpio pin as a general-pur- pose output, change the output by writing to the gpio definition register. gpio0 may be configured as an alert output that will go low whenever a fault-condition is detected (see the alarm-enable and status registers section). gpio1 may be configured as a full on input to allow hard- ware control to fully turn on the fan in case of software or ? failure. gpio2 (max6651 only) may be config- ured as an internal clock output or as an external clock input to allow synchronization of multiple devices. alarm-enable and status registers the alarms are enabled only when the appropriate bits of the alarm-enable register are set (table 7). the maxi- mum and minimum output level alarms function only when the device is configured to operate in the closed- loop mode (see the configuration-byte register section). the alarm status register allows the system to deter- mine which alarm caused the alert output (table 8). the set-alarm and alert outputs clear after reading the fan-speed regulators and monitors with smbus/i 2 c-compatible interface 10 maxim integrated max6650/max6651 table 4. configuration byte register figure 5. general-purpose input/output structure max6650 max6651 100k gpio status register v cc 3.0v to 5.5v v cc c bypass gpio_ gnd gpio definition register bit name por (default) state function 5 to 4 7 (msb) to 6 0 always 0 operating mode: 00 = software full-on (default) 01 = software off (shutdown) 10 = closed-loop operation 11 = open-loop operation 00 mode 3 5 /12v 1 fan/tachometer voltage: 0 = 5v 1 = 12v (default) 2 to 0 (lsb) scale 010 prescaler division: 000 = divide by 1 001 = divide by 2 010 = divide by 4 (default) 011 = divide by 8 100 = divide by 16
alarm status register if the condition that caused the alarm is removed. tachometer the tachometer count registers record the number of pulses on the corresponding tachometer input during the period defined by the tachometer count-time register. the max6651 contains three additional tachometer inputs, which may be used to monitor additional fans. for accurate control of multiple fans, use identical fans. the tachometer count-time register sets the integration time over which the max6650/max6651 count tachome- ter pulses. the devices can count up to 255 (ffh) pulses during the selected count time. if more than 255 pulses occur, the ic sets the overflow alarm and the tachometer count register reports the maximum value of 255. set the time register so the count register will not overflow under worst-case conditions (maximum fan speed) while maximizing resolution. calculate the maximum measur- able fan speed and minimum resolution with the following equations: max fan speed (in rps) = 255 / (2 x t count ) min resolution (in rps) = 1 / (2 x t count ) where t count is the tachometer count time; 1khz is the maximum allowable tachometer input frequency for the max6650/max6651. fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 11 max6650/max6651 table 5. gpio definition register table 6. gpio status register bit por (default) state max6650 pin max6651 pin state function 0 gpio4 outputs a logic-low level. 7 1 n/a (must be 1) gpio4 1 gpio4 outputs a logic-high level or serves as an input. 0 gpio3 outputs a logic-low level. 6 1 n/a (must be 1) gpio3 1 gpio3 outputs a logic-high level or serves as an input. 00 gpio2 serves as an external clock input. 01 gpio2 serves as an internal clock output. 10 gpio2 outputs a logic-low level. 5:4 11 n/a (must be 11) gpio2 11 gpio2 outputs a logic-high level or serves as an input. 00 gpio1 outputs a logic-high level or serves as an input. 01 gpio1 serves as a full on input. 10 gpio1 outputs a logic-low level. 3:2 11 gpio1 gpio1 11 gpio1 outputs a logic-high level or serves as an input. 00 gpio0 outputs a logic-high level or serves as an input. 01 gpio0 serves as an alert output. 10 gpio0 outputs a logic-low level. 1:0 11 gpio0 gpio0 11 gpio0 outputs a logic-high level or serves as an input. bit name por (default state) 7 (msb) to 5 always 0 0 4 gpio4 (max6651 only) 1 3 gpio3 (max6651 only) 1 2 gpio2 (max6651 only) 1 1gpio11 0 (lsb) gpio0 1
fan-speed regulators and monitors with smbus/i 2 c-compatible interface 12 maxim integrated max6650/max6651 table 8. alarm status register bit assignments 7 (msb) to 5 gpio1 bit gpio2 (max6651 only) 0 4 name 1 min 3 0 0 (lsb) 0 0 por (default) state max 0 always 0 minimum output level alarm gpio1 alarm. set when gpio1 is low. gpio2 alarm. set when gpio2 is low (max6651 only). function maximum output level alarm tachometer overflow alarm 2 tach 0 the first 6 bits of the tachometer count-time register are always zero, and the last 2 bits set the count time (table 9). the count time may be determined from the following equation: t count = 0.25s x 2 k count where k count is the numerical value of the two 2lsbs. the 0.25 factor has a ?0% uncertainty. upon power-up, the tachometer count registers reset to 00h and the tachometer count-time register sets a 1s integration time. digital-to-analog converter when using the open-loop mode of operation, the dac register sets the voltage on the low side of the fan. an internal operational amplifier compares the feedback voltage (v fb ) with the reference voltage set by the 8-bit dac, and adjusts the output voltage (v out ) until the two input voltages are equal. the voltage at the fb pin may be determined by the following equation: v fb = (10 x v ref x k dac ) / 256 and the voltage across the fan is: where k dac is the numerical value of the dac register and v ref = 1.5v. the minimum feedback voltage is limited by the voltage drop across the external mos- fet (r on x i fan ), and the maximum voltage is limited by the fan? supply voltage (v fan ). for linear opera- v k k k v fan dac ref ? 90 10 1 256 + ? ? ? ? ? ? ? ? ? ? ? ? table 9. tachometer count-time register (assumes two pulses per revolution) 1 = alarm condition register value (k count ) count time (s) maximum fan speed (rps) minimum resolution (hz/count) 0000 0000 0.25 512 2 1 256 0.5 0000 0001 0000 0010 1.0 128 0.5 0.25 64 2.0 0000 0011 table 7. alarm-enable register bit masks 7 (msb) to 5 gpio1 bit gpio2 (max6651 only) 0 4 name 1 min 3 0 0 (lsb) 0 0 por (default) state max 0 2 tach 0 always 0 minimum output level alarm enable/disable gpio1 alarm enable/disable gpio2 alarm enable/disable (max6651 only) function maximum output level alarm enable/disable tachometer overflow alarm enable/disable 1 = enabled
tion, use dac values between 08h and b0h (see typical operating characteristics ). when using the closed-loop mode of operation, the contents of the dac register are ignored. when writing to the dac, wait at least 500? before attempting to read back. power-on reset (por) the max6650/max6651 have volatile memory. to pre- vent ambiguous power-supply conditions from corrupt- ing the data in the memory and causing erratic behavior, a por voltage detector monitors v cc and clears the memory if v cc falls below 1.6v. when power is first applied and v cc rises above 1.6v, the logic blocks begin operating (though reads and writes at v cc levels below 3v are not recommended). power-up defaults include the following: ?all alarms are disabled. ?prescale divider is set to 4. ?fan speed is set in full-on mode. see table 2 for the default states of all registers. applications information mosfet and bipolar transistor selection the max6650/max6651 drive an external n-channel mosfet that requires five important parameters for proper selection: gate-to-source conduction threshold, maximum gate-to-source voltage, drain-to-source breakdown voltage, current rating, and drain-to-source on-resistance (r ds(on) ). gate-to-source conduction threshold must be compatible with available v cc . the maximum gate-to-source voltage and the drain-to- source breakdown voltage rating should both be at least a few volts higher than the fan supply voltage (v fan ). choose a mosfet with a maximum continuous drain current rating higher than the maximum fan cur- rent. r ds(on) should be as low as practical to maxi- mize the feedback voltage range. maximum power dissipation in the power transistor can be approximat- ed by p = (v fan x i fan(max) ) / 4. bipolar power transis- tors are practical for driving small and midsize fans (figure 6). very-high-current fans may require output transistor base current greater than the max6650? 50ma drive capability. bipolar darlington transistors will work but have poor saturation characteristics and could lose up to 2v to 3v of drive voltage. resistor selection the tachometer input voltages (v tach_ ) and feedback voltage (v fb ) cannot exceed 13.2v (see absolute maximum ratings ). when using a fan powered by a 13.2v or greater supply (v fan ), protect these inputs from overvoltage conditions with series resistors. the resistance required to protect these pins may be calcu- lated from the following equation: r protect = [(v fan(max) - 13.2v) x r in ] / 13.2v where v fan(max) is the worst-case maximum supply voltage used to power the fan and r in is the input fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 13 max6650/max6651 max6650 v cc scl 10k sda gpio0 out add gnd fb tach0 v cc 3v to 5.5v v fan 5v or 12v c comp 10 f smbus/i 2 c interface gpio1 fan full on alert figure 6. fan control with a bipolar transistor
fan-speed regulators and monitors with smbus/i 2 c-compatible interface 14 maxim integrated max6650/max6651 impedance of the tachometer input (150k max) or the feedback input (150k max). compensation capacitor a compensation capacitor is needed from the fan? low side to ground to stabilize the analog control loop. typically, this capacitor should be 10?, but depend- ing on the type of fan being used, a value between 1? and 100? may be required. the proper value has been selected when no ringing is present on the volt- age at the fan? low side. fan selection for closed-loop operation and fan monitoring, the max6650/max6651 require fans with tachometer outputs. a tachometer output is typically specified as an option on many fan models from a variety of manufacturers. verify the nature of the tachometer output (open collector, totem- pole) and the resultant levels, and configure the connec- tion to the max6650/max6651 accordingly. note how many pulses per revolution are generated by the tachometer output (this varies from model to model and among manufacturers, though two pulses per revolution is the most common). table 10 lists the representative fan manufacturers and the models they make available with tachometer outputs. low-speed operation brushless dc fans increase reliability by replacing mechanical commutation with electronic commutation. by lowering the voltage across the fan to reduce its speed, the max6650/max6651 are also lowering the supply volt- age for the electronic commutation and tachometer elec- tronics. if the voltage supplied to the fan is lowered too far, the internal electronics may no longer function prop- erly. some of the following symptoms are possible: the fan may stop spinning. the tachometer output may stop generating a signal. the tachometer output may generate more than two pulses per revolution. the problems that occur, and the supply voltages at which they occur, depend on which fan is used. as a figure 7. using the max6651 to control parallel fans max6651 v cc scl 10k 10k 10k sda gpio0 out add gnd fb tach0 tach1 tach2 v cc 3v to 5.5v v fan 5v or 12v c comp smbus/i 2 c interface gpio1 fan 0 fan 1 fan 2 full on alert manufacturer fan model option comair rotron all dc brushless models can be ordered with optional tachometer output. ebm-papst tachometer output optional on some models. nmb all dc brushless models can be ordered with optional tachometer output. panasonic panaflo and flat unidirectional miniature fans can be ordered with tachometer output. sunon tachometer output optional on some models. table 10. fan manufacturers
fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 15 max6650/max6651 very rough rule of thumb, 12v fans can be expected to experience problems somewhere around 1/4 to 1/2 their rated speed. predicting future fan failure in systems that require maximum reliability, such as servers and network equipment, it can be advantageous to predict fan failure before it actually happens, to alert the system operator before the fan fails, minimizing down time. the max6650 allows the user to monitor the fan? condition through the following modes. full-on mode by occasionally (over a period of days or weeks) turning the fan on full and measuring the resultant speed, a failing fan can be detected by a trend of decreasing speeds at a given power-supply voltage. power-up is a convenient time to measure the maximum fan speed. open-loop mode the fan? condition can also be monitored using open- loop mode. by characterizing the fan while it is new, fan failure can be determined by writing a predeter- mined value to the dac and measuring the resultant fan speed. a decrease over time of the resultant speed may be an indication of future fan failure. closed-loop mode the max6650 allows the system to read the dac value used to regulate the fan speed. for a given speed, a significant change in the required dac value may indi- cate future fan problems. monitoring more than 4 fans use the max6651 to monitor up to four fans at a time (figure 7). for systems requiring more than four fans, figure 8 shows an application using an analog multi- plexer (mux) to monitor 11 fans. gpio2, gpio3, and gpio4 are connected to the mux? address pins. by writing the appropriate value to the gpio pins, the desired tachometer gets selected and counted by the tach3 input. because the tach inputs are double- buffered, and only sampled every other time slot, it is important to wait at least 4 times the tachometer count time before reading the register after changing the mux address. in the extreme case, a total of 25 fans can be monitored using three multiplexers connected to tach1, tach2, and tach3. do not connect tach0 to a mux if the max6651 is under closed-loop mode. n + 1 fan application as shown in figure 9, if any max6650 cannot maintain speed regulation, all other fans will automatically be turned on full. this can be useful in high-reliability sys- tems where any single fan failure should not cause max6651 tach0 tach1 tach2 tach3 gpio4 gpio3 gpio2 max4051 v cc 3v or 5.5v com adda addb addc inh gnd v- no0 no1 no2 no3 no4 no5 no6 fan tach 4 fan tach 9 fan tach 5 fan tach 6 fan tach 7 fan tach 8 fan tach 1 fan tach 2 fan tach 3 fan tach 10 no7 fan tach 11 to fan voltage 5v or 12v figure 8. monitoring multiple fans
downtime. the system should be designed so that the number of fans used is one more than are actually needed. this way, there is sufficient cooling even if a fan fails. with all fans operating correctly, it is unneces- sary to run the fans at their maximum speed. reducing fan speed can reduce noise and increase the life of the fans. however, once a fan fails, it is important that the remaining fans spin at their maximum speed. in figure 9, all the gpio0s are configured as alert outputs, and all the gpio1s are configured as full on inputs. if any max6650 generates an alert (indicating failure), the remaining max6650s will auto- matically turn their fans on full. temperature monitoring and fan control the circuit shown in figure 10 provides complete tem- perature monitoring and fan control. the max1617a (a remote/local temperature serial interface with smbus) monitors temperature with a diode-connected transis- tor. based on the temperature readings provided by the max1617a, the ? can adjust the fan speed pro- portionally with temperature. connecting the alert output of the max1617a to the full on input of the max6650/max6651 (see the general-purpose input/ output section) allows the fan to turn on fully if the max1617a detects an overtemperature condition. max6501 hardware fail-safe figure 11 shows an application using a max6501 as a hardware fail-safe. the max6650 has its gpio1 config- ured as full on input. the max6501 tover pin goes low whenever its temperature goes above a preset value. this pulls the full on pin (gpio1) low, forcing the fan to spin at its maximum speed. figure 12 shows the use of multiple max6501s. the max6501 has an open-drain output, allowing multiple devices to be wire ored to the full on input. this configuration allows fail-safe moni- toring of multiple locations around the system. hot-swap application hot swapping of a fan can be detected using the circuit in figure 13 where gpio2 is configured to generate an alert whenever it is pulled low. as long as the fan card is connected, gpio2 is high. however, when the fan card is removed, a 2.2k resistor pulls gpio2 low, causing an interrupt. this signals to the system that a hot swap is occurring. step-by-step part selection and software setup determining the fan system topology the max6650/max6651 support three fan system topologies. these are single fan control, parallel fan control, and synchronized fan control. single fan control the simplest configuration is a single max6650 for each fan. if two or more fans are required per system, then additional max6650 controllers are used (one per fan). the advantage of this configuration is the ability to fan-speed regulators and monitors with smbus/i 2 c-compatible interface 16 maxim integrated max6650/max6651 max6650 gpio1 max6650 gpio1 max6650 gpio1 fan 1 fan 2 fan 3 max6650 gpio1 fan 4 gpio0 gpio0 gpio0 gpio0 alert full on alert alert alert full on full on full on to int pin on nc figure 9. n + 1 application
fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 17 max6650/max6651 fan v fan = 5v or 12v out fb gnd sda scl v cc tach0 gpio0 dxn dxp gnd add1 add0 v cc scl sda gnd add v cc sda scl gpio1 c interrupt to c temperature sensor stby alert alert full on max1617a max6650 max6651 v cc figure 10. temperature monitoring and fan control
independently control each fan. the disadvantage is cost, size, and complexity. for single fan control, use the max6650 (unless addi- tional gpios are needed). parallel fan control if multiple fans are required but independent control is not, then a single max6650/max6651 connected to two or more fans in parallel may make sense (figure 7). the obvious advantage is simplicity, size, and cost savings. if all the fans connected in parallel are the same type, they will tend to run at similar speeds. however, if one or more of the fans are wearing out, speed mismatches can occur. the max6651 allows the system to monitor up to four fans, ensuring any signifi- cant speed mismatches can be detected. for parallel fan control while monitoring up to four fan speeds, select the max6651. fan-speed regulators and monitors with smbus/i 2 c-compatible interface 18 maxim integrated max6650/max6651 max6650 v cc scl 10k sda gpio0 out add gnd fb tach0 v cc 3v to 5.5v v fan 5v or 12v c comp 10 f smbus/i 2 c interface gpio1 full on alert fan max6501 tover figure 11. max6501 hardware fail-safe max6650 v cc scl 10k sda gpio0 out add gnd fb tach0 v cc 3v to 5.5v v fan 5v or 12v c comp 10 f smbus/i 2 c interface gpio1 full on alert fan max6501 tover max6501 tover max6501 tover figure 12. max6501 hardware fail-safe
fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 19 max6650/max6651 for parallel fan control while monitoring only a single fan, select the max6650. synchronized fan control (max6651 only) in systems with multiple fans, an audible beat frequency can sometimes be detected due to fan speed mismatch. this happens in systems where fans are connected in parallel or in systems with a max6650 controlling each fan. in parallel fan systems, speed mismatches occur because no two fans are identical. slight mechanical variations or loading differences can result in enough of a speed mismatch to cause an audible beat. even in systems where there is a max6650/max6651 for each fan, there can still be speed mismatches. this is primarily due to the oscillator tolerance. the max6650/max6651 oscillator tolerance is specified to be ?0%. in the worst case, this could result in a 20% (one 10% high, one 10% low) speed mismatch. the solution is to use a single max6651 for each fan, and configure the parts to use a shared clock. the shared clock can either be an external system clock or one of the max6651? internal clocks. if an external clock is used, its frequency can range from approxi- mately 50khz to 500khz. for synchronized fan control, select the max6651. combination in more complex systems, a combination of some or all of the above control types may be needed. choosing a fan once the topology is chosen, the next step is to choose a fan. see the appropriate section. enter a zero in bit 3 of the configuration register for a 5v fan and 1 for a 12v fan. configuring this bit also adjusts the tachometer input threshold voltage. this optimizes operation of the max6650/max6651 for the operating voltage of the fan being used. setting the mode of operation the max6650/max6651 have four modes of operation as determined by bits 5 and 6 of the configuration reg- ister: full on, full off, open loop, and closed loop. full-on the full-on mode applies the maximum available volt- age across the fan, guaranteeing maximum cooling. full-on mode can be entered through software or hard- max6651 v cc scl 10k sda gpio0 out add gnd fb tach0 v cc 3v to 5.5v v fan 5v or 12v c comp 10 f smbus/i 2 c interface gpio1 gpio2 full on alert fan 2.2k v id hot-swap section figure 13. hot-swap application
fan-speed regulators and monitors with smbus/i 2 c-compatible interface 20 maxim integrated max6650/max6651 ware control. to enter full-on mode through hardware, see the setting up the gpios section. note that a hard- ware full-on overrides all other modes. configure the max6650/max6651 to run in software full-on mode by entering 00 into bits 5 and 4 of the con- figuration register. full-off the full-off mode removes all the voltage across the fan, causing the fan to stop. because the max6650/ max6651 work by controlling the voltage on the low side of the fan, either 5v or 12v will be on both leads. enter full-off mode by entering 01 into bits 5 and 4 of the configuration register. open loop in open-loop mode, the max6650/max6651 do not actually regulate the fan speed. speed regulation requires an external ?. although open-loop mode allows maximum flexibility, it also requires the most software/processor overhead. in open-loop mode, the max6650/max6651 act as an smb/i 2 c-controlled voltage regulator. the ? adjusts the voltage across the fan by writing an 8-bit value to the dac register. this gives the ? direct control of the voltage across the fan. speed regulation is accom- plished by periodically reading the tachometer regis- ter(s) and adjusting the dac register appropriately. the dac value controls the voltage across the fan accord- ing to the following equation: v fan = v fan_supply - [((r2) / r1) + 1] x v ref x k dac / 256 where v fan = the voltage across the fan, v fan_supply = the supply voltage for the fan (5v or 12v), r2 = 90k (typ), r1 = 10k (typ), v ref = 1.5v (typ), and k dac = the value in the dac register. note several important things in this equation. first, the voltage across the fan moves in the opposite direction of the dac value. in other words, low dac values cor- respond to higher voltages across the fan and therefore higher speeds. second, dac values greater than 180 will result in 0v across a 12v fan. similarly, dac values greater than 76 will produce 0v across a 5v fan. this limits the useful range of the dac from 0 to 180 for 12v fans and 0 to 76 for 5v fans. remember that device tolerances can cause the output voltage value to vary significantly from unit to unit and over temperature. however, because this voltage is within a closed speed-control loop, such errors are cor- rected by the loop. below is a possible strategy for controlling the fan under open-loop mode: 1) on power-up, put the device in open-loop mode with a dac value of 00 (full speed). 2) allow the fan speed to settle. 3) read the tach register to determine the speed. 4) gradually increase the dac register value (in steps of 1 or 2) until the desired speed is obtained. in open-loop mode, any one of the four tachometer regis- ters (max6651) can be used to measure and regulate the fan? speed. this is especially useful in parallel fan sys- tems where up to four fans will be controlled as one unit. care must be taken with this mode to prevent instabili- ty, which can be caused by trying to update the fan speed too often or in increments that are too large. instability can result in the fan speeding up and slowing down repeatedly. determining the proper update rate, as shown in the following steps, depends largely on the fan? mechanical time constant and the system? loop gain (dac step sizes): 1) enter open-loop mode by setting bits 5 and 4 of the control register to 11. 2) determine the speed of the fan(s) by reading the tach register(s). 3) increase or decrease the dac register to decrease or increase the voltage across the fan, thereby adjusting its speed. closed loop in closed-loop mode, the smbus/i 2 c master (usually a ?) writes a desired fan speed to the max6650/ max6651, and the device automatically adjusts the voltage across the fan to maintain this speed. this operation mode requires less software/processor over- head than the open-loop mode. once the desired speed has been written, the max6650/max6651 con- trol the fan? speed independently, with no intervention required from the master. if desired, the max6650/ max6651 can be configured to generate an interrupt if it is unable to regulate the fan? speed at the desired value (see setting up alarms ). the max6650/max6651 can regulate only the speed of the fan connected to the tach0 input. fans connected in parallel to the tach0 fan will tend to run at similar speeds (assuming similar fans). when going from full-off to closed-loop-mode, it is recommended following this sequence: 1) full-off mode 2) full-on mode (with sufficient pause to initiate movement) 3) closed-loop mode
fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 21 max6650/max6651 the max6650 regulates fan speed in the following manner. the output of an internal 254khz oscillator is divided by 128, generating a roughly 2khz signal. this signal is divided by 1 plus the value in the speed regis- ter and is used as a reference frequency. for example, 02h in the speed register will result in a 667hz [2khz / (02h+1)] reference frequency, which is then compared against the frequency at the tachometer input divided by the prescaler value. the max6650/max6651 attempt to keep the tachometer frequency divided by the prescaler equal to the reference frequency by adjusting the voltage across the fan. if the tachometer frequency divided by the prescaler value is less than the reference frequency, the voltage across the fan is increased. remember that the tachometer will give two pulses per revolution of the fan. the following equations describe the operation. when in regulation: [f clk / (128 x (k tach + 1))] = 2 x fanspeed / k scale where f clk = oscillator frequency (either the 254khz internal oscillator or the externally applied clock), k tach = the value in the speed register, fanspeed = the speed of the fan in revolutions per second (hz), k scale = the prescaler value (1, 2, 4, 8, or 16). solving for all four variables: k tach = [(f clk x k scale ) / (256 x fanspeed)] - 1 k scale = [256 x fanspeed x (k tach + 1)] / f clk fanspeed = k scale x f clk / [256 x (k tach + 1)] f clk = 256 x fanspeed x (k tach + 1) / k scale if the internal oscillator is used, setting f clk to 254khz can further reduce the equations: equation 1: k scale = fanspeed x (k tach + 1) / 992 equation 2: k tach = (992 x k scale / fanspeed) - 1 equation 3: fanspeed = 992 x k scale / (k tach + 1) enter closed-loop mode by entering 10 into bits 5 and 4 of the configuration register. note that in equation 3, the fan speed is inversely pro- portional to (k tach + 1). this means the regulated fan speed is a nonlinear function of the value written to the speed register. low values written to the speed register can result in large relative changes in fan speed. for best results, design the system so that small values (such as 02h) are not needed. this is easily accom- plished because an 8-bit speed register is used, and fan-speed control should rarely need more than 16 speeds. a good compromise is to design the system (by selecting the appropriate prescaler value) so that the maximum-rated speed of the fan occurs when the speed register equals approximately 64 (decimal). although 64 is a good target value, values between 20 and 100 will work fine. the prescaler value also affects the response time and the stability of the speed-control loop. adjusting the prescaler value effectively adjusts the loop gain. a larg- er prescaler value will slow the response time and increase stability, while a smaller prescaler value will yield quicker response time. the optimum prescaler value for response time and stability depends on the fan? mechanical time constant. small, fast-spinning fans will tend to have small mechanical time constants and can benefit from smaller prescaler values. a good rule of thumb is to try the selected prescaler value in the target system. set k tach to around 75% of full scale, and watch for overshoot or oscillation in the fan speed. also look for overshoot or oscillation when k tach is changed from one value to another (e.g., from 75% of full-scale speed to 90% of full scale). if there is unacceptable overshoot or if the fan speeds up and slows down with k tach , set it to a constant value; increase the prescaler value. enter the appropriate prescaler value in bits zero to 2 of the configuration register. fan speed is a trade-off between cooling requirements, noise, power, and fan wear. in general, it is desirable (within limits) to run the fan at the slowest speed that will accomplish the cooling goals. this will reduce power consumption, increase fan life, and minimize noise. when calculating the desired fan speed, remem- ber that the above equations are written in rotations per second (rps), where most fans are specified in rota- tions per minute (rpm). write the desired fan speed to the speed register. example: assume the following: 12v fan is rated at 2000rpm at 12v. use the internal oscillator (f clk = 254khz). desired fan speed = 1500rpm (25rps). first, calculate an appropriate prescaler value (k scale ) using equation 1. attempt to get k tach as close to 64 as possible for the maximum speed of 2000rpm. set fanspeed = 33.3rps (2000rpm/60). set k tach = 64. solving equation 1 gives k scale = 2.18.
we will start with k scale = 2 (to increase stability, a 4 could be tried, or to improve response time, a 1 could be tried). second, calculate the appropriate value for the speed register (k tach ) using equation 2. set fanspeed = 25rps (1500prm/60). solving for equation 2 gives k tach = 78 for k scale = 2, k tach = 39 for k scale = 1, or k tach = 158 for k = 4. determining the tachometer count time to monitor the fan speed using the smbus/i 2 c, the next step is to determine the tachometer count time. in sys- tems running in open-loop mode, this is necessary. in closed-loop or full-speed mode, reading the tachome- ter can serve as a valuable check to ensure the fan and the control loop are operating properly. the max6650/max6651 use an 8-bit counter to count the tachometer pulses. this means the device can count from 0 to 255 tachometer pulses before overflow- ing. the max6650/max6651 can accommodate a large range of fan speeds by allowing the counting interval to be programmed. smaller/faster fans should use smaller count times. although larger fans could also use small- er count times, resolution would suffer. choose the slowest count time that will not overflow under worst- case conditions. fans are mechanical devices, and their speeds are subject to large tolerance variations. if an overflow does occur, the counter will read 255. the max6650/max6651 can be configured to generate an alert if an overflow is encountered (see setting up alarms ). note that the prescaler value has no effect on the tach0 register. enter the appropriate count-time value in the tachometer count-time register. example: assume a 12v fan rated at 2000 rpm. to accommodate large tolerance variations, choose a count time appropriate for a maximum speed of 3000rpm; 3000rpm is 50rps and generates a 100hz (2 pulses/revolution) tachometer signal. table 9 indi- cates a count time of 2s will optimize resolution. with a 2s count time, speeds as fast as 3825rpm can be monitored without overflow. the minimum resolution will be 15rpm or 0.75% of the rated speed of 2000rpm. setting up the gpios to increase versatility, the max6650/max6651 have two and five general-purpose digital inputs/outputs, respectively. these gpios can be configured through the smbus/i 2 c. digital out low all gpios can be configured to output a logic-level low. the max6650/max6651 are designed to sink up to 10ma. this high sink current can be especially useful for driving leds. on the max6651, for gpio3 and gpio4, write a zero to the appropriate location in the gpio definition register. for gpio0, gpio1, and (max6551 only) gpio2, write a 10 to the appropriate location in the gpio definition register. digital out high all gpios can be configured to generate a logic-level high. an output high is generated using an open-drain output stage with an internal pullup resistor of nominally 100k . the max6650/max6651 power-up default state is with all gpios configured as output highs. on the max6651, for gpio3 and gpio4, write a 1 to the appropriate location in the gpio definition register. for gpio0, gpio1, and (max6551 only) gpio2, write an 11 to the appropriate location in the gpio definition register. digital input since a logic-level high output is open drain with an internal pullup, an external device can actively pull this pin low. the max6650/max6651 allow the user to read the gpio value through the gpio status register. configure the gpio as an output logic level high (see above). read the state of the gpio by reading the gpio sta- tus register. alert output gpio0 can also serve as an alert output. the alert output is designed to drive an interrupt on a ?. the alert output goes low whenever an enabled alarm condition occurs (see setting up alarms ). configure gpio0 as an alert output by writing a 01 to bits 1 and 0 of the gpio definition register. full-on input gpio1 can also be configured as a full-on input. when the full-on pin is pulled low, the max6650/max6651 apply the full available voltage across the fan. this hap- pens independently of the software mode of operation. this is a particularly valuable feature in high-reliability systems, designed to prevent software malfunctions from causing system overheating. configure gpio1 as a full-on input by writing a 01 to bits 3 and 2 of the gpio definition register. fan-speed regulators and monitors with smbus/i 2 c-compatible interface 22 maxim integrated max6650/max6651
synchronizing fans gpio2 can be configured to allow multiple max6651s to synchronize the speeds of the fans they are driving (figure 14). synchronization is accomplished by having one of the max6651s (or an external clock) serve as the clock master by configuring one of the gpio2s in the system as a clock output. the remaining gpio2s in the system need to be configured as clock inputs: electrically connect all max6651 gpio2s together. configure one of the max6651? gpio2s to be a clock output, using the gpio definition register (set bits 5 and 4 to 01). configure the rest of the gpio2s as clock inputs, using the gpio definition register (set bits 5 and 4 to 00). configure all max6651s in closed-loop mode. configure all prescaler values to be equal. write identical values to all speed registers. setting up alarms the max6650/max6651 can be configured to generate an alert output on gpio0 whenever certain events, such as control loop out of regulation, tachometer over- flow, or gpi01/gpi02 being driven low, occur. this is designed to enhance the ?et and forget?functionality of the fan control system. configure gpio0 to be an alert output (see above). minimum/maximum output level alarm the minimum/maximum output level alarms are designed to warn the system when the max6650/ max6651 are unable to maintain speed regulation in closed-loop mode. the max6650/max6651 maintain speed regulation by adjusting the voltage across the fan. if the desired speed can? be attained, one of these alarms will be generated. possible causes for failure to attain the desired speed include system programming problems, incipient fan failure, and a programmed speed that the fan cannot support. the minimum output alarm occurs when the dac out- put is 00h. a dac value of 00h means that the max6650/max6651 have applied the largest available voltage across the fan. this typically means the fan is unable to spin as fast as the desired speed. the maximum output alarm occurs when the dac value is f f h . a dac value of f f h means the max6650/max6651 have tried to reduce the voltage across the fan to 0. although this would seem to indicate the fan is spinning faster than the desired speed, this should rarely hap- pen. if this alarm occurs, it probably indicates some type of system error. enable the minimum/maximum output level alarm by setting bits 0 and 1 of the alarm enable register to 11. tachometer overflow alarm if any tachometer counter overflows (reaches a count of 255), this alarm will be set. enable the overflow output level alarm by setting bit 2 of the alarm enable register bit to 1. gpio1/2 pulled low enabling this alarm causes the alert output to go low whenever gpio1 or gpio2 is pulled low. this will occur independent of the configuration of gpio1 or gpio2. enable the gpio1/gpio2 output level alarms by setting bits 3 and/or 4 of the alarm enable register bit to 1. clearing the alert once an alert is generated, determine which alarm caused the alert pin to go low. do this by reading the alarm status register. an alert output will stay active (low) even if the condition that caused the alert is removed. reading the alarm status register clears the alert , if the condition that caused the alert is gone. if the condition has not gone away, the alert will stay active. disabling the alarm with the alarm enable register will cause the alert output to go inactive. read the alarm status register. fan-speed regulators and monitors with smbus/i 2 c-compatible interface maxim integrated 23 max6650/max6651 max6501 gpio2 max6501 gpio2 max6501 gpio2 fan 1 fan 2 fan 3 clock out clock in clock in figure 14. synchronizing fans
fan-speed regulators and monitors with smbus/i 2 c-compatible interface 24 maxim integrated max6650/max6651 top view 1 2 3 4 5 10 9 8 7 6 fb v cc out gpio0 scl sda gnd tach0 max6650 max gpio1 add 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 tach0 tach1 fb v cc out gpio3 gpio2 gpio0 gpio1 qsop tach2 tach3 scl gnd sda gpio4 add max6651 pin configurations package information for the latest package outline information and land patterns ( footprints), go to www.maximintegrated.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 10 ?ax u10-2 21-0061 90-0330 16 qsop e16-1 21-0055 90-0167
fan-speed regulators and monitors with smbus/i 2 c-compatible interface max6650/max6651 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integr ated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time . the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 25 2012 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products , inc. revision number revision date description pages changed added lead-free parts to the ordering information 1 4 7/10 updated table 5 to include the pins for both the max6650 and max6651 11 5 12/12 updated the add parameters in the electrical characteristics table; updated the conditions notes for t hd:dat , t r , and t f in the timing characteristics table; updated table 1 3, 6 revision history

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