1/10 january 2005 STE30NK90Z n-channel 900v - 0.21 ? - 28a isotop zener-protected supermesh? mosfet table 1: general features typical r ds (on) = 0.21 ? extremely high dv/dt capability 100% avalanche tested gate charge minimized description the supermesh? series is obtained through an extreme optimization of st?s well established strip-based powermesh? layout. in addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. such series complements st full range of high voltage mos- fets including revolutionary mdmesh? products. applications high current, high speed switching ideal for welding equipment table 2: order codes figure 1: package figure 2: internal schematic diagram type v dss r ds(on) i d pw STE30NK90Z 900 v < 0.26 ? 28 a 500 w isotop sales type marking package packaging STE30NK90Z e30nk90z isotop tube rev.3
STE30NK90Z 2/10 table 3: absolute maximum ratings ( ) pulse width limited by safe operating area (1) i sd 28a, di/dt 200 a/s, v dd v (br)dss , table 4: thermal data table 5: avalanche characteristics table 6: gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the device?s esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device?s integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit v ds drain-source voltage (v gs = 0) 900 v v dgr drain-gate voltage (r gs = 20 k ? ) 900 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25c 28 a i d drain current (continuous) at t c = 100c 18 a i dm ( ) drain current (pulsed) 112 a p tot total dissipation at t c = 25c 500 w derating factor 4.3 w/c v esd(g-s) gate source esd(hbm-c=100pf, r=1.5k ?) 6.5 kv dv/dt (1) peak diode recovery voltage slope 4.5 v/ns v iso insulation withstand voltage (ac-rms) from all four terminals to external heatsink 2500 v t j t stg operating junction temperature storage temperature - 65 to 150 c rthj-case thermal resistance junction-case max 0.23 c/w rthj-amb thermal resistance junction-ambient max 40 c/w symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 13 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 35 v) 500 mj symbol parameter test conditions min. typ. max. unit bv gso gate-source breakdown voltage igs= 1ma (open drain) 30 v
3/10 STE30NK90Z electrical characteristics (t case =25c unless otherwise specified) table 7: on/off table 8: dynamic table 9: source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. 3. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss . symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 900 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c = 125 c 10 100 a a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 a v gs(th) gate threshold voltage v ds = v gs , i d = 150 a 3 3.75 4.5 v r ds(on) static drain-source on resistance v gs = 10v, i d = 14 a 0.21 0.26 ? symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds = 15 v , i d = 14 a 26 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 12000 852 166 pf pf pf c oss eq. (3) equivalent output capacitance v gs = 0v, v ds = 0v to 720 v 377 pf t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 450 v, i d = 13 a r g =4.7 ? v gs = 10 v (see figure 17) 67 59 250 72 ns ns ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 720 v, i d = 26 a, v gs = 10v (see figure 20) 350 51 190 490 nc nc nc symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 28 112 a a v sd (1) forward on voltage i sd = 28 a, v gs = 0 2v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 26 a, di/dt = 100 a/s v dd = 100 v, t j = 25c (see figure 18) 1 18.9 36.6 s c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 26 a, di/dt = 100 a/s v dd = 100 v, t j = 150c (see figure 18) 1.33 25.2 37.8 s c a
STE30NK90Z 4/10 figure 3: safe operating area figure 4: output characteristics figure 5: transconductance figure 6: thermal impedance figure 7: transfer characteristics figure 8: static drain-source on resistance
5/10 STE30NK90Z figure 9: gate charge vs gate-source voltage figure 10: normalized gate thereshold volt- age vs temperature figure 11: source-drain diode forward char- acteristics figure 12: capacitance variations figure 13: normalized on resistance vs tem- perature figure 14: normalized bvdss vs temperature
STE30NK90Z 6/10 figure 15: avalanche energy vs starting tj
7/10 STE30NK90Z figure 16: unclamped inductive load test cir- cuit figure 17: switching times test circuit for resistive load figure 18: test circuit for inductive load switching and diode recovery times figure 19: unclamped inductive wafeform figure 20: gate charge test circuit
STE30NK90Z 8/10 dim. mm inch min. typ. max. min. typ. max. a 11.8 12.2 0.466 0.480 b 8.9 9.1 0.350 0.358 c 1.95 2.05 0.076 0.080 d 0.75 0.85 0.029 0.033 e 12.6 12.8 0.496 0.503 f 25.15 25.5 0.990 1.003 g 31.5 31.7 1.240 1.248 h4 0.157 j 4.1 4.3 0.161 0.169 k 14.9 15.1 0.586 0.594 l 30.1 30.3 1.185 1.193 m 37.8 38.2 1.488 1.503 n4 0.157 o 7.8 8.2 0.307 0.322 b e h o n j k l m f a c g d isotop mechanical data
9/10 STE30NK90Z table 10: revision history date revision description of changes 12-may-2004 1 first release. 15-oct-2004 2 new value inserted in table 3. (v iso ) 20-jan-2005 3 final datasheet
STE30NK90Z 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america
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