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  1 lt1211/lt 1212 14mhz, 7v/ m s, single supply dual and quad precision op amps n slew rate: 7v/ m s typ n gain-bandwidth product: 14mhz typ n fast settling to 0.01% 2v step to 200 m v: 900ns typ 10v step to 1mv: 2.2 m s typ n excellent dc precision in all packages input offset voltage: 275 m v max input offset voltage drift: 6 m v/ c max input offset current: 30na max input bias current: 125na max open-loop gain: 1200v/mv min n single supply operation input voltage range includes ground output swings to ground while sinking current n low input noise voltage: 12nv/ ? hz typ n low input noise current: 0.2pa/ ? hz typ n specified on 3.3v, 5v and 15v n large output drive current: 20ma min n low supply current per amplifier: 1.8ma max n dual in 8-pin dip and so-8 n quad in 14-pin dip and narrow so-16 the lt ? 1211 is a dual, single supply precision op amp with a 14mhz gain-bandwidth product and a 7v/ m s slew rate. the lt1212 is a quad version of the same amplifier. the dc precision of the lt1211/lt1212 eliminates trims in most systems while providing high frequency perfor- mance not usually found in single supply amplifiers. the lt1211/lt1212 will operate on any supply greater than 2.5v and less than 36v total. these amplifiers are specified on single 3.3v, single 5v and 15v supplies, and only require 1.3ma of quiescent supply current per ampli- fier. the inputs can be driven beyond the supplies without damage or phase reversal of the output. the minimum output drive is 20ma, ideal for driving low impedance loads. u a o pp l ic at i ty p i ca l note: for applications requiring higher slew rate, see the lt1213/lt1214 and lt1215/lt1216 data sheets. input bias current cancellation + v in v + 1/2 lt1211 r f v out 1211/12 ta01 1m signal amp + 1/2 lt1211 r g cancellation amp 1m 22pf , ltc and lt are registered trademarks of linear technology corporation. n 2.5v full-scale 12-bit systems: v os 0.45lsb n 10v full-scale 16-bit systems: v os 1.8lsb n active filters n photo diode amplifiers n dac current-to-voltage amplifiers n battery-powered systems u s a o pp l ic at i s f ea t u re d u escriptio input voltage (v) 0.01 input current (na) 0.1 1 10 1211/12 ta02 100 90 80 70 60 50 40 30 20 10 0 v s = 5v, v out in linear region r in = 300m r in = 2.4g without cancellation with cancellation input current vs input voltage
2 lt1211/lt 1212 a u g w a w u w a r b s o lu t exi t i s total supply voltage (v + to v C ) ............................. 36v input current ..................................................... 15ma output short-circuit duration (note 1) ........ continuous operating temperature range lt1211c/lt1212c ............................ C 40 c to 85 c lt1211i/lt1212i ............................... C 40 c to 85 c lt1211m ......................................... C 55 c to 125 c specified temperature range lt1211c/lt1212c/ lt1211i/lt1212i (note 5) ................... C40 c to 85 c lt1211m ......................................... C 55 c to 125 c storage temperature range ................ C 65 c to 150 c junction temperature (note 2) plastic package (n8, s8, n, s) ........................ 150 c ceramic package (j8)...................................... 175 c lead temperature (soldering, 10 sec)................. 300 c package number of max tc v os ceramic plastic dip surface mount op amps t a range max v os (25 c) ( d v os / d t) (j) (n) (s) two (dual) C 40 c to 85 c 150 m v 1.5 m v/ c lt1211acn8 275 m v3 m v/ c lt1211cn8, LT1211IN8 275 m v6 m v/ c lt1211cs8, lt1211is8 available optio s u wu u package / o rder i for atio lt1211cn8 lt1211acn8 LT1211IN8 lt1211mj8 lt1211amj8 1211 1211i lt1212cs lt1212is t jmax = 150 c, q ja = 100 c/w t jmax = 150 c, q ja = 70 c/w t jmax = 175 c, q ja = 100 c/w (j) t jmax = 150 c, q ja = 100 c/w (n) t jmax = 150 c, q ja = 150 c/w lt1212cn lt1212in lt1211cs8 lt1211is8 order part number order part number order part number s8 part marking order part number 1 2 3 4 8 7 6 5 s8 package 8-lead plastic so 1 2 3 4 top view b a out a in a +in a v v + out b in b +in b top view s package 16-lead plastic so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 out a ?n a +in a v + +in b in b out b nc out d in d +in d v +in c in c out c nc a c b d j8 package 8-lead cerdip n8 package 8-lead pdip 1 2 3 4 8 7 6 5 top view out a in a +in a v v + out b in b +in b b a out a in a +in a v + +in b in b out b out d in d +in d v +in c in c out c 1 2 3 4 5 6 7 14 13 12 11 10 9 8 d a c b n package 14-lead pdip top view
3 lt1211/lt 1212 v s = 5v, v cm = 0.5v, v out = 0.5v, t a = 25 c, unless otherwise noted. lt1211ac lt1211c/lt1211m lt1211am lt1212c symbol parameter conditions min typ max min typ max units v os input offset voltage 75 150 100 275 m v d v os long-term input offset 0.5 0.6 m v/mo d time voltage stability i os input offset current 5 20 5 30 na i b input bias current 50 100 60 125 na input noise voltage 0.1hz to 10hz 250 250 nv p-p e n input noise voltage density f o = 10hz 12.5 12.5 nv/ ? hz f o = 1000hz 12.0 12.0 nv/ ? hz i n input noise current density f o = 10hz 0.9 0.9 pa/ ? hz f o = 1000hz 0.2 0.2 pa/ ? hz input resistance (note 3) differential mode 10 40 10 40 m w common mode 500 500 m w input capacitance f = 1mhz 10 10 pf input voltage range 3.5 3.8 3.5 3.8 v 0 C 0.3 0 C 0.3 v cmrr common-mode rejection ratio v cm = 0v to 3.5v 90 105 86 102 db psrr power supply rejection ratio v s = 2.5v to 12.5v 90 115 87 110 db a vol large-signal voltage gain v o = 0.05v to 3.7v, r l = 500 w 250 560 250 560 v/mv maximum output voltage swing output high, no load 4.30 4.40 4.30 4.40 v (note 4) output high, i source = 1ma 4.20 4.30 4.20 4.30 v output high, i source = 15ma 3.85 4.00 3.85 4.00 v output low, no load 0.003 0.006 0.003 0.006 v output low, i sink = 1ma 0.047 0.065 0.047 0.065 v output low, i sink = 15ma 0.362 0.500 0.362 0.500 v i o maximum output current (note 9) 20 50 20 50 ma sr slew rate a v = C 2 4 4 v/ m s gbw gain-bandwidth product f = 100khz 13 13 mhz i s supply current per amplifier 0.9 1.3 1.8 0.9 1.3 1.8 ma minimum supply voltage single supply 2.2 2.5 2.2 2.5 v full power bandwidth a v = 1, v o = 2.5v p-p 300 300 khz t r , t f rise time, fall time a v = 1, 10% to 90%, v o = 100mv 45 45 ns os overshoot a v = 1, v o = 100mv 25 25 % t pd propagation delay a v = 1, v o = 100mv 36 36 ns t s settling time 0.01%, a v = 1, d v o = 2v 900 900 ns open-loop output resistance i o = 0ma, f = 5mhz 75 75 w thd total harmonic distortion a v = 1, v o = 1v rms , 20hz to 20khz 0.001 0.001 % package number of max tc v os ceramic plastic dip surface mount op amps t a range max v os (25 c) ( d v os / d t) (j) (n) (s) two (dual) C 55 c to 125 c 150 m v 1.5 m v/ c lt1211amj8 275 m v3 m v/ c lt1211mj8 four (quad) C 40 c to 85 c 275 m v6 m v/ c lt1212cn, lt1212cs, lt1212in lt1212is available optio s u 5v e lectr ic al c c hara terist ics
4 lt1211/lt 1212 5v e lectr ic al c c hara terist ics v s = 5v, v cm = 0.5v, v out = 0.5v, 0 c t a 70 c, unless otherwise noted. lt1211ac lt1211c/lt1212c symbol parameter conditions min typ max min typ max units v os input offset voltage 100 175 150 375 m v d v os input offset voltage drift 8-pin dip package 0.7 1.5 1 3 m v/ c d t (note 3) 14-pin dip, soic package 2 6 m v/ c i os input offset current 5 25 10 35 na i b input bias current 60 110 70 135 na input voltage range 3.4 3.5 3.4 3.5 v 0.1 C 0.1 0.1 C 0.1 v cmrr common-mode rejection ratio v cm = 0.1v to 3.4v 89 105 85 102 db psrr power supply rejection ratio v s = 2.5v to 12.5v 89 114 86 110 db a vol large-signal voltage gain v o = 0.05v to 3.7v, r l = 500 w 150 430 150 430 v/mv maximum output voltage swing output high, no load 4.20 4.33 4.20 4.33 v (note 4) output high, i source = 1ma 4.10 4.23 4.10 4.23 v output high, i source = 10ma 3.90 4.03 3.90 4.03 v output low, no load 0.004 0.007 0.004 0.007 v output low, i sink = 1ma 0.052 0.070 0.052 0.070 v output low, i sink = 10ma 0.290 0.400 0.290 0.400 v i s supply current per amplifier 0.8 1.4 2.1 0.8 1.4 2.1 ma v s = 5v, v cm = 0.5v, v out = 0.5v, C 40 c t a 85 c, unless otherwise noted. (note 5) lt1211c/lt1212c lt1211ac lt1211i/lt1212i symbol parameter conditions min typ max min typ max units v os input offset voltage 120 200 175 500 m v d v os input offset voltage drift 8-pin dip package 0.7 1.5 1 3 m v/ c d t (note 3) 14-pin dip, soic package 2 6 m v/ c i os input offset current 10 30 20 50 na i b input bias current 70 120 80 145 na input voltage range 3.1 3.2 3.1 3.2 v 0.2 0 0.2 0 v cmrr common-mode rejection ratio v cm = 0.2v to 3.1v 88 104 84 101 db psrr power supply rejection ratio v s = 2.5v to 12.5v 88 113 85 109 db a vol large-signal voltage gain v o = 0.05v to 3.7v, r l = 500 w 100 390 100 390 v/mv maximum output voltage swing output high, no load 4.15 4.25 4.15 4.25 v (note 4) output high, i source = 1ma 4.00 4.16 4.00 4.16 v output high, i source = 10ma 3.80 3.96 3.80 3.96 v output low, no load 0.005 0.008 0.005 0.008 v output low, i sink = 1ma 0.053 0.075 0.053 0.075 v output low, i sink = 10ma 0.300 0.420 0.300 0.420 v i s supply current per amplifier 0.7 1.5 2.2 0.7 1.5 2.2 ma
5 lt1211/lt 1212 5v e lectr ic al c c hara terist ics v s = 5v, v cm = 0.5v, v out = 0.5v, C 55 c t a 125 c, unless otherwise noted. lt1211am lt1211m symbol parameter conditions min typ max min typ max units v os input offset voltage 140 250 200 500 m v d v os input offset voltage drift 0.7 1.5 1 3 m v/ c d t (note 3) i os input offset current 15 40 25 75 na i b input bias current 75 130 85 160 na input voltage range 3.1 3.2 3.1 3.2 v 0.4 0.2 0.4 0.2 v cmrr common-mode rejection ratio v cm = 0.4v to 3.1v 87 104 81 101 db psrr power supply rejection ratio v s = 2.5v to 12.5v 87 113 84 109 db a vol large-signal voltage gain v o = 0.05v to 3.7v, r l = 500 w 100 250 100 250 v/mv maximum output voltage swing output high, no load 4.10 4.20 4.10 4.20 v (note 4) output high, i source = 1ma 3.95 4.10 3.95 4.10 v output high, i source = 10ma 3.70 3.90 3.70 3.90 v output low, no load 0.007 0.010 0.007 0.010 mv output low, i sink = 1ma 0.060 0.085 0.060 0.085 mv output low, i sink = 10ma 0.350 0.500 0.350 0.500 mv i s supply current per amplifier 0.5 1.7 2.5 0.5 1.7 2.5 ma v s = 15v, v cm = 0v, v out = 0v, t a = 25 c, unless otherwise noted. lt1211ac lt1211c/lt1211m lt1211am lt1212c symbol parameter conditions min typ max min typ max units v os input offset voltage 125 400 150 550 m v i os input offset current 5 20 5 30 na i b input bias current 45 95 50 120 na input voltage range 13.5 13.8 13.5 13.8 v C15.0 C 15.3 C15.0 C 15.3 v cmrr common-mode rejection ratio v cm = C15v to 13.5v 90 105 86 102 db psrr power supply rejection ratio v s = 2v to 18v 90 113 87 110 db a vol large-signal voltage gain v o = 0v to 10v, r l = 2k 1200 5000 1200 5000 v/mv maximum output voltage swing output high, i source = 15ma 13.8 14.0 13.8 14.0 v output low, i sink = 15ma C14.4 C14.6 C14.4 C14.6 v i o maximum output current (note 9) 20 50 20 50 ma sr slew rate a v = C 2 (note 6) 5 7 5 7 v/ m s gbw gain-bandwidth product f = 100khz 8 14 8 14 mhz i s supply current per amplifier 0.9 1.8 2.5 0.9 1.8 2.5 ma channel separation v o = 10v, r l = 2k 128 140 128 140 db minimum supply voltage equal split supplies 1.2 2.0 1.2 2.0 v full power bandwidth a v = 1, v o = 20v p-p 60 60 khz settling time 0.01%, a v = 1, d v o = 10v 2.2 2.2 m s + 15v e lectr ic al c c hara terist ics C
6 lt1211/lt 1212 v s = 15v, v cm = 0v, v out = 0v, 0 c t a 70 c, unless otherwise noted. + C 15v e lectr ic al c c hara terist ics lt1211am lt1211m symbol parameter conditions min typ max min typ max units v os input offset voltage 200 500 300 800 m v d v os input offset voltage drift 0.7 1.5 1 3 m v/ c d t (note 3) i os input offset current 10 40 10 60 na i b input bias current 55 110 60 140 na input voltage range 13.1 13.2 13.1 13.2 v C14.6 C14.8 C14.6 C14.8 v cmrr common-mode rejection ratio v cm = C 14.6v to 13.1v 87 103 81 100 db psrr power supply rejection ratio v s = 2v to 15v 87 111 84 107 db a vol large-signal voltage gain v o = 0v to 10v, r l = 2k 800 1500 800 1500 v/mv maximum output voltage swing output high, i source = 10ma 13.6 13.8 13.6 13.8 v output low, i sink = 10ma C14.3 C14.5 C14.3 C14.5 v i s supply current per amplifier 0.5 2.3 3.4 0.5 2.3 3.4 ma lt1211c/lt1212c lt1211ac lt1211i/lt1212i symbol parameter conditions min typ max min typ max units v os input offset voltage 175 450 250 700 m v d v os input offset voltage drift 8-pin dip package 0.7 1.5 1 3 m v/ c d t (note 3) 14-pin dip, soic package 2 6 m v/ c i os input offset current 10 25 10 40 na i b input bias current 55 100 60 130 na input voltage range 13.1 13.2 13.1 13.2 v C14.8 C15.0 C14.8 C15.0 v cmrr common-mode rejection ratio v cm = C 14.8v to 13.1v 88 103 84 100 db psrr power supply rejection ratio v s = 2v to 18v 88 111 85 107 db a vol large-signal voltage gain v o = 0v to 10v, r l = 2k 1000 3000 1000 3000 v/mv maximum output voltage swing output high, i source = 10ma 13.7 13.9 13.7 13.9 v output low, i sink = 10ma C 14.5 C 14.7 C 14.5 C 14.7 v i s supply current per amplifier 0.7 2.2 3.0 0.7 2.2 3.0 ma lt1211ac lt1211c/lt1212c symbol parameter conditions min typ max min typ max units v os input offset voltage 150 425 200 650 m v d v os input offset voltage drift 8-pin dip package 0.7 1.5 1 3 m v/ c d t (note 3) 14-pin dip, soic package 2 6 m v/ c i os input offset current 10 20 10 35 na i b input bias current 55 100 60 125 na input voltage range 13.4 13.5 13.4 13.5 v C14.9 C15.1 C14.9 C15.1 v cmrr common-mode rejection ratio v cm = C14.9v to 13.4v 89 104 85 101 db psrr power supply rejection ratio v s = 2v to 18v 89 112 86 108 db a vol large-signal voltage gain v o = 0v to 10v, r l = 2k 1000 3500 1000 3500 v/mv maximum output voltage swing output high, i source = 10ma 13.8 14.0 13.8 14.0 v output low, i sink = 10ma C 14.5 C 14.7 C 14.5 C 14.7 v i s supply current per amplifier 0.8 2.1 2.9 0.8 2.1 2.9 ma v s = 15v, v cm = 0v, v out = 0v, C 55 c t a 125 c, unless otherwise noted. v s = 15v, v cm = 0v, v out = 0v, C 40 c t a 85 c, unless otherwise noted. (note 5)
7 lt1211/lt 1212 3.3v e lectr ic al c c hara terist ics v s = 3.3v, v cm = 0.5v, v out = 0.5v, t a = 25 c, unless otherwise noted. (note 7) lt1211am lt1211m symbol parameter conditions min typ max min typ max units v os input offset voltage 130 250 200 500 m v input voltage range (note 8) 1.4 1.5 1.4 1.5 v 0.4 0.2 0.4 0.2 v maximum output voltage swing output high, no load 2.40 2.50 2.40 2.50 v output high, i source = 1ma 2.25 2.40 2.25 2.40 v output high, i source = 10ma 2.00 2.20 2.00 2.20 v output low, no load 0.007 0.010 0.007 0.010 v output low, i sink = 1ma 0.060 0.085 0.060 0.085 v output low, i sink = 10ma 0.350 0.500 0.350 0.500 v lt1211ac lt1211c/lt1211m lt1211am lt1212c symbol parameter conditions min typ max min typ max units v os input offset voltage 75 150 100 275 m v input voltage range (note 8) 1.8 2.1 1.8 2.1 v 0C0.3 0C0.3 v maximum output voltage swing output high, no load 2.60 2.70 2.60 2.70 v output high, i source = 1ma 2.50 2.60 2.50 2.60 v output high, i source = 15ma 2.15 2.30 2.15 2.30 v output low, no load 0.003 0.006 0.003 0.006 v output low, i sink = 1ma 0.047 0.065 0.047 0.065 v output low, i sink = 15ma 0.362 0.500 0.362 0.500 v i o maximum output current 20 50 20 50 ma v s = 3.3v, v cm = 0.5v, v out = 0.5v, C 55 c t a 125 c, unless otherwise noted. (note 7) v s = 3.3v, v cm = 0.5v, v out = 0.5v, 0 c t a 70 c, unless otherwise noted. (note 7) lt1211c/lt1212c lt1211ac lt1211i/lt1212i symbol parameter conditions min typ max min typ max units v os input offset voltage 120 200 175 500 m v input voltage range (note 8) 1.4 1.5 1.4 1.5 v 0.2 0 0.2 0 v maximum output voltage swing output high, no load 2.45 2.55 2.45 2.55 v output high, i source = 1ma 2.30 2.46 2.30 2.46 v output high, i source = 10ma 2.10 2.26 2.10 2.26 v output low, no load 0.005 0.008 0.005 0.008 v output low, i sink = 1ma 0.053 0.075 0.053 0.075 v output low, i sink = 10ma 0.300 0.420 0.300 0.420 v v s = 3.3v, v cm = 0.5v, v out = 0.5v, C 40 c t a 85 c, unless otherwise noted. (notes 5, 7) lt1211ac lt1211c/lt1212c symbol parameter conditions min typ max min typ max units v os input offset voltage 100 175 150 375 m v input voltage range (note 8) 1.7 1.4 1.7 1.8 v 0.1 C 0.1 0.1 C 0.1 v maximum output voltage swing output high, no load 2.50 2.63 2.50 2.63 v output high, i source = 1ma 2.40 2.53 2.40 2.53 v output high, i source = 10ma 2.20 2.33 2.20 2.33 v output low, no load 0.004 0.007 0.004 0.007 v output low, i sink = 1ma 0.052 0.070 0.052 0.070 v output low, i sink = 10ma 0.290 0.400 0.290 0.400 v
8 lt1211/lt 1212 note 1: a heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. note 2: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formulas: lt1211mj8, lt1211amj8: t j = t a + (p d 100 c/w) lt1211cn8, lt1211acn8: t j = t a + (p d 100 c/w) lt1211cs8: t j = t a + (p d 150 c/w) lt1212cn: t j = t a + (p d 70 c/w) lt1212cs: t j = t a + (p d 100 c/w) note 3: this parameter is not 100% tested. note 4: guaranteed by correlation to 3.3v and 15v tests. note 5: the lt1211c/lt1212c are guaranteed to meet specified performance from 0 c to 70 c and are designed, characterized and expected to meet these extended temperature limits, but are not tested at C40 c and 85 c. the lt1211i/lt1212i are guaranteed to meet the extended temperature limits. note 6: slew rate is measured between 8.5v on an output swing of 10v on 15v supplies. note 7: most lt1211/lt1212 electrical characteristics change very little with supply voltage. see the 5v tables for characteristics not listed in the 3.3v table. note 8: guaranteed by correlation to 5v and 15v tests. note 9: guaranteed by correlation to 3.3v tests. cc hara terist ics uw a t y p i ca lper f o r c e e lectr ic al c c hara terist ics input offset voltage ( m v) 350 percent of units (%) 70 60 50 40 30 20 10 0 150 50 150 1211/12 g01 250 ?0 250 350 lt1211 j8 package lt1211 n8 package v s = 5v input offset voltage ( m v) 700 percent of units (%) 70 60 50 40 30 20 10 0 300 100 300 1211/12 g03 500 100 500 700 lt1211 j8 package lt1211 n8 package v s = 15v input offset voltage ( m v) 350 percent of units (%) 70 60 50 40 30 20 10 0 150 50 150 1211/12 g04 250 ?0 250 350 lt1211 s8 package lt1212 n package lt1212 s package v s = 5v input offset voltage ( m v) 700 percent of units (%) 70 60 50 40 30 20 10 0 300 100 300 1211/12 g06 500 100 500 700 lt1211 s8 package lt1212 n package lt1212 s package v s = 15v distribution of offset voltage drift distribution of input offset voltage with temperature distribution of input offset voltage distribution of offset voltage drift distribution of input offset voltage with temperature distribution of input offset voltage offset voltage drift with temperature ( m v/ c) ? percent of units (%) 50 40 30 20 10 0 3 1211/12 g02 ? ? 1 lt1211 j8 package lt1211 n8 package v s = 5v 02 offset voltage drift with temperature ( m v/ c) ? percent of units (%) 50 40 30 20 10 0 6 1211/12 g05 ? ? 2 lt1211 s8 package lt1212 n package lt1212 s package v s = 5v 04
9 lt1211/lt 1212 cc hara terist ics uw a t y p i ca lper f o r c e voltage gain, phase vs gain-bandwidth product, voltage gain vs frequency frequency phase margin vs supply voltage frequency (hz) 1 voltage gain (db) 100m 1211/12 g07 100 10k 1m 140 120 100 80 60 40 20 0 ?0 10 1k 100k 10m c l = 20pf r l = 2k v s = 5v v s = 15v total supply voltage (v) 1 gain-bandwidth product (mhz) 16 15 14 13 12 11 10 10 40 1211/12 g09 60 50 40 30 20 10 0 3 5 7 20 30 phase margin (deg) t a = 25 c t a = 125 c t a = 25 c, 125 c t a = 55 c t a = 55 c temperature ( c) ?0 slew rate (v/ m s) 10 8 6 4 2 ?5 05075 1211/12 g10 100 125 25 v s = 15v v s = 5v t a = 25 c a v = 2 r l = 10k frequency (hz) output swing (v p-p ) 5 4 3 2 1 0 10k 100k 1m 1211/12 g13 1k a v = 1 a v = 1 v s = 5v 100 frequency (hz) output swing (v p-p ) 30 25 20 15 10 5 0 10k 100k 1m 1211/12 g14 1k 100 v s = 15v slew rate vs temperature slew rate vs supply voltage capacitive load handling undistorted output swing undistorted output swing total harmonic distortion and vs frequency, v s = 5v vs frequency, v s = 15v noise vs frequency frequency (hz) 100k voltage gain (db) 60 40 20 0 ?0 1m 10m 100m 1211/12 g08 100 80 60 40 20 0 20 40 ?0 phase shift (deg) phase gain v s = 5v v s = 15v v s = 5v v s = 15v c l = 20pf r l = 2k total supply voltage (v) 0 slew rate (v/ m s) 8 16 20 36 412 24 28 32 10 8 6 4 2 0 1211/12 g11 a v = 2 r l = 10k t a = 125 c t a = 25 c t a = 55 c capacitive load (pf) 10 overshoot (%) 80 70 60 50 40 30 20 10 0 100 10000 1211/12 g12 a v = 1 a v = 5 a v = 10 v s = 5v 1000 frequency (hz) total harmonic distortion and noise (%) 10 1k 10k 100k 1211/12 g15 100 0.1 0.01 0.001 0.0001 v s = 5v v o = 3v p-p r l = 1k a v = 10 a v = 1
10 lt1211/lt 1212 cc hara terist ics uw a t y p i ca lper f o r c e open-loop voltage gain positive output saturation vs supply voltage open-loop gain, v s = 5v voltage vs temperature output short-circuit current channel separation vs frequency vs temperature output impedance vs frequency negative output saturation voltage gain vs load resistance open-loop gain, v s = 15v voltage vs temperature temperature ( c) ?0 saturation voltage, v + ?v out (v) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 25 75 ?5 0 50 100 125 i source = 20ma v s = 5v i source = 10ma i source = 1ma i source = 10 m a 1211/12 g18 01234 output (v) 1211/12 g17 C10 0 10 output (v) 1211/12 g20 case temperature ( c) ?0 output short-circuit current (ma) 60 50 40 30 20 25 75 ?5 0 50 100 125 1211/12 g23 v s = 15v sourcing or sinking v s = 5v sourcing temperature ( c) ?0 saturation voltage, v out ?v (mv) 1000 100 10 1 25 125 1211/12 g21 i sink = 20ma v s = 5v 0 25 50 100 75 i sink = 10ma i sink = 1ma i sink = 10 m a frequency (hz) 10k output impedance ( w ) 1000 100 10 1 0.1 0.01 100k 1m 10m 1211/12 g24 a v = 100 v s = 15v a v = 10 a v = 1 load resistance ( w ) 10 open-loop voltage gain (v/mv) 10k 1k 100 10 100 1k 10k 1211/12 g19 t a = 25 c v s = 5v v s = 15v r l = 2k r l = 500 w r l = 2k r l = 500 w total supply voltage (v) 0 open-loop voltage gain (v/mv) 8 16 20 36 412 24 28 32 6k 5k 4k 3k 2k 1k 0 1211/12 g16 t a = 25 c t a = 55 c r l = 2k t a = 125 c frequency (hz) channel separation (db) 140 130 120 110 100 90 80 70 60 50 40 30 10k 100k 10m 1211/12 g22 1m v s = 15v t a = 25 c input, 5 m v/div input, 5 m v/div
11 lt1211/lt 1212 250 m v/div 200ns/div v s = 5v a v = 1 1211/12 g31 500mv/div 5v settling cc hara terist ics uw a t y p i ca lper f o r c e 15v small-signal response 100ns/div v s = 15v a v = 1 1211/12 g28 5v small-signal response 100ns/div v s = 5v a v = 1 1211/12 g25 settling time to 0.01% vs output step 2 m s/div v s = 15v a v = C1 r f = r g = 1k 1211/12 g30 10v 0v C10v 15v large-signal response 3v 0v 500ns/div v s = 5v a v = C1 r f = r g = 1k c f = 20pf 1211/12 g27 5v large-signal response 10v 0v C10v 2 m s/div v s = 15v a v = 1 1211/12 g29 15v large-signal response 3v 0v 500ns/div v s = 5v a v = 1 1211/12 g26 5v large-signal response 1mv/div 2v/div 500ns/div v s = 15v a v = C1 1211/12 g32 15v settling 20mv/div 20mv/div settling time ( m s) 0.5 output step (v) 1.0 2.0 1211/12 g33 10 8 6 4 2 0 ? ? ? ? ?0 2.5 inverting v s = 15v 1.5 noninverting noninverting inverting
12 lt1211/lt 1212 cc hara terist ics uw a t y p i ca lper f o r c e input noise current, noise common-mode rejection ratio input referred power supply voltage density vs frequency vs frequency rejection ratio vs frequency input bias current vs common-mode range input bias current vs temperature common-mode voltage vs temperature supply current vs supply voltage supply current vs temperature warm-up drift vs time supply voltage (v) 0 supply current per amplifier (ma) 2 1 0 2 4 5 1211/12 g34 13 t a = 125 c t a = 25 c t a = 55 c frequency (hz) 130 120 110 100 90 80 70 60 50 40 30 1k 100k 1m 10m 1211/12 g42 10k negative supply power supply rejection ratio (db) v s = 15v a v = 100 positive supply temperature ( c) common-mode range (v) v + v + ? v + ? 1211/12 g39 v +1 v ? v ? ?0 25 75 ?5 0 50 100 125 temperature ( c) ?0 supply current per amplifier (ma) 2.6 2.2 1.8 1.4 1.0 0.6 ?5 05075 1211/12 g35 100 125 25 v s = 15v v s = 5v time after power-up (sec) 0 change in offset voltage ( m v) 2 1 0 ? ? 40 1211/12 g36 10 20 30 50 v s = 5v r l = 2 typical amplifiers temperature ( c) ?0 input bias current (na) 100 90 80 70 60 50 40 30 25 75 ?5 0 50 100 125 1211/12 g37 i os +i b ? b v s = 5v common-mode voltage (v) ? input bias current (na) 0 20 40 60 80 100 3 1211/12 g38 0 1 2 4 t a = 55 c v s = 5v t a = 125 c t a = 25 c frequency (hz) 10k common-mode rejection ratio (db) 110 100 90 80 70 60 50 40 30 20 10 100k 1m 10m 1211/12 g41 v s = 5v frequency (hz) 20 18 16 14 12 10 8 6 4 2 0 10 1k 10k 100k 1211/12 g40 100 current noise input noise voltage density (nv/ ? hz) v s = 15v t a = 25 c r s = 0 w voltage noise input noise current density (pa/ ? hz) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0
13 lt1211/lt 1212 u s a o pp l ic at i wu u i for atio supply voltage the lt1211/lt1212 op amps are fully functional and all internal bias circuits are in regulation with 2.2v of supply. the amplifiers will continue to function with as little as 1.5v, although the input common-mode range and the phase margin are about gone. the minimum operating supply voltage is guaranteed by the psrr tests which are done with the input common mode equal to 500mv and a minimum supply voltage of 2.5v. the lt1211/lt1212 are guaranteed over the full C 55 c to 125 c range with a minimum supply voltage of 2.5v. the positive supply pin of the lt1211/lt1212 should be bypassed with a small capacitor (about 0.01 m f) within an inch of the pin. when driving heavy loads and for good settling time, an additional 4.7 m f capacitor should be used. when using split supplies, the same is true for the negative supply pin. power dissipation the lt1211/lt1212 amplifiers combine high speed and large output current drive into very small packages. be- cause these amplifiers work over a very wide supply range, it is possible to exceed the maximum junction temperature under certain conditions. to insure that the lt1211/ lt1212 are used properly, calculate the worst case power dissipation, define the maximum ambient temperature, select the appropriate package and then calculate the maximum junction temperature. the worst case amplifier power dissipation is the total of the quiescent current times the total power supply voltage plus the power in the ic due to the load. the quiescent supply current of the lt1211/lt1212 has a positive tem- perature coefficient. the maximum supply current of each amplifier at 125 c is given by the following formula: i smax = 2.5 + 0.036 ? (v s C 5) in ma v s is the total supply voltage. the power in the ic due to the load is a function of the output voltage, the supply voltage and load resistance. the worst case occurs when the output voltage is at half supply, if it can go that far, or its maximum value if it cannot reach half supply. for example, calculate the worst case power dissipation while operating on 15v supplies and driving a 500 w load. i smax = 2.5 + 0.036 ? (30 C 5) = 3.4ma p dmax = 2 ? v s ? i smax + (v s C v omax ) ? v omax /r l p dmax = 2 ? 15v 3.4ma + (15v C 7.5v) ? 7.5v/500 = 0.102 + 0.113 = 0.215w per amp if this is the quad lt1212, the total power in the package is four times that, or 0.860w. now calculate how much the die temperature will rise above the ambient. the total power dissipation times the thermal resistance of the package gives the amount of temperature rise. for this example, in the so surface mount package, the thermal resistance is 100 c/w junction-to-ambient in still air. temperature rise = p dmax ? q ja = 0.860w ? 100 c/w = 86 c the maximum junction temperature allowed in the plastic package is 150 c. therefore the maximum ambient al- lowed is the maximum junction temperature less the temperature rise. maximum ambient = 150 c C 86 c = 64 c that means the so quad can only be operated at or below 64 c on 15v supplies with a 500 w load. as a guideline to help in the selection of the lt1211/ lt1212, the following table describes the maximum sup- ply voltage that can be used with each part based on the following assumptions: 1. the maximum ambient is 70 c or 125 c depending on the part rating. 2. the load is 500 w , includes the feedback resistors. 3. the output can be anywhere between the supplies. part max supplies max power at max t a lt1211mj8 19.5v or 16.4v 500mw lt1211cn8 25.2v or 18.0v 800mw lt1211cs8 20.3v or 17.1v 533mw lt1212cn 21.0v or 17.8v 1143mw lt1212cs 17.3v or 14.4v 800mw
14 lt1211/lt 1212 u s a o pp l ic at i wu u i for atio positive rail, is about 100 w as the output starts to source current; this resistance drops to about 25 w as the current increases. therefore when the output sources 1ma, the output will swing to within 0.7v of the positive supply. while sourcing 20ma, it is within 1.1v of the positive supply. the output of the lt1211/lt1212 will swing to within 3mv of the negative supply while sinking zero current. thus, in a typical single supply application with the load going to ground, the output will go to within 3mv of ground. the open-loop output resistance when the output is driven hard into the negative rail is about 44 w at low currents and reduces to about 24 w at high currents. therefore, when the output sinks 1ma, the output is about 42mv above the negative supply and while sinking 20ma, it is about 480mv above it. the output of the lt1211/lt1212 has reverse-biased diodes to each supply. if the output is forced beyond either supply, unlimited currents will flow. if the current is transient and limited to several hundred ma, no damage will occur. feedback components because the input currents of the lt1211/lt1212 are less than 125na, it is possible to use high value feedback resistors to set the gain. however, care must be taken to insure that the pole that is formed by the feedback resis- tors and the input capacitance does not degrade the stability of the amplifier. for example, if a single supply, noninverting gain of two is set with two 20k resistors, the lt1211/lt1212 will probably oscillate. this is because the amplifier goes open-loop at 3mhz (6db of gain) and has 50 of phase margin. the feedback resistors and the 10pf input capacitance generate a pole at 1.6mhz that introduces 63 of phase shift at 3mhz! the solution is simple; use lower value resistors or add a feedback capacitor of 10pf or more. inputs typically, at room temperature, the inputs of the lt1211/ lt1212 can common mode 400mv below ground (v C ) and to within 1.2v of the positive supply with the amplifier still functional. however the input bias current and offset voltage will shift as shown in the characteristic curves. for full precision performance, the common-mode range should be limited between ground (v C ) and 1.5v below the positive supply. when either of the inputs is taken below ground (v C ) by more than about 700mv, that input bias current will increase dramatically. the current is limited by internal 100 w resistors between the input pins and diodes to each supply. the output will remain low (no phase reversal) for inputs 1.3v below ground (v C ). if the output does not have to sink current, such as in a single supply system with a 1k load to ground, there is no phase reversal for inputs up to 8v below ground. there are no clamps across the inputs of the lt1211/ lt1212 and therefore each input can be forced to any voltage between the supplies. the input current will re- main constant at about 60na over most of this range. when an input gets closer than 1.5v to the positive supply, that input current will gradually decrease to zero until the input goes above the supply, then it will increase due to the previously mentioned diodes. if the inverting input is held more positive than the noninverting input by 200mv or more, while at the same time the noninverting input is within 300mv of ground (v C ), then the supply current will increase by 1ma and the noninverting input current will increase to about 10 m a. this should be kept in mind in comparator applications where the inverting input stays above ground (v C ) and the noninverting input is at or near ground (v C ). output the output of the lt1211/lt1212 will swing to within 0.60v of the positive supply with no load. the open-loop output resistance, when the output is driven hard into the
15 lt1211/lt 1212 u s a o pp l ic at i wu u i for atio comparator applications sometimes it is desirable to use an op amp as a compara- tor. when operating the lt1211/lt1212 on a single 3.3v or 5v supply, the output interfaces directly with most ttl and cmos logic. the response time of the lt1211/lt1212 is a strong function of the amount of input overdrive as shown in the 4 2 0 100 0 v s = 5v 1211/12 ai01 r l = 4 2 0 100 0 5 m s/div v s = 5v 1211/12 ai02 r l = lt1211 comparator response (+) 20mv, 10mv, 5mv, 2mv overdrives lt1211 comparator response (C) 20mv, 10mv, 5mv, 2mv overdrives w i spl ii f ed s w a ch e ti c following photos. these amplifiers are unity-gain stable op amps and not fast comparators, therefore, the logic being driven may oscillate due to the long transition time. the output can be speeded up by adding 20mv or more of hysteresis (positive feedback), but the offset is then a function of the input direction. input (mv) output (v) output (v) input (mv) c i q5 q10 c f r f i 7 i 8 c o v c m bias out v + i 6 i 5 i 4 i 3 i 2 i 1 ?n +in 1211/12 ss q7 q9 q8 q11 q12 q14 q15 q13 q16 q6 q3 q4 q1 q2 5 m s/div
16 lt1211/lt 1212 u s a o pp l ic at i ty p i ca l 1a voltage-controlled current source v in v + r l i out 1211/12 ta04 1k 1k 1k 1k 100 w 500pf i out = v in 1 w t r < 1 m s si9430dy p-channel 1 w + 1/2 lt1211 + v in v + 1/2 lt1211 r l i out 1211/12 ta05 1k 100 w 500pf si9410dy n-channel 1 w v + i out = v in 1 w t r < 1 m s 1a voltage-controlled current sink
17 lt1211/lt 1212 package descriptio u dimensions in inches (millimeters) unless otherwise noted. j8 package 8-lead cerdip (narrow 0.300, hermetic) (ltc dwg # 05-08-1110) j8 1197 0.014 ?0.026 (0.360 ?0.660) 0.200 (5.080) max 0.015 ?0.060 (0.381 ?1.524) 0.125 3.175 min 0.100 0.010 (2.540 0.254) 0.300 bsc (0.762 bsc) 0.008 ?0.018 (0.203 ?0.457) 0 ?15 0.005 (0.127) min 0.405 (10.287) max 0.220 ?0.310 (5.588 ?7.874) 12 3 4 87 65 0.025 (0.635) rad typ 0.045 ?0.068 (1.143 ?1.727) full lead option 0.023 ?0.045 (0.584 ?1.143) half lead option corner leads option (4 plcs) 0.045 ?0.068 (1.143 ?1.727) note: lead dimensions apply to solder dip/plate or tin plate leads
18 lt1211/lt 1212 package descriptio u dimensions in inches (millimeters) unless otherwise noted. n package 14-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n14 1197 0.020 (0.508) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.045 ?0.065 (1.143 ?1.651) 0.065 (1.651) typ 0.018 0.003 (0.457 0.076) 0.100 0.010 (2.540 0.254) 0.005 (0.125) min 0.255 0.015* (6.477 0.381) 0.770* (19.558) max 3 1 2 4 5 6 7 8 9 10 11 12 13 14 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n8 1197 0.100 0.010 (2.540 0.254) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm)
19 lt1211/lt 1212 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio u dimensions in inches (millimeters) unless otherwise noted. s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 s16 0695 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s package 16-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
20 lt1211/lt 1212 12112fa lt/tp 0798 2k rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com ? linear technology corporation 1993 part number description comments lt1213/lt1214 28mhz, 12v/ m s, single supply dual and quad precision op amps twice as fast as lt1211 lt1215/lt1216 23mhz, 50v/ m s, single supply dual and quad precision op amps seven times lt1211 slew rate lt1498/lt1499 10mhz, 6v/ m s, dual/quad rail-to-rail input and output precision c-load op amps rail-to-rail lt1211 lt1630/lt1631 30mhz, 10v/ m s, dual/quad rail-to-rail input and output precision op amps rail-to-rail lt1213 lt1632/lt1633 45mhz, 45v/ m s, dual/quad rail-to-rail input and output precision op amps rail-to-rail lt1215 frequency (hz) 10k gain (db) 10 0 10 20 30 40 50 60 70 80 ?0 100k 1m 10m 1211/12 ta03b r1 2.94k 20k c1 1000pf 1211/12 ta03a v out 1 m f r2 866 w v in 13k + 2.94k 1.21k c2 1000pf 1000pf 2.10k 1000pf 3.3v 1. 21k 12-bit accurate signal range from 6mv to 1.8v on 3.3v single supply. maximum output offset error is 676 m v. for each 2nd order section: w o 2 = 1 c1c2r1r2 r1 = 1 w o qc1 r2 = q w o c2 + 1/4 lt1211 + 1/4 lt1211 + 1/4 lt1211 + 1/4 lt1211 single supply, 100khz, 4th order butterworth lowpass filter related parts typical applicatio u


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