phase-aligned clock multiplier CY2303 cypress semiconductor corporation ? 3901 north first street san jose ca 95134 408-943-2600 document #: 38-07249 rev. *a revised december 7, 2002 3 functional description the CY2303 is a 3 output 3.3v phase-aligned system clock designed to distribute high-speed clocks in pc, workstation, datacom, telecom, and other high-performance applications. the part allows user to obtain 1x, 2x, and 4x ref output fre- quencies on respective output pins. the CY2303 has an on-chip pll which locks to an input clock presented on the refin pin. the pll feedback is internally connected to the ref output. the input-to-output skew is guaranteed to be less than 200 ps, and output-to-output skew is guaranteed to be less than 200 ps. multiple CY2303 devices can accept the same input clock and distribute it in a system. in this case, the skew between the outputs of two devices is guaranteed to be less than 400 ps. the CY2303 is available in commercial and industrial temper- ature ranges. features benefits ? 3-multiplier configuration 1x, 2x, 4x ref single phase-locked loop architecture 10 mhz to 166.67 mhz operating range (reference input from 10 mhz to 41.67 mhz) phase alignment all outputs will have a consistent phase relationship with each other and the reference input low jitter, high accuracy outputs meets critical timing requirements output enable pin enables design flexibility and lower power consumption 3.3v operation supports industry standard design platforms 5v tolerant input allows flexibility on reference input sophisticated internal loop filter alleviates the need for external components 8-pin 150-mil soic package industry standard packaging saves on board space commercial and industrial temperature available suitable for wide spectrum of applications selector guide part number outputs input frequency range output frequency range specifics CY2303sc 3 10 mhz ? 41.67 mhz 10 mhz ? 166.67 mhz commercial temperature CY2303si 3 10 mhz ? 41.67 mhz 10 mhz ? 166.67 mhz industrial temperature pll ref refx2 refx4 oe x1 x2 x4 1 2 3 4 5 8 7 6 ref gnd refin n/c v dd oe refx2 top view 8-pin soic refx4 refin block diagram pin configuration fbk
CY2303 document #: 38-07249 rev. *a page 2 of 7 maximum ratings supply voltage to ground potential ............... ? 0.5v to +7.0v dc input voltage (except ref)............... ? 0.5v to v dd + 0.5v dc input voltage refin ........................................ ? 0.5 to 7v storage temperature ................................. ? 65 c to +150 c junction temperature.................................................. 150 c static discharge voltage (per mil-std-883, method 3015) ............................. >2000v pin description pin signal [1] description 1 ref ref output (1x reference input) 2 gnd ground 3 refin input reference frequency, 5v tolerant input 4 n/c no connect 5 refx2 2x reference input 6 refx4 4x reference input 7 vdd 3.3v supply 8 oe output enable (weak pull-up) operating conditions for CY2303sc commercial temperature devices parameter description min. max. unit v dd supply voltage 3.0 3.6 v t a operating temperature (ambient temperature) 0 70 c c l load capacitance, fout < 133.33 mhz 18 pf load capacitance, 133.33 mhz < fout < 166.67 mhz 12 pf c in input capacitance 7 pf t pu power-up time for all vdd's to reach minimum specified voltage (power ramps must be monotonic) 0.05 50 ms electrical characteristics for CY2303sc commercial temperature devices parameter description test conditions min. max. unit v il input low voltage 0.8 v v ih input high voltage 2.0 v i il input low current v in = 0v 100 a i ih input high current v in = v dd 50 a v ol output low voltage [2] i ol = 8 ma 0.4 v v oh output high voltage [2] i oh = ? 8 ma 2.4 v i dd supply current unloaded outputs, refin = 41.67 mhz 45 ma unloaded outputs, refin = 25 mhz 32 ma unloaded outputs, refin = 10 mhz 18 ma notes: 1. weak pull-down on all outputs. 2. parameter is guaranteed by design and characterization. it is not 100% tested in production.
CY2303 document #: 38-07249 rev. *a page 3 of 7 switching characteristics for CY2303sc commercial temperature devices parameter name test conditions min. typ. max. unit 1/t 1 output frequency 18-pf load 10 133.33 mhz 12-pf load 166.67 mhz duty cycle [3] = t 2 t 1 measured at v dd /2 40 50 60 % t 3 rise time [3] measured between 0.8v and 2.0v 1.20 ns t 4 fall time [3] measured between 0.8v and 2.0v 1.20 ns t 5 output to output skew on rising edges [3] all outputs equally loaded measured at v dd /2 200 ps t 6 delay, refin rising edge to ref rising edge [3] measured at v dd /2 from refin to any out- put 200 ps t 7 device to device skew [3] measured at v dd /2 on the ref pin of the device (pin 1) 400 ps t j period jitter [3] measured at fout < 133.33 mhz, loaded outputs, 18-pf load 175 ps t lock pll lock time [3] stable power supply, valid clocks presented on refin 1.0 ms operating conditions for CY2303si industrial temperature devices parameter description min. max. unit v dd supply voltage 3.0 3.6 v t a operating temperature (ambient temperature) ? 40 85 c c l load capacitance, fout <133.33 mhz 15 pf load capacitance, 133.33 mhz < fout < 166.67 mhz, 10 pf t pu power-up time for all vdd's to reach minimum specified voltage (power ramps must be monotonic) 0.05 50 ms electrical characteristics for CY2303si industrial temperature devices parameter description test conditions min. max. unit v il input low voltage 0.8 v v ih input high voltage 2.0 v i il input low current v in = 0v 100 a i ih input high current v in = v dd 50 a v ol output low voltage [2] i ol = 8 ma 0.4 v v oh output high voltage [2] i oh = ? 8 ma 2.4 v i dd supply current unloaded outputs, refin = 41.67 mhz 48 ma unloaded outputs, refin = 25 mhz 35 ma unloaded outputs, refin = 10 mhz 20 ma note: 3. all parameters are specified with loaded outputs.
CY2303 document #: 38-07249 rev. *a page 4 of 7 switching characteristics for CY2303si industrial temperature devices parameter name test conditions min. typ. max. unit 1/t 1 output frequency 15-pf load 10 133.33 mhz 10-pf load 166.67 mhz duty cycle [3] = t 2 t 1 measured at v dd /2 40 50 60 % t 3 rise time [3] measured between 0.8v and 2.0v 1.20 ns t 4 fall time [3] measured between 0.8v and 2.0v 1.20 ns t 5 output to output skew on ris- ing edges [3] all outputs equally loaded measured at v dd /2 200 ps t 6 delay, refin rising edge to ref rising edge [3] measured at v dd /2 from refin to any output 200 ps t 7 device to device skew [3] measured at v dd /2 on the ref pin of the device (pin 1) 400 ps t j period jitter [3] measured at fout < 133.33 mhz, loaded outputs, 15-pf load 175 ps t lock pll lock time [3] stable power supply, valid clocks pre- sented on refin 1.0 ms switching waveforms duty cycle timing t 1 t 2 v dd /2 all outputs rise/fall time output t 3 3.3v 0v 0.8v 2.0v 2.0v 0.8v t 4 output-output skew v dd /2 t 5 output output v dd /2
CY2303 document #: 38-07249 rev. *a page 5 of 7 test circuits switching waveforms input-output propagation delay v dd /2 t 6 input fbk v dd /2 v dd /2 t 7 fbk, device 1 fbk, device 2 device-device skew v dd /2 0.1 f v dd clk out c load outputs gnd test circuit # 1 ordering information ordering code package name package type operating range CY2303sc s8 8-pin 150-mil soic commercial CY2303si s8 8-pin 150-mil soic industrial
CY2303 document #: 38-07249 rev. *a page 6 of 7 ? cypress semiconductor corporation, 2001. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress semiconductor product. nor does it convey or imply any license unde r patent or other rights. cypress semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected t o result in significant injury to the user. the inclusion of cypress semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in do i ng so indemnifies cypress semiconductor against all charges. package diagram 8-lead (150-mil) soic s8 51-85066-a 51-85066-a
CY2303 document #: 38-07249 rev. *a page 7 of 7 document title: CY2303 phase-aligned clock multiplier document number: 38-07249 rev. ecn no. issue date orig. of change description of change ** 110514 01/07/02 szv change from spec number: 38-01036 to 38-07249 *a 121852 12/14/02 rbi power up requirements added to operating conditions information
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