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application note st7536 AN653/1198 by jo?l huloux summary page i introduction to the st7536 ......................................... 2 ii st7536 description ................................................. 2 iii st7536 pin description .............................................. 3 iii.1 power supply input . . . . . . . . . . . . . . . . . . . . . . . ......................... 3 iii.2 channel selection . . . . ............................................. 4 iii.3 crystal oscillator input . . . . . . . . . . . . .............................. 4 iii.4 afcf stabilisation. ................................................. 4 iii.5 automatic level control input. . . . ................................. 4 iii.6 data input and output . . . . . . . . . . . . . . . . . . . . . . . ...................... 5 iii.7 test inputs. . . . . . . . . . . . . . . . . . . . . . . . ................................. 6 iii.8 ifo/demi output/input. .............................................. 6 iii.9 transmit output and receive input. . . . . . . . . . . . . . . . . . . . . . . .......... 6 iii.10 rx/tx control input . . . . . . . . . . . . . . . . . . . . . . . ......................... 6 iii.11 reset input . ....................................................... 6 iv powerline interface ............................................... 7 iv.1 buffer and low pass filter . . . . .................................... 7 iv.2 power amplifier. . . . ................................................ 8 iv.3 transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . ........................... 9 iv.4 preamplifier . . . . ................................................... 10 iv.5 power on/off switch. .............................................. 10 iv.6 building up the powerline interface . . . . . . . . . ...................... 11 iv.7 performances of the powerline interface . . . . . . . . . . . . . . . . . . . . . . . . 11 iv.7.1 power consumption . . . . ................................................ 11 iv.7.2 transmit output . . . . ................................................... 12 iv.7.3 receive sensitivity . .................................................... 13 iv.7.4 conclusions. .......................................................... 14 v heating control applications ..................................... 15 v.1 introduction. . . . ................................................... 15 v.2 micro-controllers . . . . . . . . . . . . . . . . . . . . . . . ......................... 15 v.3 hardware.......................................................... 15 v.4 slave............................................................ ... 16 v.5 master............................................................ . 17 v.6 software.......................................................... 18 v.7 protocol.......................................................... 18 v.8 application software . . . . .......................................... 20 vii annexes ............................................................ 26 vii.1 a - bit error rate . ................................................. 26 vii.2 b - board schematics . .............................................. 28 vii.3 c - board schematics . .............................................. 33 1/35
i - introduction to the st7536 the st7536 is a half duplexsynchronous fsk-mo- dem, and has been designedto operate on power- line networks. for a complete communication system, a micro-controller and a powerline-inter- face (pli) are needed (see figure 1). such a system is able to transmit and receive on 4 different channels with 2 differentdata rates (600 and 1200 baud). the baudrate (brs) and channel (chs) selection is made, according to the table 1: table 1 brs chs bitrate xmit freq (khz) txd = 1 xmit freq (khz) txd = 0 0 0 600 81.75 82.35 0 1 600 67.20 67.80 1 0 1200 71.40 72.60 1 1 1200 85.95 87.15 the st7536 is a half duplex modem, as it has two operation modes; receive or transmit data. the mode selection is made with a rx/tx control input. data input and output are related to the clock signal ; it's a synchronous modem. this clock sig- nal is generated by the st7536. only a few external components have to be added for full operation of the st7536 : a crystal, four resistors and five capacitors. ii - st7536 description the st7536 is a single chip modem; all the electri- cal circuits needed for a complete modem are inside the chip. the modem is available in 28 pins plcc (see figure 2). in transmit mode the transmit data (txd) is sam- pled on the positive edge of the clock (clr/t). then the data enters the fsk modulator. the frequency on which this modulator operates is set by the time base and control logic. in normal op- eration the multiplexer (mux) selects the fsk modulator signal to be send to the transmit filter. this filter is a switched capacitor band-pass filter. the time base and control logic uses the automatic frequency control (afc) to set this filter at the transmit frequency, corresponding to the selected channel.after filtering, the transmitsignal is sent to an automatic level control (alc). this control is used to overcome problems with line impedance variations. the powerlines on which the modem has to operate, have variations in their line charac- teristics, which are very frequent and totally unpre- dictable. the automatic level control uses a feed back signal (alci) from the powerline interface to adjust the transmit output (ato). in receive mode the signal enters the chip on the receive analog input (rai). the received signal is filtered in the receive band-pass filter. it's just like the transmit filter , a switched capacitor filter.the automatic frequency control is used to set it on the right frequency. after being amplified the signal is down converted and filtered in the intermediate frequency band-pass filter. the resulting signal is sent to the fsk demodulator. the coupling of the intermediate frequency filter output (ifo) to the fsk demodulator input (demi) is made by an externalcapacitor which cancels an eventual offset voltage.aclock recoverycircuit extractsthe receive clock (clr/t) from the demodulated output (rxdem) of the fsk demodulator. synchronous received data (rxd) is delivered on the positive edge of the clock. a time base section delivers all the internal clock signals from a crystal oscillator running at 11.0592mhz.the crystal is connectedbetween the xtal1 and xtal2 pins. it is also possible to pro- vide directly a clock signal on xtal1 instead of using a crystal. to debug the chip and test external circuits the st7536 provides some test options. the transmit band-pass filter can be observed using a direct input on the filter. this input (txfi) is selected by the multiplexer if test4 = 1. the receive band- pass filter output (rxfo) is provided at pin 25. finally the clock recovery can be observed when test1 = 1. in this case the test3 input gives a direct input to the clock recovery block. controller st7536 controller pli data-transmission over powerline 7536-08.eps figure 1 st7536 application note 2/35
17 fsk demodulator 24 28 27 7 5 6 11 3 25 18 8 9 21 22 23 19 13 14 1 2 16 15 12 26 20 4 rai afcf ato alci rxdem rxd clr/t ifo xtal2 xtal1 rx/tx reset brs chs txd txfi demi st7536 rxfo test logic clock recovery afc reference voltage fsk modulator correlator post-demo s.c. filter mux mux 20db gain time base and control logic a.a. filter tx band-pass s.c. filter a.a. filter smt. filter i.f. band-pass s.c. filter a.a. filter smt. filter rx band-pass s.c. filter alc test1 test2 test4 10 test3 dgnd agnd dv ss dv dd av ss av dd a.a. filter 7536-02.eps figure 2 : block diagram iii - st7536 pin description the pin description is not given in numerical order, but the pins are described in relation with their func- tion and consequently sometimes with other pins. - power supply input - channel selection - crystal oscillator input - afcf stabilisation - automatic level control input - data input and output - test inputs - ifo/demi output/input - transmit output and receive input - rx/tx control input - reset input iii.1 - power supply input - pin 8 (dgnd) : digital ground (0v) - pin 9 (dv dd ) : digital positive supply voltage (+5v) - pin 18 (dv ss ) : digital negative supply voltage (-5v) - pin 21 (av ss ) : analog negative supply voltage (-5v) - pin 22 (agnd): analog ground (0v) - pin 23 (av dd ) : analog positive supply voltage (+5v) internally the st7536 has separated power supplies : thedigitalandanalogcircuits are separated.externally the power suppliesshould be connectedtogether.for decoupling,boththepositiveandnegativesuppliesare decoupledwith 2 capacitors.c6 and c7 decouple the positive, c8 and c9 the negativesupplies. for proper operation the digital positive supply voltage should be decoupledwith a capacitor(c10)mountedclose topin 9.c6, c8andc10are100nf/16vceramic capacitors, c7andc910 m f/16vtantalcapacitors (see figure 3). 23 9 8 22 21 18 dgnd agnd av dd dv dd av ss dv ss c10 100nf c6 100nf c8 100nf c7 10 m f c9 10 m f +5v -5v 0v 7536-09.eps figure 3 st7536 application note 3/35
15 16 chs r2 100k w r1 100k w brs baudrate channel +5v 7536-10.eps figure 4 3 4 11.0592mhz oscout oscin c1 22pf c2 22pf 7536-11.eps figure 5 iii.2 - channel selection - pin 15 (chs) : channel selection input - pin 16 (brs) : baudrate selection input both inputs are digital inputs (0/+5v). the st7536 operates with two bitrates: 600 and 1200 baud. these bitrates are selected with pin 16 (brs). for both bitrates the st7536 offers two channels, which are selected with pin 15 (chs). a logical o0o is represented by 0v, a o1o by +5v. r1 and r2 are pull-down resistors, creating a logical o0o. closing a switch gives a o1o. the selection is made according to table 1. iii - st7536 pin description (continued) iii.3 - crystal oscillator input - pin 13 (xtal2) : crystal oscillator output - pin 14 (xtal1) : crystal oscillator input the internal crystal oscillator of the st7536 needs an external crystal. this one should be a 11.0592mhz crystal. two capacitors (c1 and c2) have to be added for proper operation. they are typically 22pf/10v ceramic capacitors. it is also possible to connect directly a clock signal to the oscillator input, in this case the crystal and the capacitors should be removed. on the applica- tionboard this option is not used. the st7536clock signal is the time reference of the system. 17 afcf c3 470nf r3 1.5k w c4 47nf 7536-12.eps figure 6 iii.4 - afcf stabilisation - pin 17 (afcf) : automatic frequency control output in the st7536 an automaticcontrol section adjusts the central frequency of the receive and transmit band-passfilters. the stabilityof this section has to be ensured with an external rc network. iii.5 - automatic level control input - pin 27 (alci) : automatic level control input the output stage of the transmit path consists of an automatic level control (alc). it offers the possibilityto keep the output voltage of the power amplifier independentof variationsof the powerline network. the impedance of these net- works can be anywhere in the range of 5 - 100 w . if the impedance of the powerline changes, the outputof the amplifier will change. with the alc input it ispossibleto correctthese outputvariations. to control the output of the powerline interface a feed-back signal is needed. this signal is sent through an amplifier. the automatic level control can decrease the maximum transmit output in 32 steps of 0.84db. the gain range is 0db -26db. a peak detection is done on the signal presented on the alcinputand the alc compares it to two reference voltages, v t1 (1.87v) and v t2 (2.12v). if max. valci < v t1 the next gain is increased by 0.84db. if v t1 < max. valci < v t2 there is no gain change. if v t2 < max. valci the next gain is decreased by 0.84db. the gain of the feed-backamplifier is such that the feed-back signal peak voltage falls between v t1 and v t2 . st7536 application note 4/35
example: the wanted interface outputvoltage is 0.5v(peak). for a 0.5v output peak voltage g= v out peak ? ? ? v t1 + v t2 2 ? ? ? = 0.5 2 = 4 (12db). then the feed-backamplifier should have a gain of 4x ( = +12db). the st7536 starts up. valci = 0v (valci < v t1 ). the ato output is increased with a gain of +0.84db. on a certain moment the output voltage over the powerline will become0.5v(peak). this signal is amplified to 2.0v(peak). then the alc stops increasing the ato output, which will remain at its actual level. if the line impedance increases, the power amplifier of the interface might deliver more output voltage. if the output voltage of this amplifierincreases,the alci voltage will be higher than v t2 . the alc will then immedi- ately decrease the ato output. and so the output of the interface can be made independent of im- pedance variations of the powerline. of course this will operate only if the power ampli- fier in the interface is able to drive all the imped- ances at the required output voltage. let's say the impedance of the line becomes 0.1 w . the alc will increase the output of the ato. but if the power amplifier is not able to drive such low impedances, the only result will be an output signal with a large distortion. therefore on the application board the alcinput is set at 0v with a resistor (r4). the ato will be always at maximum output (1.25 v rms ). the powerline interface has been designed to drive all impedances from 0.5 - 100 w with this input. to be able to do some experiments with the alc, a resistor is used to set the alci at 0v. it gives the possibility to inject a signal on the alci. this would not have been possible if on the printed circuit board a short circuit to ground had been made (see figure 7). iii.6 - data input and output - pin 5 (rxd) : synchro nousreceive data output - pin 6 (clr/t) : receive and transmit clock - pin 7 (rxdem) : demodulated data output - pin 12 (txd) : transmit data input the st7536 is a synchronous modem; data input and output are related to the clock (clr/t). in transmit mode the st7536 generates this clock signal. the transmit data are sampled on the posi- tive edge of clr/t. therefore the txd should be valid at that moment. in receive mode the demodu- lated (receive) data is available at pin 7 (rxdem). a clock recovery circuit extracts the clock signal from the demodulated data and delivers synchro- nous data (rxd) on the positive edge of clr/t. on the application board the rxdem data output is not used. all the data signals from and to the st7536 (rxd, txd) are related to the clock (clr/t) (see figure 8). iii - st7536 pin description (continued) no gain change next gain decreased by 0.839 db max. (valcl) next gain increased by 0.839 db vt2 2.12v vt1 01.87v 27 28 ato alci r4 100k w r powerline power amplifier feed-back amplifier g 7536-13.eps figure 7 clr/t timing rxd txd data valid data valid data valid data valid bit bit bit bit bit bit bit bit 7536-14.eps figure 8 st7536 application note 5/35
iii.7 - test inputs - pin 3 (test4) : test input, with a o1o on this pin the multiplexer selects the transmit band-pass filter input (txfi). - pin 4 (test3) : test input which gives a direct acces to the clock recovery circuit.this input is selected when test1 = o1o. - pin 10 (test1) : test input, a o1o on this pin cancels the automatic switching from transmit to receive mode, and validates the test3 input to the clock recovery circuit. - pin 11 (test2) : test input, a o1o on this pin reduces the automatic switching time (from transmit to receive mode) to 1.48ms. on the application board test 2/3/4 are not used, and pins 3, 4, and 11 are thereforeset at 0v. with a switch test1 can be set at o0o or o1o. see also the rx/tx control input. iii.8 - ifo/demi output / input - pin 19 (ifo) : intermediate fr equency filter output - pin 20 (demi) : fsk demodulator input the connection between the intermediate fre- quency filter output and the fsk demodulatorinput should be made externally with a capacitor (c5, 1 m f/10v). iii.9 - transmit output and receive input - pin 24 (rai) : receive analog input - pin 28 (ato) : analog transmit output pin 24 is the receive input of the st7536. the receive output of the powerline interface should be connected to this pin. the maximum input voltage is 2v rms . the receive sensitivity of the st7536 is 2mv rms f on channel 1 and 2 (600 baud), and 3mv rms on channel 3 and 4 (1200 baud). pin 28 is the transmit output of the st7536. the transmit input of the powerline interface should be connected to this pin. the ato output is regulated by the alci circuit. the maximum output voltage is 3.5v pp . the second harmonic distortion is about -53db. iii.10 - rx/tx control input - pin 1 (rx/tx) : rec e iv e or t ran smit mo de selection input the st7536 is a half duplex modem and has therefore two operation modes: receive and trans- mit. this mode selection is done with the rx/tx input. the transmit mode is selected when rx/tx is o0o. if rx/tx is held at o0o longer than 3 seconds, the st7536 switches back to receive mode. to set the st7536 again in transmit mode, rx/tx should be held at o1o for a minimum of 3 m s before being set to o0o. the carrier activation time is 1msec. to be able to observe the transmit output of the st7536on thepower line interface for a longertime than 3 seconds it is possible to use the test 1 input. if this input is set at o1o the automatic switching is disactivated. then it is possible to transmit a signal but not to receive. iii.11 - reset input - pin 2 (reset) : logicresetandpower-downinput when this input is set at o0o the st7536 is in power-down mode. all the internal logic is then reset. for normal operation this input should be set at o1o. on the applicationboard this input is control- led by the micro-controller. iii - st7536 pin description (continued) st7536 application note 6/35
ato st7536 rai st7536 buffer powerline interface power amplifier lpf transformer powerline preamplifier rx/tx 7536-15.eps figure 9 c7 r7 r5 ua1 r6 push pull amplifier c9 to transformer transmit output st7536 7536-16.eps figure 10 iv - powerline interface the power line interface (pli) connects the st7536 to the powerlines.the following pli has been designed according to the enel (italian elec- tricity distributor) specifications : (this pli is suit- able to cenelec european specification and the fcc usa spec) (see figure 9). transmit output : r powerline > 5 w 1-2v rms r powerline < 5 w 200-400ma rms second harmonic distortion 72db for r powerline = 18 w receive sensitivity : 1.5mv rms in transmit mode the powerline interface amplifies and filters the transmit signal (ato) from the st7536. the maximum output current that can be taken from ato is 1ma. therefore a buffer is used to protect the st7536 and in order to drive the next stages in the powerline interface. the second har- monic distortion (hd2) of the transmit signal from the st7536 is -53db. to suppress the harmonics a low pass filter (lpf) is used. the filtered signal is then sent to a power amplifier, which must drive powerlines with impedances from 1 to 100 w ,via the transformer.the transformeris not only used to put signals on the powerlines. it's also used as a band pass filter, in order to suppress the second har- monic of the transmit signal to a level of less than -72db. in receive mode the transformerextracts the signal from the powerline. before sending it to the receive input (rai) of the st7536, it is amplified with a level of 34db in the preamplifier. the buffer and power amplifier are switched off in receive mode, in order to avoid the low output impedance of the power amplifier attenuating the received signals. iv.1 - buffer and low pass filter these two functions are build up around ua1 (see figure 10). st7536 application note 7/35
a feed back from the output of the power amplifier to the operational amplifier is done with r7/c7. this gives a low pass function and therefore the possi- bility to create a low pass filter.the st7536 oper- ates on 4 channels : 67, 72, 82 and 86khz. with r7 and c7 the cut off frequency of this filter is set.if this frequency is set at 75khz, the difference be- tween 75khz and 150khz (second harmonic) sig- nals is only 3db,because such a filter has already an attenuation of 3db at the cutoff frequency (see figures 11 and 12). iv - powerline interface (continued) 75khz - 3db - 6db 150khz 7536-17.eps figure 11 75khz 24khz 150khz - 6db 7536-18.eps figure 12 to ensure an attenuation of 6db of the second har- monic, the cut off frequencyhas been set at 24khz. with er7 = 10k w, f = 1/(6.28*r7*c7) = 24khz and c7 = 680pf. the ratio r7/r5 provides sufficientamplification on the transmit frequency, to drive the power amplifier at optimum performances.the frequency differ- ences of the four channels result in a different output of the low pass filter. therefore the ratio of r7/r5 is not the same for all the four channels. channel r7 ( w )r5( w ) ato (v pp ) 1 10k 1500 3.3 2 10k 1800 3.6 3 10k 1800 3.5 4 10k 1500 3.2 the connection of the operational amplifier to the power amplifier is done with r6. this resistor is added to avoid oscillation. without this resistor stable operation cannot be guaranteed. the value of r6 is determinated with experiments to be 330 w . an other function of r6 is to increase the load impedance seen by the operational amplifier. the impedance is r6 plus the input impedance of the power amplifier. if this impedance is to low the operational amplifier will not be able to drive the power amplifier in optimum performances. the maximum voltage swing will decrease and the second harmonic distortion will increase. different operational amplifiers have been tested. the tl071c gives the best performances. iv.2 - power amplifier the power amplifier increases the output signal of the operational amplifier and low pass filter (ua1). c3 c4 c5 c6 c8 output t6 r9 r11 t8 r10 t7 input t5 r8 v dd v ss 7536-19.eps figure 13 the input impedance is increased because it's mul- tiplied by the beta of t5/6, which are no longer used asdiodes.thereforer8 andr9 couldbe decreased, to deliver more current to t7/t8. the optimum per- formancesof the amplifier were obtainedwith avalue of 820 w for r8 and r9. an other solution to deliver more current to the output transistors is the addition of c8. it will decrease the input impedance, but also deliver extra current to t7 by t6, and to t8 by t5. other transistors have been used also a bd237 for t6/t7, a bd238 for t5/t8. these transistors can deliver more outputpower,and are not much expen- sive than the 2n2222/2n2907.furthermore, the col- lectors are connected to the (metal) package. this gives the possibility for a mechanical connection of t5/t8 and t6/t7. this will result in the same tem- perature in both transistors, what will avoid thermal runaway. to decouple the power supplies c3/c5 (22 m f/16v) and c4/c6 (100nf/16v) are used, mounted close to t7 and t8. using this configuration, it is possible to provide 1 2v rms in powerlines with impedances from 5 100 w . st7536 application note 8/35
iv.3 - transformer a transformer is used to connect the power ampli- fier and the preamplifier to the power- line.this transformer has to : - separatethe rest of the interfacefromthe powerline, - put the transmit signal on the powerline, - extract the received signal from the powerline, - filter the 50/60hzsignal coming from the powerline, - filter the second harmonic of the transmit signal. the transformer is a toko t1002n,which has two primary windings and one secondary winding. the ratios of the windings are 4:1:1 (turns) (see also the figure 14). typical values of the transformer are : - l1t windings : 9.4 m h, - l4t winding : 140 m h. the primary windings of the transformer are used to create a bandpass filter. the resonance fre- quency is set at the transmit frequency with c10/c11. these capacitors are in parallel with the primary windings (1t/4t). the equivalent value for those two windings can be calculated according to: leq = l1t + l4t + 2m m = k ? ```` l1t ? l4t ? ? ? ? ? k = 1 ` 2 ? ? ? ? ? (16) with the given values: m = (9.4 m h * 140 m h) 0.5 = (1316 m h) 0.5 = 36.3 m h leq = l1t + l4t + 2 ? (l1t ? l4t) 0.5 = 9.4 m h + 140 m h+2 ? 25.6 m h = 200 m h the resonance frequency of this lc network is dependent of ceq = cp = c10//c11 and leq ac- cording to: f res = 1 2 p ```` l eq ? c p (17) c p = ? ? ? 1 2 p ? f res ? ? ? 2 leq (18) as this filter is very sharp, there are different values for c p on each (transmit) frequency. channel 1 : f = 82khz c p = 18nf = 10nf // 6.8nf channel 2 : f = 67khz c p = 28nf = 22nf // 6.8nf channel 3 : f = 72khz c p =24nf(only 1 capacitor) channel 4 : f = 86khz c p = 17nf = 10nf // 5.6nf on channel 3 only 1 capacitor is needed and therefore c11 doesn't exist. on a printed circuit board the capacitors should be mounted close to the transformer. in order to get the best filter per- formances.the capacitors (c10/c11) have to be linear, such as the ks (styroflex) types. c12 is used to filter the 50/60hz signal from the powerline. the capacitor filters low frequencies 50/60hz and lets the high (transmit) frequencies pass. the capacitor is a class x2 capacitor. these capacitors have a short circuit protection, which is absolutely necessary,because in case of a short circuit in the capacitor, the 50/60hz filtering is lost, and the powerline interface will be destroyed, or might be dangerous for persons working with the interface and the st7536. as a final protectionagainst any possible spikes, a transil (trl1) is used. it is a 6.8v bipolar type. if a voltage 6.8v appears, the transil will act as a short circuit to ground, protecting the other parts of the powerline interface from damage. r12 is added to discharge c12 after disconnecting the interface from the powerline. without this resis- tor, c12 will not be discharged and shock hazard might occur if someone touches the powerline connector.this resistor is only usefullin evaluation systems. in all other cases when disconnecting from the powerline never takes place r12 can be removed. iv - powerline interface (continued) c11 c10 4t 1t trl1 1t r12 c12 transformer powerline input preamplifier output power amplfier 7536-20.eps figure 14 st7536 application note 9/35
iv.4 - preamplifier receive signals on the powerline are extracted by the transformer and (pre)amplified before sending them to the receive analog input (rai) of the st7536. this is done to have, according to the specifications, a receive sensitivity of 1.5mv rms . the sensitivity of the st7536 is 2mv rms for chan- nel 1 & 2, and 3mv rms for channel 3 & 4. to increase the sensitivity the received signal is fil- tered in the transformer, and then amplified with a gain of 40db.a limiter isused to protectthe st7536 against signals > 2v rms . iv - powerline interface (continued) r13 rin r14 r15 r16 from transformer rai st7536 ua2 7536-21.eps figure 15 in receive mode the power amplifier is virtually disconnected from the power supply, in order to avoid its low output impedance attenuating the received signals. signals that are extracted from the powerline are filtered in the transformer, in the same way that the transmitted signals. afterfiltering, the signals are amplified. this is done with ua2, an inverting amplifier. the gain of this amplifier is set with r15 and r16. gain = r15/r16 = 100k/1k = 100 x = +40db the maximum input level at the rai is 2v rms .therefore the signals coming from the pre- amplifier have to be limited to avoid transmodula- tion to the st7536. amplifier ua2 operates with a power supply of -5v and +5v. the maximum output voltage of the amplifier is then 4v. with r13 and r14 a simple limiter has been created. the output voltage of this limiter is the voltage over r13. the input resistance of the rai (rin) is 100k w . the gain of the limiter =(r in //r13) / (r in //r13 + r14) = (100k//47k) / (100k//47k + 47k) = 0.4 x (= -8db) with a maximum output of the amplifier of 4v, the maximum output of the limiter is set at 0.4 x 4v = 1.6v. strong input signals are clamped by ua2, but tests showed that this clamping has no effect on correct demodulation. the total gain of the preamplifier is: +40db + -8db = +32db providing the required receive sensitivity of 1.5mv rms . iv.5 - power on/off switch the powerline interface has two operation modes: transmit and receive. normally the st7536 system (and therefore the interface) is in received mode, waiting for commands or data requests from the master system.the interface will be used in trans- mit mode, only when the system has to respond to the master. to saveenergycosts, the bufferand power amplifier in the transmit path are switched off. also if the interface is used in a master system, which will be oftenin transmit mode, thisswitching can be usefull. a second reason to switch off the transmit power amplifier is the fact that its low output impedance will attenuate the incomingsignalsin receivemode. therefore the power amplifier is virtually discon- nected from the power supply (see figure 16). switching the positive (v dd ) and the negative (vss) input voltage is done with t3 & t4. if these transis- tors are switched off the high resistance of the collectors will provide the virtual disconnection. in transmit mode these transistors are switched on, and the voltage lost over the transistors (v ce ) will be 0.2v. c1 c2 r1 t2 r4 t1 t3 r2 t4 buffer (ua1)' power amplifier +5v -5v rx/tx v dd v ss r3 7536-22.eps figure 16 st7536 application note 10/35
the control of the switch is done with a rx/tx control line from the controller. in transmit mode this line is +5v, in receive mode 0v. the +5v will open t1, which delivers the base current for t2 and t4. t3 is switched by t2. in transmit mode the buffer and power amplifier will operate with hf-signals (the transmit signals have frequencies67...86khz).thereforethe input ( 5v) of the switching transistors has to be decoupled. this is done with c1 and c2, which have both a value of 100nf. r1 is 47k w , to create a high input impedance. r2, r3 and r4 are 270 w . t1 and t3 are a 2n2222, t2 and t4 the equivalent pnp version; a 2n2907. these transistors can deliver a maximum current of 0.8a, more than enoughfor the bufferand power amplifier. iv.6 - building-up the powerline interface the whole described parts make a complete pow- erline interface. the interface has to be connected to the st7536 as described before. because the interface is supposed to operate with the st7536, the input and output names corre- spond to the related pin names of the st7536. for instance : the ato pin of the st7536 should be connectedto the ato pin of the powerlineinterface. the ato and rai are the analog output and input from/to the st7536. the rx/tx control input is connectedto the controller. the controller switches the interface from transmit mode to receive mode and vice versa. the 5v inputs are connected to the power supply connections of the application board. these inputs are hf-decoupled on the board. see alsothe schematicof the st7536. if the interface has to operate separated from the appli- cation board, using an external power supply, the 5v inputs should be decoupled with four capaci- tors (see figure 17). the operation mode of the interface is set with the rx/tx input line. a high input (+5v) on this line selects the transmit mode, a low input (0v) selects the receive mode. amicro-controller has to be used to control this input. the 'power line' outputs are the powerline connec- tions. on the application board these connections are located close to c12 and the transformer, to avoid long tracks carrying high voltage. iv.7 - performances of the powerline interface the following tests have been done on the power- iv - powerline interface (continued) +5v +5v 0v 0v -5v -5v power line interface power line rai pwr line pwr line ato rx/tx receive output transmit input mode selection 7536-23.eps figure 17 line interface : - power consumption - transmit output - receive sensitivity all the tests are done with the powerline interface connected to the st7536. iv.7.1 - power consumption the power consumption is measured both in trans- mit and receive mode. in both modes the powerline has been simulated with a 5 w resistor (worse case simulation). in trans- mit mode the data input (txd) was a logical 0 (0v). theresults remained thesamefor the fourchannels. the current consumption : the input voltage : - 5.00v, + 5.00v - transmit mode : - 150ma rms , + 180ma rms - receive mode : - 1ma rms , + 1ma rms the power consumption : - transmit mode : -5v x -150ma + +5v x +180ma 0.75w + 0.9w = 1.65w - receive mode : -5v x -1ma + +5v x +1ma 5mw + 5mw = 10mw in transmit mode the powerline interface delivered 0.340 w into a 5 w load. with an input of 1.65 w the efficiency is 20%. this does not imply a waste of energy. a st7536 system is almost allways in receive mode, and the lost of energy is conse- quently limited. in receive mode the buffer and the power amplifier are switched off. power is only consumed by the preamplifier. this explanes the low power con- sumption in receive mode. test equipment : keithley 165 multimeter test conditions : t = +25 c st7536 application note 11/35
chs brs txd st7536 powerline interface ato power line spectrum analyzer r r = 0.5/1/5/10/50/100 w txd : o0o/o1o (0v/+5v) channel 1 channel 2 channel 3 channel 4 0 0 1 1 0 1 0 1 brs chs 7536-24.eps figure 18 iv.7.2 - transmit output the transmit output of the powerline interface is measuredwith the powerline simulated by resistors. the interface is tested on the four channels. on each channel the st7536 uses two signals : one for txd = 1 (lowerfreq.) and one or txd = 0 (higher freq.) therefore the output on each channel is measured for txd = 1 and txd = 0. this makes 4 (channels) x 2 (txd 0/1) = 8 signals to test. the powerline is simulated with resistors. six dif- ferent impedances are tested : r = 0.5, 1, 5, 10, 50, 100 w . a spectrum analyzer is used to test the output of the powerline interface it measures the output power and generates a frequency spectrum plot. with this plot the harmonic distortion can be calcu- lated (see figure 18) iv - powerline interface (continued) test results. ( see annexe b) with the spectrum analyzer the output power on the transmit frequency (h1) is measured. then the power of the harmonics is measured. the differ- ence between those two signals is the harmonic distortion. example : txd = chs = brs = 0 (channel 1, txd = 0 81.75khz.) r powerline = 5 w . h1 : f= 81.75khz, measured power = +15.2dbm. h2 : f = 163.5khz, measured power = -58.8dbm. the difference between h1 and h2 is + 15.2db - -58.8db = 74db. the second harmonic of the signal is in this case suppressed to a level of -74db (compared to h1). the measured output power of h1 = +15.2dbm. then the output voltage can be calculated. 0 dbm is 1mw power into a resistor of 50 w .so +15.2 dbm is 33mw power into a resistor of 50 w . vout(rms) is therefore (33mw * 50 w )^0.5. in this case the output voltage is 1.29v rms . the output current is also calculated : i out(rms) =v out(rms) /r. for example; the output voltage with r powerline = 0.5 w is 0.18v rms . then the output current is 360ma rms . channel 1 : 82khz rline ( w ) output (v rms ) txd = 1 output (v rms ) txd = 0 h2 (db) txd = 1 h2 (db) txd = 0 0.5 0.18 0.18 -51 -54 1 0.31 0.31 -51 -55 5 1.29 1.29 -74 -76 10 1.70 1.68 -77 -81 50 2.06 2.02 -74 -77 100 2.09 2.06 -74 -76 channel 2 : 67khz rline ( w ) output (v rms ) txd = 1 output (v rms ) txd = 0 h2 (db) txd = 1 h2 (db) txd = 0 0.5 0.16 0.16 -67 -68 1 0.28 0.28 -68 -68 5 1.21 1.20 -75 -75 10 1.70 1.65 -78 -75 50 2.16 2.11 -83 -75 100 2.21 2.16 -84 -75 channel 3 : 72khz rline ( w ) output (v rms ) txd = 1 output (v rms ) txd = 0 h2 (db) txd = 1 h2 (db) txd = 0 0.5 0.16 0.16 -65 -67 1 0.28 0.28 -66 -67 5 1.17 1.16 -73 -76 10 1.62 1.56 -75 -79 50 2.02 1.95 -74 -75 100 2.06 2.00 -73 -75 channel 4 : 86khz rline ( w ) output (v rms ) txd = 1 output (v rms ) txd = 0 h2 (db) txd = 1 h2 (db) txd = 0 0.5 0.17 0.17 -56 -52 1 0.29 0.30 -60 -57 5 1.21 1.18 -77 -77 10 1.55 1.53 -82 -82 50 1.86 1.80 -82 -78 100 1.88 1.84 -80 -78 st7536 application note 12/35
summary of the test results : channel 1 : r<5 w r>5 w r 10/50 w : : : 310-360ma rms 1.3 - 2.1 vrms h2 < -74db channel 2 : r<5 w r>5 w r 10/50 w : : : 280-320 ma rms 1.2 - 2.2 v rms h2 < -75db channel 3 : r<5 w r>5 w r 10/50 w : : : 280-320ma rms 1.2 - 2.0v rms h2 < -74db channel 3 : r<5 w r>5 w r 10/50 w : : : 290-340ma rms 1.2 - 1.9v rms h2 < -78db with impedances < 5 w the output current is for all the four channels in the range 280-360ma rms . the output voltage on impedances > 5 w is both on channel 3 and 4 in the range 1.2 - 2.0v rms .on channel 1 and 2 it's in the range 1.2 - 2.2v rms . on all the channels the second harmonic of the signals is < -74db, on channel 4 the second har- monic is even < -78db. iv.7.3 - receive sensitivity the receive sensitivity of the powerline interface is measured with a bit error rate (b.e.r.) test. the bit error rate is the amount of wrong bits in a received bit pattern. for example, if 2 out of 1000 received bits is wrong detected, the b.e.r. is 2/1000 = 2 e-3. if the b.e.r. with an input of 1mv rms is worse than with an input of 5mv rms , the receive sensitivity is not 1mv rms but 5mv rms (or more). test configuration in this test two st7536 boards are used. each board has a st7536 + powerline interface. one board is in transmit mode, the other in receive mode. a bit error rate analyzer is used to generate bit patterns, and to compare these patterns with the receive patterns. because the st7536 is a syn- chronous modem, both the received data (rxd) and transmitted data (txd) are related to the clock signal generated by the st7536. therefore the clock signals of the boards are delivered to the analyzer (see figure 19). iv - powerline interface (continued) spectrum analyzer noise generator transmitting st7536 board receiving st7536 board fsk noise adder noise + fsk rxd txd clock clock bit error rate - analyzer 7536-25.eps figure 19 the output of the transmittingboard is a frequency shift keying (fsk) signal. this signal is added with the signal from a noise generator. this to observe the b.e.r. under different signal/noise-ratio condi- tions. in the adder the fsk signal is attenuated to a level of 0.5 - 5mv rms . the output signal is then send to the receiving board. a spectrum analyzer is used to measure all the signals. measurements two tests are done on channel 3 (72khz/1200 baud). first b.e.r. test is made with a fsk input of 1mv rms (= -60dbv). with the noise level set at -68....-74dbv.this gives a s/n ratio from 8....14db. a second test is done with a fsk input of 5mv rms (= -46dbv).with the noise level set at -54...-60dbv. these values are set by adjusting the mixer, and measured with the spectrum analyzer. the spectrum analyzer measurements are made in a spectrumof1200hz.this isdonebecausethe fsk signalhas two main frequencieson 1200hzdistance from each other. the noise signal is thereforemeas- ured in this band.in annexeb example plotaregiven from all the tests, with a s/n ratio of 10db. the b.e.r. is calculated from the number of errors counted by the b.e.r. analyzer. example : for instance the bit rate is 1200 baud. in 10 minutes the analyzer counted 800 errors. the measure time is then10 x 60s is 600s.eachsecond 1200 bits are transfered, so in 600 seconds720000 bits. then the bit error rate is 800/720000= 1.1 e-3. b.e.r. = number of errors / (time in seconds x bit rate) st7536 application note 13/35
test results (see annexe a) the results of the b.e.r. test are almost the same for both 1mv rms and 5mv rms (fsk signal level) input. compared to b.e.r. test results of a stand alone st7536, the results are even 1db (s/n ratio) better. these results demonstrate that the receive sensi- tivity is at least 1mv rms , and therefore the other channels are tested with an input of 1mv rms . channel1, 2 and 4 are tested with a fsksignalinput of 1mv rms . on those channels the results are also compared to b.e.r. test results of a stand alone st7536.onchannel2 thereisno differencebetween the b.e.r. of a stand alone st7536 and a st7536+ powerline interface. on channel 1 and 4 the b.e.r. is 0.5db better than a stand alone st7536. typical b.e.r. : (input fsk 1mv) s/n (db) channel 1 channel 2 channel 3 channel 4 8 1.2e-2 1.2e-2 2.0e-2 1.0e-2 10 2.0e-3 2.0e-3 4.5e-3 1.2e-3 12 1.0e-4 1.0e-4 4.5e-4 1.0e-4 14 4.0e-6 4.0e-6 4.5e-5 3.0e-6 iv.7.4 - conclusions the b.e.r. tests confirm a receive sensitivity of 1mv rms . this is according to the specifications under which the powerline interface has to operate. moreover, the b.e.r. tests showed that the powerline inter- face improved the performances of the st7536 ; the results of a st7536 in combination with the powerline interface are better than a stand alone st7536. remark : to test if these results are not only valid for a laboratory set up, both boards have been con- nected to the 220v powerline network. the dis- tance between the two boards was 30 meter. after a measure period of 15 minutes, not even 1 error was detected ! test equipment : (see figure 20) shlumberger si 7703b b.e.r. analyzer hp3562a spectrum analyzer rohde & schwarz suf2 noise generator mixer : iv - powerline interface (continued) fsk noise fsk + noise 150 w 150 w 100k w 1m w 22k w 22k w tl071 10 w 7536-26.eps figure 20 st7536 application note 14/35
bathroom kitchen w.c living room bedroom 1 heater 5 add = 0101 heater 4 add = 0100 heater 2 add = 0010 heater 1 add = 0001 heater 6 add = 0110 heater 7 add = 0111 heater 3 add = 0011 master control slave system 7536-27.eps figure 21 v - heating control application v.1 - introduction we will do a heating control system, using the st7536 and a st6 micro controller. we have two boards (see figure 21) : - master : controland set temperaturein each room, - slave : temperature reading,switch-on/off of heater. v.2 - micro-controllers two different micro-controllers have been set up, one for the slave systems, and one for the master system. the main differences between the two controllers are the different input/output facilities. the slave version needs one 8-bit data input to initialize its own address, and one 8-bit input to read datafroman externalmeasure system.it shouldalso provide an output that switches a load. this load will be simulated by a led (see figure 22). data input address input st6 8-bit 2-bit st7536 8-bit command 7536-29.eps figure 23 : master micro-controller the master version will have its own address initial- ized in the software. therefore no data input is needed for that. data input (8-bit) is needed to read the destination (slave) address. to display data, an 8-bit data output has to be provided. furthermore, it needs a 2-bit command input (see figure 23). load data input address input st6 8-bit 1-bit st7536 8-bit 7536-28.eps figure 22 : slave micro-controller both the master and the slave version need also data exchangewith the st7536 ; the clock, transmit data, receive data, reset and rx/tx control lines. v.3 - hardware as a micro-controller the st6 has beenchosen.this controller provides 20 data input/outputpins, a reset and a non maskable interrupt input. only a few externalcomponentshave to be added to thismicro- controllerforfull operation.theusedst6 isa 2kbyte program memory eprom version ; the st62e15. the st6 has an internal oscillator circuit. one ma- chine cycle takes 13 oscillator pulses. this means thatwith a clock frequencyof 8mhz a machine cycle takes 1.625 m s. most of the instructions (load instruc- tions, bit manipulations) take 4 machine cycles. the maximum bitrate the st6 has to serve is 1200 baud. one bit has a lenght of 833ms, which is equal to 512 machine cycles. this meansthat during eachbit about 130 instructions can be executed. st7536 application note 15/35
v - heating control application (continued) the st6 has an on chipwatchdogcircuit. there are two different versions of the st62e15. on one there is a software selectablewatchdog,and on the other (the hardware version) this watchdog is all- ways activated. the version that is used for these micro-controllers is the hardware version. v.4 - slave this micro-controller is in fact just an st6 with a very few external components. a few switches, resistors, capacitors, a crystal and a 74ls04 are connected to have a complete controller. each of these components is used to set the st6 in the correct configuration. pin configuration slave controller for each pin a short discription is given, such as the configuration chosen for this microcontroller. - pin 27..20 (pa0..pa7) : input/output port a. port a of the st6 is used for reading the (8-bit) home address of the slave system. switches are used to set each bit. the st6 provides an internal pull-up resistor which will cause an o1o. closing a switch (to 0v) will cause a o0o. +5v r switch pax pax st6 7536-30.eps figure 24 pc4 rx/tx rx/tx 7536-31.eps figure 25 led r4 560 w r3 2.2k w pc6 956 8 74ls04 7536-32.eps figure 26 - pin 19..12 (pb0..pb7) : input/output port b. port b of thest6 is used to read(8-bit) data froman external measure system. this system is simulated byswitches.thesameasforporta,thest6provides an internal pull-up resistor which will cause an o1o. closing a switch (to 0v) will causea o0o. - pin 9 (pc4) : port c bit4. this output is used as the rx/tx control. transmit mode of the st7536 and the powerline interface is selected if this output is o1o. receive mode is selected with an o0o. - pin 8 (pc5) : port c bit5. this pin is used as the transmit data (txd) output to the st7536. - pin 6 (pc7) : port c bit7. this pin is used as the receive data input (rxd) from the st7536. - pin 7 (pc6) : port c bit6. this is the load switching output. the load is simulated by a led. two inverters are used as a buffer between the st6 and the led. because the st6 outputs are in high impedance during a reset, a pull down resistor (r3/2k2) is used to avoid the load switching on. - pin 4 (oscout) : oscillator output. - pin 3 (oscin) : oscillator input. between these pins a 8.00mhz crystal has to be connected. if the internal oscillator of the st6 runs at 8mhz, one machine cycle is 1.625 m s. this speed is needed to be able to serve the 1200 baud bitrate from the st7536. 3 4 8.00mhz oscout oscin c1 22pf c2 22pf 7536-33.eps figure 27 st7536 application note 16/35
11 +5v r1 100k w reset reset (st7536) reset st6 7536-34.eps figure 28 v - heating control application (continued) - pin 5 (nmi) : non maskable interrupt. the nmi is used as input of the (inverted) clock of the st7536. the nmi is falling edge sensitive. an external pull-up resistor (r2/100k) is added to provide +5v for debugging the controller without the 74ls04 (the inverter). - pin 11 (reset) : reset input. the reset of the st6 is active low. to restart the microcontroller at the beginning of its program, this pin should be set to 0v by closing the switch. for normal operation the +5v is provided by a pull-up resistor (r1/100k). - pin 2 (timer) : timer output, not used. - pin 10 (test) : test input. the test pin is used to set the st6 in a special operation mode. for normal operation this pin is set at 0v. - pin 1 (v dd ): power supply, +5v. - pin 28 (v ss ): ground, 0v. v.5 - master the main difference between the master and the slave version of the microcontrolleris the fact that the master needs one extra input/outputpin. the slave version has 1 output to control a load, where the masterneeds2 inputsto reada command.therefore one input/output (pc5) has been multiplexed, it serves both the rxd and txd lines to the st7536. pin configuration master controller the pin configurationof the master differs from the slave on the next pins : d1 led pa1 r3 1k w 7536-35.eps figure 29 - pin 27..20 (pa0..pa7) : port a. the master uses port a to display data. light emitting diodes (led's) are used to do this. the maximum current that can be taken from each pin is 5ma. therefore the serial resistor has a value of 1k w (current = u/r = 5-0.6/1k = 4.4ma). - pin 19..12 (pb0..pb7) : port b. the hardware configuration of these pins is the same as on the slave, but on the master these pins are used to read a (destination) address. - pin 7/6 (pc6/7) : port c bit6/bit7. on the master these pins are used to read a command (see also the software discription). the hardware configuration is the same as for port b. - pin 9 (pc5) : port c bit5. the slave uses pc7as receiveddata input (rxd). because the master already uses this pin for reading a command, pc5 has to be multiplexed. this is done with an 74ls245. it is a (8-bit) bus receiver/transceiver. the rx/tx line is used to select whether the rxd should be send to pc5, or the data from pc5 to the txd (that's the opposite direction). txd rxd pc5 rx/tx 12 11 8 9 1 (dir) 7536-36.eps figure 30 st7536 application note 17/35
v.6 - software the software that has been developed for the micro-controllers has to be regarded as an intro- duction to more complexcommunication protocols. therefore a very simple but effective protocol has been set up. with this protocol it shouldbe possible to evaluate the performances and possible appli- cations of a st7536 system. v.7 - protocol the protocol has been set up in such a way that all kind of features can be added easily. a simple but powerfull frame format is used. it gives the possi- bility to use error correction and detection. each frame consists of a preamble, a system ad- dress, a destination address, a control block and a data block. the preamble and the system address length is 2 bytes, the destination address, the control block and the data block are 3 bytes long. the preamble is used to train both the transmitting and receiving st7536. it consists of two 8-bit pat- terns (10101010). the receiving st7536 needs it to train its clock recovering. because the 3 first bits transmitted by an st7536are notguaranteed to be correct, the preamble is also used to overcome unreliable data in the beginning of a transmission. this because the preamble doesn't contain data. the system address is used to be able to have more than one st7536 system operating on a certain powerline network. for example a remote metering system and a traffic light control system. it is also used to avoid interference with other (no st7536) systems. the lenght of the address is only 8 bits, and therefore it's send twice, to avoid unwanted activation of a group that has not been called. the lenght of the preamble and system address together is 4 bytes (32 bits) (see figure 31) the preamble and the system address inside the frame (see figure 32). the received destination address, control block and data block should be very reliable, and there- fore an error correction is done. to be able to do this all these data is send 3 times. the destination address has a lenght of 1 byte (8 bits), which is send 3 times:in block1, block2, andblock 3. this is the same for the control byte and the data byte. as an example the destination address inside the frame (see figure 33). so all the blocks (block 1/2/3) contain the same byte. the error correction uses them to extract the correct byte out of the 3 that have been received. the destination address is used to select 1 user (slave) in a system group. all the slavesin a system have their own 'home' address. to activate a slave, it has to recognizethe received destinationaddress inside a frame as its own 'home' address. in this simple protocol there is only communication between a master and the slaves. therefore the destination address is transmitted by each slave is the master address. in the frame which transmitted by the master, the destinationaddress is the home address of the slave that is called. the control byte can be used for all kind of infor- mation about the frame. in this protocol the control block is only used to say if the frame is a command or a response. this is done with bit 7. if this bit is set it means that the databyte contains a command (from the master to the slave), and the data byte will containthe command. if this bit is resetit means that the frame is a response (from the slave to the master), and the data byte will contain the re- quested data. control byte status data byte 10000000 command command 00000000 response requested data in the control byte only bit 7 is used. bit 0...6 are reset. they can be used to add severall features to the protocol. error detection and correction apossible feature that can be added is errordetec- tion. in the protocolthisfeature isnot available.this because, to be really usefull, error detection would require the possibility to send a message from the receiver to the transmitter, indicating that an error has been detected. it will need a more detailed protocol,which uses the free bits in the controlbyte. the intention of this protocol was to be very simple and clear. therefore the error detection is not pro- vided. although there is no error detection, the protocol provides an error correction. it would be very unrealistic to assume that all the bits in a received frame are correct. therefore the most important parts of the frame (destination address, control byte and data byte) are protected with an error correction. the error correction is done with bit-overlay. this is a very powerfull method to correct bytes that are transmitted over very noise lines. each byte is transmitted (and received) 3 times. the software uses the 3 received bytes to extract the (probably) correct byte. this is done by performing a bitwise majority decision on all the received blocks. v - heating control application (continued) st7536 application note 18/35
frame format preamble system address destination address control data 2 bytes 3 bytes 13 bytes 2 bytes 3 bytes 3 bytes 7536-37.eps figure 31 frame format preample system address destination address control data preample preample 8 bit 8 bit 8 bit 8 bit 4 bytes system address system address 7536-38.eps figure 32 frame format preamble system address destination address control data block 1 block 2 block 3 8 bit 8 bit 8 bit 3 bytes 7536-39.eps figure 33 v - heating control application (continued) st7536 application note 19/35
v - heating control application (continued) even if all the 3 received blocks contain errors, it's still possible to extract the correct byte out of these blocks. example : the first received block contains3 errors (b6/b4 and b1), the second block contains 2 errors (b7 and b3) and the third block contains 3 errors (b5/b2 and b0) (see figure 34). the error correctorwill take bitwise a decision what is probably the correct bit. if two out of three bits are o1o, the resultingbit will be o1o. if two out of three bits are o0o, the resulting bit will be o0o. this system can correct 1 error out of 3 bits.if more blocks are send, let's say 9, it would be possible to correct 4 out of 9 bits. this is a very interesting method to overcome problems on very noisy pow- erlines. error correction transmitted byte received block 1 received block 2 received block 3 corrected byte 01 0 01011 01 0 1 1 1 01 101000 1 1 0 1 1 1 000 0 0 0 1010 1 1 b76543210 7536-40.eps figure 34 v.8 - application software the protocol has been designed to demonstrate typical applications of the st7536. all the slaves have been programmed with one program. with this program it is possible to set a load (simulated by a led) on or off. this load can be for example (depending on the application) a traffic light. with this program it's also possible to read data (simulated by 8 switches) from an exter- nal measure system, and send this data to the master if requested. the measure system, for ex- ample, can be reading an electricity meter. remote reading these meters, can save the costs for man- ual reading (such a system is allready operational in italy). so there has been written 1 program for the slaves, that can simulate different applications. each typical application should be programmed in the master. it gives the possibilty to demonstrate differentapplicationswithout reprogrammingall the slaves. one application program has been developed for the master.it demonstrates the good functioningof the system : a remote heater control. with this application it's possible to control in a building in each room the heater (which is equipped with an st7536). the led on the slave simulates in this case the heater. with the master each heater can be set manual on or off, and even more, the master can regulate automatically the heater, by reading out the room temperature. this temperature is simulated with the 8 switches on the slave. the master has 4 different commands : 1:(00) manual off 00000000 heater on 2:(01) manual on temperature : 00001111 3:(10) not used 00010000 4:(11) automatic control 11111111 heater off v.8.1 - st6 programs the programs for both the master and the slave have been written in assembly language. an as- sembler is used to create the executable code. a special st6 kit is used to debug the programs. the eproms are also programmed with this kit. the program memory size of the st62e15 is 2k byte. the slave program is 1.6k byte, the application program for the master 1.8k byte long. some subroutines are used in both the master and the slave program, like the transmit/receivesubrou- tines and the error decoding. from both programs the most important subrou- tines are described on the next pages. the flow charts that are used do not give a detailed repre- sentation of the subroutines, but are used to ex- plain the structure of the subroutine. st7536 application note 20/35
v - heating control application (continued) v.8.1.1 - slave program main ? load watchdog call set_up call receive call decode ? read measure data call transmit yes no yes no received command = data request ? received destination = home address ? 7536-41.eps figure 35 in the main program first of all the watchdog is (re)loaded. the watchdog is a down-counter that generates a reset when it's not in time reloaded. it provides a recovery from a software upset. then the home address is read from the switches in the set-up routine. the slave will go in receive mode and be maintened until a complete frame is received. after that the contents of this frame is decoded. in the decode subroutine the bytes are corrected and dependingon the received command the led is set on or off. if the received destination address was the slaves home address and the received command was a data request the (simulated) measure data is read and then transmitted to the master. receive subroutine the receive subroutine is used to read a frame. it ignores all the rxd until the system address is received. when it is received for the second time, the next bytes of the frame are read and stored. to read the rxd this subroutine uses the read_bit subroutine which is described on figure 36. first of all the rx/tx line is reset. the st7536 and the powerline interface will then be in receive mode. then the read_bitsubroutine is called,which will add the next received bit to the rx_pattern. call read_bit (8x) rx_pattern rx_dest1 call read_bit (8x) rx_pattern rx_dest2 call read_bit (8x) rx_pattern rx_dest3 call read_bit (8x) call read_bit ret receive ? no yes ? no yes call read_bit (8x) rx_pattern rx_control1 call read_bit (8x) rx_pattern rx_control2 call read_bit (8x) rx_pattern rx_control3 call read_bit (8x) rx_pattern rx_data1 call read_bit (8x) rx_pattern rx_data2 call read_bit (8x) rx_pattern rx_data3 rx-pattern = system address ? rx-pattern = system address ? set rx/tx o0o 7536-42.eps figure 36 as long as the system address is not received, the programs continue read the rxd. when the system address is received, the next 8 bits will be loaded using the read_bit subroutine, and after that the rx_pattern should contain again the system address. if this is not the case this procedure starts again. else the next bytes will be read and stored. flrst the 3 destlnatlon addresses. the read_bit subroutine is called 8 times and the rx_pattern will then contain the next byte (rx_dest1 ) which is stored. the next 2 bytes (rx_dest2, rx_dest3) are read in the same way. when the destination addresses are received the control bytes and the data bytes are received and stored in the same way. st7536 application note 21/35
v - heating control application (continued) read-bit routine this routine is used to read the rxd is presented on pc7 (for the master on pc5). the st7536 delivers valid data on the positive edge of its clock. the inverted clock is used as the nmi input of the st6. this nmi is falling edge sensitive - > an nmi will be generated on the positive edge of the st7536 clock. this means that the rxd should be read immediately after a nmi interrupt. the re- ceived bit is then added to the (rx_)pattern. set accu b0 accu rx_pattern rx_pattern accu shift left accu load watchdog wait for nmi read_bit ret ? no yes reset accu b0 accu rx_pattern pc7 (rxd) = o1o ? ret 7536-43.eps figure 37 first of all the watchdog is reloaded. then the st6 will wait for the nmi (interrupt). the rx_patternis loaded into the accumulatorand then shifted left. if the received data bit is a o1o the next bit (b0 in the accumulator) is set to o1o. if the received bit is a o0o, this bit will be set to o0o. at the end the new pattern is stored. transmit subroutine this subroutine uses the send 8-bit subroutine to send a 8-bit pattern. this subroutine is described on figure 38. ret transmit wait set rx/tx o0o send 2 x preamble send 2 x system address send 3 x destination address send 3 x control byte send 3 x data byte set rx/tx o1o wait 5ms 7536-44.eps figure 38 in the transmit subroutine first off all the rx/tx line is set o1o. the st7536 and the powerline interface are then in transmit mode. typical carrier stabilisa- tion time of the st7536 is 5ms. therefore the pro- gram waits this time before sending all the bytes. first the preamble (10101010) is send 2 times and then the system address. the destinationaddress, the control byte and the data byte are send 3 time. this is done with the send 8-bit subroutine. send 8bit pattern subroutine the st7536 samples the txd on the positive edge of the clock. the inverted clock is used as the nmi input of the st6. on the positive edge of the clock (clr/t) an nmi interrupt occurs.thesoftwarewaits then 304 machine cycles before changing the txd. when the txd is changed it waits for the next nmi and again 304 cycles beforestoringthe next txd on pc5. using these delays it is possible to presentthe st7536 valid txd on the positive edge of its clock. both600 (channel1/2)and 1200 (channel3/4)baud bitrates can be handled this way. st7536 application note 22/35
v - heating control application (continued) st7536 reads txd clr/t clr/t nmi nmi nmi nmi nmi wait 304 txd ch. 1/2 bit bit bit bit wait for nmi 511 7536-45.eps figure 39 st7536 reads txd clr/t clr/t nmi nmi nmi nmi nmi wait 304 txd ch. 3/4 bit bit bit bit wait for nmi 255 7536-46.eps figure 40 send 8 bit pattern ? no yes was b7 o0o ? ret counter = 0 ? load watchdog 8 counter wait for nmi wait 304 cycles rotate left accu res pc5 set pc5 counter = counter - 1 ? no yes 7536-47.eps figure 41 in the subroutine the watchdog is (re)loaded. then the counteris set at 8. the st6 waits for the nmi and then 304 cycles. the accumulator contains the pat- tern that has to be transmit ted. this pattern is shift left;the carry bitwill containb7, b7 will containb6 etc. if b7 was a o0o pc5 (the txd output of the st6) is reset,if it wasa '1 'pc5 isset.bit7isthentransmitted. the counter is then decreased by 1, the software waits the same time, and the accumulator is shift left again. the carry bit will then contain b6 of the pattern that should be transmitted. the same as before, this bit is transferred to the txd output. this is also done with b5..b0. if b0 is trans- ferred(transmitted) the counter will be 0. and then the st6 will jump out of the subroutine. decode subroutine when a frame is received the main program jumps to this subroutine. in this subroutine first of all the error correction is called. after the correction, de- scribed below, the subroutine checks if the desti- nation address of the frame was the home address of the slave. in this case, and then the control byte indicates a command in the data byte, the subrou- tine decodes the data byte. then there is a jump out of the subroutine (see figure 42). st7536 application note 23/35
ret decode ? no yes rx_dest = home adr ? ret call error correction ? no rx_contr = command ? ? yes reset led yes ret ? yes ret no no ? yes no read measure data rx_data 00000010 ? rx_data 00000001 ? rx_data 00000100 ? ret set led 7536-48.eps figure 42 v - heating control application (continued) bit = 0 error correction bit x byte 1 bit x byte 2 bit x byte 3 bit x byte 2 bit x byte 3 bit = 0 bit = 1 0 1 0 0 0 1 1 0 1 1 7536-49.eps figure 43 call auto main ? no yes new command ? read command ? automatic ? yes no ? manual on ? yes no ? manual off ? yes no call man-on call man-off 7536-50.eps figure 44 three commands are used in this program : 1: data = 0000 0001 led off. 2: data = 0000 0010 led on. 3: data = 0000 0100 data request. dependingon the received data byte the led will be set on or off, or in case of a data request, the st6 reads the data on the system. error correction subroutine in this subroutine the bits of the 3 received bytes are compared. the resulting should be set (o1o) if at least 2 out of 3 received bit are set. if 2 or more received bits are reset, the resulting bit should be reset (o0o). all the bits of the bytes are tested this way. this is done bit by bit (bit x), using the same procedure (see figure 43). v.8.1.2 - master program for the master one application program is set up. it presentsthe st7536 in a central heating control. the receive, transmit and error correction subrou- tines are almost the same as described for the slave program. the master has a 2 bit command input (pc6/pc7). afterreading the command it is checked if it's a new command or an old command. the program con- tinues if a new command is read (from the switches). then this command is decoded : pc6/7: 00 heater off pc6/7: 01 heater on pc6/7: 10 not used pc6/7: 11 automatic control the program will jump to the subroutine corre- sponding to the command that is decoded; the automatic, manual on or manual off subroutine (see figure 44). st7536 application note 24/35
v - heating control application (continued) automatic control subroutine in this subroutine the master compares the receive data (temperature) from the slave to the reference value (00001 1 1 1). if the data < reference the heater is set on, else the heater is set off. first the master sends a datarequest command to the slave. then it goes in receive mode, to wait for the response of the slave. the received frame is then corrected, and the received destination ad- dress and control byte are checked. if the control byte indicates a response the received data is compared to the reference value (00001111).if the received data < the reference, a heater on com- mand will be transmitted, else a heater off com- mand. after that the command input is checked to be still an automaticcontrol command. in this case, the master will continue with controlling the heater (see figure 45). manual on/off subroutines although these routines are very simple, their func- tions are given in the flow charts below, to have a complete overview of the application program. the manual on subroutine sends a frame containing a heateron command, the manual off routine a frame containing a heater off command (see figure 46). v.8.1.3 - evaluation of the software the used protocol seems to be rather effective and functional. the system has been tested on very noise powerline networks, and no (software) prob- lems occured. the st6 programs have been writ- ten and tested step by step. when the programs were operatingaccording to the protocol they have not been 're-written'. thereforethe programs might not be as well structured as possible. for final application software, it might be usefull to evaluate the programs, and then rewrite some subroutines. the program size may be decrease, and a 'clean up' will make the programs easier to understand. ret tx heater on automatic no rx_dest = master adr ? ? yes transmit data request call receive call error correction ? ? yes no rx_control = response ? rx_data 00001111 ? tx heater off yes no ? yes no command still auto ? 7536-51.eps figure 45 manual_on ret manual_off tx heater off ret tx heater on 7536-52.eps figure 46 st7536 application note 25/35
annexe a 7536-53.tif figure 47 : b.e.r. st7536 application board comparison of channel 1/2/3/4 t=25 o c, line input = 1mv 7536-54.tif figure 48 : b.e.r. channel 3 (72khz.) st7536 board input 1mv & 5mv versus stand alone st7536 rai input 3mv 7536-55.tif figure 49 : b.e.r. comparison - st7536 board versus stand alone st7536 t=25 o c, channel 1 (82khz) 7536-56.tif figure 50 : b.e.r. comparison - st7536 board versus stand alone st7536 t=25 o c, channel 2 (67khz) st7536 application note 26/35
7536-57.tif figure 51 : b.e.r. comparison - st7536 board versus stand alone st7536 t=25 o c, channel 3 (72khz) 7536-58.tif figure 52 : b.e.r. comparison - st7536 board versus stand alone st7536 t=25 o c, channel 4 (86khz) st7536 application note 27/35
annexe b : b.e.r. st7536 application board (signal/noise frequency spectra) 7536-59.tif figure 53 : channel 1 (82khz) - s/n = -10db, input 1mv = -60db fsk (-60db) - 1mv 7536-60.tif figure 54 : channel 1 (82khz) - s/n = -10db, input 1mv = -60db noise (-70db) 7536-61.tif figure 55 : channel 1 (82khz) - s/n = -10db, input 1mv = -60db fsk + noise st7536 application note 28/35
7536-62.tif figure 56 : channel 2 (67khz) - s/n = -10db, input 1mv = -60db fsk (-60db) - 1mv 7536-63.tif figure 57 : channel 2 (67khz) - s/n = -10db, input 1mv = -60db noise (-70db) 7536-64.tif figure 58 : channel 2 (67khz) - s/n = -10db, input 1mv = -60db fsk + noise st7536 application note 29/35
7536-65.tif figure 59 : channel 3 (72khz) - s/n = -10db, input 1mv = -60db fsk (-60db) - 1mv 7536-66.tif figure 60 : channel 3 (72khz) - s/n = -10db, input 1mv = -60db noise (-70db) 7536-67.tif figure 61 : channel 3 (72khz) - s/n = -10db, input 1mv = -60db fsk + noise st7536 application note 30/35
7536-68.tif figure 62 : channel 3 (72khz) - s/n = -10db, input 5mv = -46db fsk (-46db) - 5mv 7536-69.tif figure 63 : channel 3 (72khz) - s/n = -10db, input 5mv = -46db noise (-56db) 7536-70.tif figure 64 : channel 3 (72khz) - s/n = -10db, input 5mv = -46db fsk + noise st7536 application note 31/35
7536-71.tif figure 65 : channel 4 (86khz) - s/n = -10db, input 1mv = -60db fsk (-60db) - 1mv 7536-72.tif figure 66 : channel 4 (86khz) - s/n = -10db, input 1mv = -60db noise (-70db) 7536-73.tif figure 67 : channel 4 (86khz) - s/n = -10db, input 1mv = -60db fsk + noise st7536 application note 32/35
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 27 28 25 26 nc nc nc rx/tx reset/ clr/t txd rxd rxdem rxfo txfi test1 test2 test3 test4 +5v chs brs xtal1 xtal2 afcf alci ato rai ifo demi agnd dgnd av dd dv dd av ss dv ss +5v c22 100nf c6 100nf c7 10 m f c5 1 m f f1 q1 11.0592mhz c2 22pf c1 22pf sw2 sw1 +5v r4 100k w r3 100k w c3 470nf c4 47nf r1 1.5k w r2 100k w u1 st7536 +5v c8 100nf c9 10 m f f2 f3 j 1 b a r e t t e p a s 2 5 4 s t 7 5 3 6 master micro-controller powerline interface 18 17 16 11 12 13 14 15 3 4 5 6 7 8 9 10 sw6 u5 18 17 16 12 13 14 15 19 27 26 25 24 23 22 21 20 r30 1k w r23 28 10 3 4 9 8 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa7 pb0 pb1 pb2 pb3 pb4 pb5 pb6 pb7 oscin oscout pc5 pc4 nmi 1 v dd u2 1 2 3 4 5 6 7 8 9 10 16 11 12 13 14 15 c24 22pf xt2 8mhz c23 22pf sw5 sw4 command 7 pc6 6 pc7 11 12 13 14 15 16 17 18 1 19 9 8 7 6 5 4 3 2 b1 b2 b3 b4 b5 b6 b7 b8 a1 a2 a3 a4 a5 a6 a7 a8 g dir s t 6 2 e 1 5 u4 74ls245 rx/tx rx/tx reset clr/t rxd txd u3f 11 reset 5 u3a 74ls04 r22 100k w r21 100k w +5v sw7 reset j1 +5v r17 47k w ra i ato r18 47k w 7 6 5 4 3 1 2 +5v -5v r19 100k w r20 1k w d1 1.5ke 400ca c21* c20* 1 2 3 4 5 r16 10m w c19 470nf 250v mkt power lines 220v j2 bornier 2 pts 7 5 4 3 1 2 6 r10 330 w r9 ** t5 bd238 r13 820 w c15 100nf c14 22 m f t6 bd237 r12 820 w c17 470nf c13 100nf c12 22 m f t8 bd238 t7 bd237 r11 10k w c16 680pf c18 1 m f r15 1 w r14 1 w t2 2n2907 t1 2n2222 t4 2n2907 c10 100nf +5v r6 270 w r7 270 w r8 270 w t3 2n2222 r5 47k w c11 100nf -5v tr1 toko t1002 n rx/tx reset clr/t txd rxd rx/tx measu re system tl071c tl071c contr oll er d a t a a d d r e s s channel 1 channel 2 channel 3 channel 4 18nf 28.8nf 22.0nf 15.6nf 1.5k w 1.8k w 1.8k w 1.5k w c20, c21 r9 12 13 1 2 7536-74.eps figure 68 : st7536 master annexe c : board schematics st7536 application note 33/35
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 27 28 25 26 nc nc nc rx/tx reset/ clr/t txd rxd rxde m rxfo txfi test1 test2 test3 test4 +5v chs brs xtal1 xtal2 afcf alci ato rai ifo demi agnd dgnd av dd dv dd av ss dv ss +5v c22 100nf c6 100nf c7 10 m f c5 1 m f f1 q1 11.0592mhz c2 22pf c1 22pf sw2 sw1 +5v r4 100k w r3 100k w c3 470nf c4 47nf r1 1.5k w r2 100k w u1 st7536 +5v c8 100nf c9 10 m f f2 f3 j 1 b a r e t t e p a s 2 5 4 s t 7 5 3 6 slave micro-controller powerline interface 18 17 16 11 12 13 14 15 3 4 5 6 7 8 9 10 sw6 u5 18 17 16 12 13 14 15 19 27 26 25 24 23 22 21 20 28 10 3 4 9 8 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa7 pb0 pb1 pb2 pb3 pb4 pb5 pb6 pb7 oscin oscout pc5 pc4 nmi 1 v dd u2 1 2 3 4 5 6 7 8 9 10 16 11 12 13 14 15 c24 22pf xt2 8mhz c23 22pf 7 pc6 6 pc7 s t 6 2 e 1 5 rx/tx rx/tx reset clr /t rxd txd u3f 11 reset 5 u3a 74ls04 r23 2.2k w r21 100k w sw4 reset j1 +5v r17 47k w rai ato r18 47k w 7 6 5 4 3 1 2 +5v -5v r19 100k w r20 1k w d1 1.5ke 400ca c21* c20* 1 2 3 4 5 r16 10m w c19 470nf 250v mkt power lines 220v j2 bornier 2 pts 7 5 4 3 1 2 6 r10 330 w r9 ** t5 bd238 r13 820 w c15 100nf c14 22 m f t6 bd237 r12 820 w c17 470nf c13 100nf c12 22 m f t8 bd238 t7 bd237 r11 10k w c16 680pf c18 1 m f r15 1 w r14 1 w t2 2n2907 t1 2n2222 t4 2n2907 c10 100nf +5v r6 270 w r7 270 w r8 270 w t3 2n2222 r5 47k w c11 100nf -5v tr1 toko t1002 n rx/tx reset clr/t txd rxd rx/tx measure system tl071c tl071c controller d a t a a d d r e s s channel 1 channel 2 channel 3 channel 4 18nf 28.8nf 22.0nf 15.6nf 1.5k w 1.8k w 1.8k w 1.5k w c20, c21 r9 +5v +5v u3d 74ls04 u3c ld1 led r24 560 w 13 12 9 85 6 2 1 r22 100k w 7536-75.eps figure 69 : st7536 slave st7536 application note 34/35
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no licence is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical comp onents in lifesupport devicesor systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 1998 stmicroelectronics - all rights reserved purchase of i 2 c components of stmicroelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system conforms to the i 2 c standard specifications as defined by philips. stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the netherlands singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. http://www.st.com st7536 application note 35/35

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