View RT9104_4798296.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ds9104-01 april 2011 www.richtek.com RT9104 ordering information note : richtek products are : rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. suitable for use in snpb or pb-free soldering processes. pin configurations (top view) sop-16/dip-16 3w stereo class-d audio power amplifier with dc volume control features z z z z z 4.5v to 5.5v input supply range z z z z z 3w per channel into 3 speakers (thd+n = 10%) z z z z z 300khz high internal switching frequency z z z z z efficiency greater than 85% z z z z z dc volume control from ? ? ? ? ? 70db to 20db z z z z z fade in at enable and power on z z z z z thin 16-lead wqfn and sop-16 and dip-16 packages z z z z z rohs compliant and halogen free applications z lcd monitors z consumer device z powered speakers wqfn-16l 3x3 general description the RT9104 is a stereo, high efficiency, filter free class-d audio amplifier capable of delivering 3w per channel into 3 speakers. for application flexibility, the gain can be set by external dc volume control. thermal protection as well as overcurrent protection functions are included in the stereo amplifier. the sop-16 packaging without additional heat sink makes the RT9104 class-d amplifier an ideal choice for monitor applications. the RT9104 is also well suited for battery powered applications because of its operating voltage (from 4.5v to 5.5v) and very low shutdown current. the RT9104 is available in wqfn-16l 3x3, sop-16 and dip-16 packages. inl volume_in pvdd lout+ gnd lout- gnd inr bypass rout+ pvdd gnd rout- gnd avdd 6 7 8 4 5 2 3 16 13 15 14 12 9 11 10 shdn rout- gnd rout+ pvdd lout+ pvdd lout- gnd gnd avdd gnd bypass inr volume_in inl 12 11 10 9 13 14 15 16 1 2 3 4 8 7 6 5 gnd 17 shdn RT9104 package type qw : wqfn-16l 3x3 (w-type) s : sop-16 n : dip-16 lead plating system g : green (halogen free and pb free)
2 ds9104-01 april 2011 www.richtek.com RT9104 typical application circuit inl volume_in gnd bypass lout+ inr RT9104 v dd c inr c inl c b 0.22f 0.22f audio input 2.2f r l c avdd 0.1f avdd c pvdd2 0.1f c pvdd1 10f pvdd in from dac or potentiometer (dc volatge) c vol 1f ferrite bead ferrite bead lout- rout+ rout- ferrite bead r l 1nf 1nf 1nf ferrite bead 1nf shdn c lout+ c lout- c rout+ c rout- gu= : product code ymdnn : date code marking information RT9104gn : product number ymdnn : date code RT9104gs : product number ymdnn : date code RT9104gn RT9104gs RT9104gqw richtek RT9104 gnymdnn RT9104 gsymdnn gu=ym dnn
3 ds9104-01 april 2011 www.richtek.com RT9104 functional pin description function block diagram pin no. sop-16/dip-16 wqfn-16l 3x3 pin name pin function 1 15 inr right channel audio signal input. 2 16 bypass common mode voltage output. 3 1 rout+ positive right channel btl output. 4, 13 2, 11 pvdd power supply. 5, 7, 10, 12 3, 10, 5, 8, 17 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 6 4 rout ? negative right channel btl output. 8 6 shdn shutdown pin, enable when shdn = ?1?, disable when shdn = ?0? . 9 7 avdd analog reference input voltage. connect to a regulator output voltage as better. 11 9 l out ? negative left channel btl output. 14 12 lout+ positive left channel btl output. 15 13 volume_in volume control pin. dc in for controlling volume. 16 14 inl left channel audio signal input. output power stage inl rout- pvdd rout+ inr shdn + - + - pgnd pwm generator depop circuit over temperature /over current protection dc volume control circuit output power stage + - + - pwm generator lout- pvdd lout+ pgnd bypass bypass bypass bypass avdd gnd volume_in bypass
4 ds9104-01 april 2011 www.richtek.com RT9104 electrical characteristics (v dd = 5v, gain = 6db, r l = 8 , t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) z supply voltage, avdd, pvdd ---------------------------------------------------------------------------------- 0.3v to 6v z input voltage, inl, in r ------------------------------------------------------------------------------------------- 0.3v to (v dd + 0.3v) z power dissipation, p d @ t a = 25 c wqfn-16l 3x3 ----------------------------------------------------------------------------------------------------- 1.471w sop-16 -------------------------------------------------------------------------------------------------------------- 1.176w dip-16 ---------------------------------------------------------------------------------------------------------------- 1.333w z package thermal resistance (note 2) wqfn-16l 3x3, ja ----------------------------------------------------------------------------------------------- 68 c/w wqfn-16l 3x3, jc ----------------------------------------------------------------------------------------------- 7.5 c/w sop-16, ja --------------------------------------------------------------------------------------------------------- 85 c/w dip-16, ja ----------------------------------------------------------------------------------------------------------- 75 c/w z junction temperature --------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ----------------------------------------------------------------------- 260 c z storage temperature range ------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) - -------------------------------------------------------------------------------------- 2kv mm (machine mode) ---------------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z supply voltage range, avdd, pvdd --------------------------------------------------------------------------- 4.5v to 5.5v z junction temperature range ------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ------------------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit under voltage lockout threshold v uvlo v dd rising -- 4 -- v v dd under voltage lockout hysteresis -- 100 -- mv logic-high v ih 2 -- -- shdn input threshold voltage logic-low v il -- -- 0.4 v quiescent current i q v dd = 5.5v, no load , -- 3 -- ma shutdown current i shdn v shdn = 0v, v dd = 4.5 v to 5.5v -- -- 10 a output impedance in shd n v shdn = 0v -- >1 -- k switching frequency f sw v dd = 4.5v to 5.5v -- 300 -- khz resistance from shutdown to gnd 20 -- -- k thermal shutdown t sd 130 150 170 c to be continued
5 ds9104-01 april 2011 www.richtek.com RT9104 note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a high effective thermal conductivity four-layer test board of jedec 51-7 thermal measurement standard. the measurement case position of jc is on the exposed pad of the package note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. parameter symbol test conditions min typ max unit thd+n = 10%, f = 1khz, r l = 3 -- 3 -- thd+n = 1%, f = 1khz, r l = 3 -- 2.35 -- thd+n = 10%, f = 1khz, r l = 4 -- 2.7 -- thd+n = 1%, f = 1khz, r l = 4 -- 2.3 -- thd+n = 10%, f = 1khz, r l = 8 -- 1.6 -- output power (per channel) p o thd+n = 1%, f = 1khz, r l = 8 -- 1.25 -- w total harmonic distorti on pl us n oise thd+n p o = 1w, r l = 8 , f = 1khz -- 0.2 -- % cros stalk f = 1khz, v dd = 4.5v to 5.5v, p o = 2w, r l = 4 -- ? 85 -- db signal-to-noise ratio snr p o = 1w, r l = 8 , a weighting -- 90 -- db start-up time from shutdown -- 300 -- ms efficiency load = (8 + 33 h) -- 85 -- %
6 ds9104-01 april 2011 www.richtek.com RT9104 typical operating characteristics efficiency vs. output power 0 10 20 30 40 50 60 70 80 90 100 00.511.522.533.5 output power (w) efficiency (%) v dd = 5v, r l = 4 , 33 h, f = 1khz, gain = 20db) efficiency vs. output power 0 10 20 30 40 50 60 70 80 90 100 0 0.4 0.8 1.2 1.6 2 output power (w) efficiency (%) v dd = 5v, r l = 8 , 33 h, f = 1khz, gain = 20db) thd+n vs. frequency 20 50 100 200 500 1k 2k 5k 10k 20k frequency (hz) thd+n (%) v dd = 5v, r l = 8 , p o = 1w, gain = 20db 20 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 right channel left channel thd+n vs. frequency 20 50 100 200 500 1k 2k 5k 10k 20k thd+n (%) frequency (hz) v dd = 5v, r l = 4 , p o = 1w, gain = 20db 20 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 right channel left channel thd+n vs. output power 10m 20m 50m 100m 200m 500m 1 2 5 thd+n (%) output power (w) 20 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 v dd = 5v, r l = 4 , f = 1khz, gain = 20db right channel left channel thd+n vs. output power 10m 20m 50m 100m 200m 500m 1 2 5 thd+n (%) output power (w) 20 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 v dd = 5v, r l = 8 , f = 1khz, gain = 20db right channel left channel
7 ds9104-01 april 2011 www.richtek.com RT9104 thd+n vs. frequency 20 50 100 200 500 1k 2k 5k 10k 20k thd+n (%) frequency (hz) v dd = 5v, r l = 4 , p o = 1w, gain = 6db 20 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 right channel left channel noise floor vs. frequency 20 50 100 200 500 1k 2k 5k 10k 20k noise floor (db) frequency (hz) +20 +10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 r l = 4 , gain = 20db right channel left channel crosstalk vs. frequency 20 50 100 200 500 1k 2k 5k 10k 20k crosstalk (db) frequency (hz) -40 -50 -60 -70 -80 -90 -100 -110 -120 v dd = 5v, r l = 8 , p o = 1w, gain = 6db r to l l to r thd+n vs. frequency 20 50 100 200 500 1k 2k 5k 10k 20k frequency (hz) thd+n (%) v dd = 5v, r l = 8 , p o = 0.5w, gain = 6db 20 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 right channel left channel
8 ds9104-01 april 2011 www.richtek.com RT9104 application information the RT9104 is a single-ended input and high efficiency class-d stereo audio amplifier featuring low resistance internal power mosfets and over 85% power efficiency. it requires only a few external components with small footprints. the RT9104 also supports dc volume control from ? 70db to 20db. therefore, it is very suitable for portable devices and lcd monitor applications. with a filter-less modulation feature, the RT9104 can limit the number of external components to a minimum. dc volume control the voltage gain of RT9104 can be set by the external dc voltage through the ? volume_in ? pin. there are a total of 32 discrete gain steps of the amplifier with a range from ? 70db to 20db for btl operation. a pictorial representation of the typical volume control can be found in figure 1. gain (db) volume_in (v) gain (db) volume_in (v) 20 3.4 9 1.8 19.5 3.3 8 1.7 19 3.2 7 1.6 18.5 3.1 6 1.5 18 3 5 1.4 17.5 2.9 4 1.3 17 2.8 3 1.2 16.5 2.7 2 1.1 16 2.6 1 1 15.5 2.5 0 0.9 15 2.4 -2 0.8 14 2.3 -4 0.7 13 2.2 -7 0.6 12 2.1 -19 0.5 11 2 -37 0.4 10 1.9 -70 0.3 table 1. volume_in voltage for gain control gain table -70 -50 -30 -10 10 30 0.3 0.7 1.1 1.5 1.9 2.3 2.7 3.1 3.5 volume_in (v) gain (db) figure 1. typical dc voltage control operation fade in for design flexibility, a fade mode is provided to slowly ramp up the amplifier gain when coming out of shutdown mode. this mode provides a smooth transition between the active and shutdown states and virtually eliminates any pops or clicks on the outputs. decoupling capacitor the RT9104 is a high performance class-d audio amplifier that requires adequate power supply decoupling to ensure high efficiency and low total harmonic distortion (thd). to filter out higher frequency transients, spikes, or digital hash on the line, a low equivalent-series-resistance (esr) ceramic capacitor (typically 10 f), placed as close as possible to the pvdd pins will achieve the best performance. placing this decoupling capacitor close to the RT9104 is very important, since any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. for filtering out lower frequency noise signals, a 10 f or greater capacitor can be placed near the audio power amplifier.
9 ds9104-01 april 2011 www.richtek.com RT9104 short circuit protection the RT9104 has short circuit protection circuitry on the outputs which prevents damage to the device during unexpected applications. when a short circuit is detected, the outputs are disabled immediately .however, once the short is removed, the device will re-activate again. low supply voltage detection the RT9104 incorporates circuitry designed to detect low supply voltage level. when the supply voltage falls to 4v or below, the RT9104 goes into a state of shutdown and the current consumption drops from milliamperes to microamperes. the device will resume normal function again once v dd > 4.2v. thermal protection thermal protection on the RT9104 automatically disables the outputs when the junction temperature exceeds 150 c in order to prevent damage to the device. there is a 20 degree tolerance on this trip point from device to device. once the temperature cools below 130 c, the device will auto-resume normal operations. how to reduce emi most applications require a ferrite bead filter as shown in figure 2. the ferrite filter reduces emi of around 1mhz and higher. when selecting a ferrite bead, choose one with high impedance at high frequencies and low impedance at low frequencies. 1nf 1nf out+ out- ferrite bead ferrite bead figure 2. typical ferrite chip bead filter thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : figure 3. derating curves for RT9104 package p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications of the RT9104, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for wqfn-16l 3x3 packages, the thermal resistance, ja , is 68 c/w on a standard jedec 51-7 four-layer thermal test board. for sop-16 packages, the thermal resistance, ja , is 85 c/w on a standard jedec 51-7 four-layer thermal test board. for dip-16 packages, the thermal resistance, ja , is 75 c/w on a standard jedec 51-7 four-layer thermal test board.the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (68 c/w) = 1.471w for wqfn-16l 3x3 package p d(max) = (125 c ? 25 c) / (85 c/w) = 1.176w for sop-16 package p d(max) = (125 c ? 25 c) / (75 c/w) = 1.333w for dip-16 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for the RT9104 packages, the derating curves in figure 3 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 0255075100125 ambient temperature (c) maximum power dissipation (w) 1 sop-16 wqfn-16l 3x3 four-layer pcb dip-16
10 ds9104-01 april 2011 www.richtek.com RT9104 layout considerations for best performance of the RT9104, the below pcb layout guidelines must be strictly followed. place the decoupling capacitors as close as possible to the pvdd, avdd and gnd pins. keep the differential output traces as wide and short as possible. the traces of (inr & inl) and (lout+ & lout ? , rout+ & rout ? ) should be kept equal width and length respectively. connect power sections directly to the ground plane for maximum thermal dissipation and noise protection. figure 4. pcb layout guide inl volume_in pvdd lout+ gnd lout- gnd inr bypass rout+ pvdd gnd rout- gnd avdd 6 7 8 4 5 2 3 16 13 15 14 12 9 11 10 shdn c avdd gnd c vol gnd in_l c inl in_r c inr c pvdd1 gnd the decoupling capacitor must be placed as close to the ic as possible ferrite bead ferrite bead ferrite bead ferrite bead r l r l v dd the decoupling capacitor must be placed as close to the ic as possible c b c pvdd2 c rout+ c rout- c lout+ c lout-
11 ds9104-01 april 2011 www.richtek.com RT9104 outline dimension a a1 a3 d e 1 d2 e2 l b e see detail a dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 d 2.950 3.050 0.116 0.120 d2 1.300 1.750 0.051 0.069 e 2.950 3.050 0.116 0.120 e2 1.300 1.750 0.051 0.069 e 0.500 0.020 l 0.350 0.450 0.014 0.018 w-type 16l qfn 3x3 package note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options 1 1 2 2
12 ds9104-01 april 2011 www.richtek.com RT9104 f b c i h d a j m dimensions in millimeters dimensions in inches symbol min max min max a 9.804 10.008 0.386 0.394 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.178 0.254 0.007 0.010 i 0.102 0.254 0.004 0.010 j 5.791 6.198 0.228 0.244 m 0.406 1.270 0.016 0.050 16 ? lead sop plastic package
13 ds9104-01 april 2011 www.richtek.com RT9104 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property inf ringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications i s assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com 16-lead dip plastic package dimensions in millimeters dimensions in inches symbol min max min max a 3.700 4.320 0.146 0.170 a1 0.381 0.710 0.015 0.028 a2 3.200 3.600 0.126 0.142 b 0.360 0.560 0.014 0.022 b1 1.143 1.778 0.045 0.070 d 18.800 19.300 0.740 0.760 e 6.200 6.600 0.244 0.260 e1 7.620 8.255 0.300 0.325 e 2.540 0.100 l 3.000 3.600 0.118 0.142

▲Up To Search▲

Price & Availability of RT9104

	To Download RT9104 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .