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s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1 - 1 1 product overview s3c8-series microcontrollers samsung's s3c8 series of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. important cpu features include: ? efficient register-oriented architecture ? selectable cpu clock sources ? idle and stop power-down mode release by interrupt ? built-in basic timer with watchdog function a sophisticated interrupt structure recognizes up to eight interrupt levels. each level can have one or more interrupt sources and vectors. fast interrupt processing (within a minimum six cpu clocks) can be assigned to specific interrupt levels. s3c80f7/c80f9/c80g7/c80g9 microcontroller the s3c80f7/c80f9/c80g7/c80g9 single-chip cmos microcontroller is fabricated using a highly advanced cmos process and is based on samsung's newest cpu architecture. the s3c80f9/c80g9 is the microcontroller which has 32-kbyte mask-programmable rom and s3c80f7/c80g7 is the microcontroller which has 24-kbyte mask-programmable rom. the s3p80f9/p80g9 is the microcontroller which has 32-kbyte one-time-programmable eprom and s3p80f7/p80g7 is the microcontroller which has 24-kbyte one-time-programmable eprom. using a proven modular design approach, samsung engineers developed s3c80f7/c80f9/c80g7/c80g9 by integrating the following peripheral modules with the powerful sam87 rc core: ? internal lvd circuit and 16 bit-programmable pins for external interrupts. ? one 8-bit basic timer for oscillation stabilization and watchdog function (system reset). ? one 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes. ? one 8-bit counter with auto-reload function and one-shot or repeat control. the s3c80f7/c80f9/c80g7/c80g9 is a versatile general-purpose microcontroller which is especially suitable for use as remote transmitter controller. it is currently available in a 32-pin sop, 42-pin sdip and 44-pin qfp package.
product overview s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 1 - 2 features cpu sam87rc cpu core memory 32-kbyte internal rom (s3c80f9/c80g9) : 0000h?7fffh 24-kbyte internal rom (s3c80f7/c80g7) : 0000h?5fffh data memory: 272-byte ram (318 register) instruction set 78 instructions idle and stop instructions added for power- down modes instruction execution time 500 ns at 8-mhz f osc (minimum) interrupts 22 interrupt sources with 16 vector and 7 level. i/o ports three 8-bit i/o ports (p0?p2), one 8-bit output port(p4) and 6-bit port (p3) for a total of 38 bit- programmable pins.(44-qfp) three 8-bit i/o ports (p0?p2), one 8-bit output port(p4) and 4-bit port (p3) for a total of 36 bit- programmable pins.(42-sdip) three 8-bit i/o ports (p0?p2) and one 2-bit i/o port (p3) for a total of 26-bit programmable pins. (32-sop) timers and timer/counters one programmable 8-bit basic timer (bt) for oscillation stabilization control or watchdog timer (software reset) function one 8-bit timer/counter (timer 0) with three operating modes; interval mode, capture and pwm mode. one 16-bit timer/counter (timer1) with two operating modes; interval mode and capture. carrier frequency generator one 8-bit counter with auto-reload function and one-shot or repeat control (counter a) back-up mode when v dd is lower than v lvd , the chip enters back-up mode to block oscillation and reduce the current consumption. in s3c80g7/c80g9, this function is disabled when operating state is ?stop mode?. when reset pin is lower than input low voltage (v il ), the chip enters back-up mode to block oscillation and reduce the current consumption. low voltage detect circuit low voltage detect to get into back-up mode. low level detect voltage - s3c80f7/c80f9: 2.20 v ( typ) 200mv - s3c80g7/c80g9: 1.90 v ( typ) 200mv operating temperature range ?40 c to + 85 c operating voltage range 1.7v to 5.0v at 4 mhz f osc (s3c80g7/c80g9) 2.0v to 5.0v at 8 mhz f osc (s3c80f7/c80f9) package type 44-pin qfp-1010b 42-pin sdip 32-pin sop
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1- 3 block diagram port 0 p0.0-0.3 (int0-int3) p0.4-p0.7 (int4) i/o port and interrupt control 32k-bytes rom 317-bytes register file sam87rc cpu port 1 p2.0-2.3 (int5-int8) port 4 p4.0-4.7 lvd p1.0-p1.7 test reset main osc 8-bit basic timer 8-bit timer/ counter 16-bit timer/ counter v dd carrier registor (counter a) x out x in port 3 port 2 p2.4-2.7 (int9) p3.0-t0pwm/ t0cap/(t1cap) p3.1-rem/(t0ck) p3.2/(t0ck) p3.3/(t1cap) p3.4-3.5 figure 1-1. block diagram
product overview s3c80f7/c80f9/c80g 7/c80g9 (ks88c01524/c01532/c01624/c01632) 1- 4 pin assignments p4.2 p4.1 p4.0 p2.0/int5 p2.1/int6 p2.2/int7 p2.3/int8 p2.4/int9 p3.0/t0pwm/t0cap/ sdat r3.1/rem/ sclk v dd v ss x out x in test p2.5/int9 p2.6/int9 reset p2.7/int9 p1.0 p3.2/t0ck 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 p4.3 p0.7/int4 p0.6/int4 p0.5/int4 p0.4/int4 p0.3/int3 p0.2/int2 p0.1/int1 p0.0/int0 p4.4 p4.5 p4.6 p1.7 p1.6 p1.5 p1.4 p1.3 p1.2 p1.1 p4.7 p3.3/t1cap 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 s3c80f7/c80f9 /c80g7/c80g9 (top view) 42-sdip figure 1-2. pin assignment diagram (42-pin sdip package)
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1- 5 p0.3/int3 p0.2/int2 p0.1/int1 p0.0/int0 p4.4 p4.5 p4.6 p1.7 p1.6 p1.5 p1.4 p0.4/int4 p0.5/int4 p0.6/int4 p0.7/int4 p4.3 p4.2 p4.1 p4.0 p2.0/int5 p2.1/int6 p2.2/int7 s3c80f7/c80f9 /c80g7/c80g9 (top view) (44-qfp) 34 35 36 37 38 39 40 41 42 43 44 33 32 31 30 29 28 27 26 25 24 23 p1.3 p1.2 p1.1 p4.7 p3.3/t1cap p3.2/t0ck p1.0 p2.7/int9 p3.5 p3.4 reset 22 21 20 19 18 17 16 15 14 13 12 p2.3/int8 p2.4/int9 p3.0/t0pwm/t0cap/ sdat p3.1/rem/ sclk v dd v ss x out x in test p2.5/int9 p2.6/int9 1 2 3 4 5 6 7 8 9 10 11 figure 1-3. pin assignment diagram (44-pin qfp package)
product overview s3c80f7/c80f9/c80g 7/c80g9 (ks88c01524/c01532/c01624/c01632) 1- 6 v ss x in x out test p2.5/int9 p2.6/int9 reset p2.7/int9 p1.0 p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 p1.7 s3c80f7/c80f9 /c80g7/c80g9 (top view) 32-sop 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 v dd p3.1/rem/t0ck/ sclk p3.0/t0pwm/t0cap/t1cap/ sdat p2.4/int9 p2.3/int8 p2.2/int7 p2.1/int6 p2.0/int5 p0.7/int4 p0.6/int4 p0.5/int4 p0.4/int4 p0.3/int3 p0.2/int2 p0.1/int1 p0.0/int0 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 figure 1-4. pin assignment diagram (32-pin sop package)
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1- 7 table 1-1. pin descriptions of 44-qfp and 42-sdip pin names pin type pin description circuit type 42 pin no. 44 pin no. shared functions p0.0?p0.7 i/o i/o port with bit-programmable pins. configurable to input or push-pull output mode. pull-up resistors can be assigned by software. pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. sed & r circuit built in p0 for stop releasing. 1 34?41 30?37 ext. int (int0 - 4) p1.0?p1.7 i/o i/o port with bit-programmable pins. configurable to input mode or output mode. pin circuits are either push-pull or n-channel open-drain type. 2 20 24?30 16 20?26 ? p2.0?p2.3 p2.4?p2.7 i/o i/o port with bit-programmable pins. configurable to input or push-pull output mode. pull-up resistors can be assigned by software. pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. sed & r circuit built in p2 for stop releasing. 1 4?8, 16, 17 19 42?44 1,2, 10,11, 15 ext. int (int5?9) p3.0 p3.1 i/o 2-bit i/o port with bit-programmable pins. configurable to input mode, push-pull output mode, or n-channel open-drain output mode. input mode with pull-up resistors can be assigned by software. the two port 3 pins have high current drive capability 3 4 9?10 3?4 t0pwm/ t0cap rem p3.2?p3.3 i c-mos input port with pull-up resistors 5 21 22 17 18 (t0ck) (t1cap) p3.4?p3.5 o open drain output port for high current drive 6 none 13?14 ? p4.0?p4.7 o 8- bit-programmable output pins. configurable to open drain output port or push-pull output port. 7 1?3 42,23 31-33 41?38 27?29 19 ? x in , x out ? system clock input and output pins ? 13,14 7,8 ? reset i system reset signal input pin and back- up mode input. 8 18 12 ? test i test signal input pin (for factory use only; must be connected to v ss .) ? 15 9 ? v dd ? power supply input pin ? 11 5 ? v ss ? ground pin ? 12 6 ?
product overview s3c80f7/c80f9/c80g 7/c80g9 (ks88c01524/c01532/c01624/c01632) 1- 8 table 1-2. pin descriptions of 32-sop pin names pin type pin description circuit type 32 pin no. shared functions p0.0?p0.7 i/o i/o port with bit-programmable pins. configurable to input or push-pull output mode. pull-up resistors are assignable by software. pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. sed & r circuit built in p0 for stop releasing. 1 17?24 ext. int p1.0?p1.7 i/o i/o port with bit-programmable pins. configurable to input mode or output mode. pin circuits are either push-pull or n-channel open-drain type. 2 9?16 ? p2.0?p2.3 p2.4?p2.7 i/o i/o port with bit-programmable pins. configurable to input or push-pull output mode. pull-up resistors can be assigned by software. pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/disable, and interrupt pending control. sed & r circuit built in p2 for stop releasing. 1 25?28 29,5, 6,8 ext. int p3.0 p3.1 i/o 2-bit i/o port with bit-programmable pins. configurable to input mode, push-pull output mode, or n-channel open-drain output mode. input mode with pull-up resistors can be assigned by software. the two port 3 pins have high current drive capability. 3 4 30,31 t0pwm/ t0cap/t1cap rem/t0ck x in , x out ? system clock input and output pins ? 2,3 ? reset i system reset signal input pin and back-up mode input. 8 7 ? test i test signal input pin (for factory use only; must be connected to v ss ). ? 4 ? v dd ? power supply input pin ? 32 ? v ss ? ground pin ? 1 ?
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1- 9 pin circuits v dd pull-up resistor v dd v ss noise filter input/ output stop release pull-up enable data output disable external interrupt stop figure 1-5. pin circuit type 1 (port 0 and port2)
product overview s3c80f7/c80f9/c80g 7/c80g9 (ks88c01524/c01532/c01624/c01632) 1- 10 pin circuits (continued) v dd pull-up resistor v dd v ss noise filter input/ output pull-up enable data output disable normal input open-drain figure 1-6. pin circuit type 2 (port 1)
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1- 11 pin circuits (continued) v dd pull-up enable v dd p3.0/t0pwm t0cap/(t1cap) pull-up resistor open-drain port 3.0 data v ss p3.0 input m u x p3con.2 data output disable t0cap/(t1cap) t0_pwm noise filter m u x p3con.2,6,7 figure 1-7. pin circuit type 3 (p3.0)
product overview s3c80f7/c80f9/c80g 7/c80g9 (ks88c01524/c01532/c01624/c01632) 1- 12 pin circuits (continued) v dd pull-up enable v dd p3.1/rem/(t0ck) pull-up resistor open-drain port 3.1 data v ss p3.1 input m u x p3con.5 data output disable t0ck caof(cacon.0) carrier on/off (p3.7) noise filter m u x p3con.5,6,7 figure 1-8. pin circuit type 4 (p3.1) circuit v dd pull-up resistor input t0ck : p3.2 t1cap: p3.3 m u x figure 1-9. pin circuit type 5 (p3.2, p3.3)
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) product overview 1- 13 pin circuits (continued) data output v ss figure 1-10. pin circuit type 6 (p3.4, p3.5) v dd v ss output data open-drain output disable figure 1-11. pin circuit type 7 (port 4) v dd pull-up resistor reset figure 1-12. pin circuit type 8 ( reset )
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 14- 1 14 electrical data 1 ( s3c80f7/c80f9) overview in this section, s3c80f7/c80f9 electrical characteristics are presented in tables and graphs. the information is arranged in the following order: ? absolute maximum ratings ? d.c. electrical characteristics ? d ata retention supply voltage in stop mode ? stop mode release timing when initiated by an external interrupt ? stop mode release timing when initiated by a reset ? i/o capacitance ? a.c. electrical characteristics ? input timing for external interrupts ? input timing for reset ? oscillation characteristics ? oscillation stabilization time
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 14- 2 table 14-1. absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v in ? ? 0.3 to v dd + 0.3 v output voltage v o all output pins ? 0.3 to v dd + 0.3 v output current high i oh one i/o pin active ? 18 ma all i/o pins active ? 60 output current low i ol one i/o pin active + 30 ma total pin current for ports 0, 1, and 2 + 100 total pin current for port 3 + 40 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c table 14-2. d.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.0 v) parameter symbol conditions min typ max unit operating voltage v dd f osc = 8 mhz (instruction clock = 2 mhz) 2.0 ? 5.0 v input high voltage v ih1 all input pins except v ih2 and v ih3 0.8 v dd ? v dd v v ih2 reset 0.85 v dd v dd v ih3 xin v dd ? 0.3 v dd input low voltage v il1 all input pins except v il2 and v il3 0 ? 0.2 v dd v v il2 reset 0.2 v dd v il3 xin 0.3 output high voltage v oh1 v dd = 2.4 v i oh = ? 6 ma port 3.1 only, ta = 25 c v dd ? 0.7 v v oh2 v dd = 2.4 v, i oh = ? 2.2ma p3.0, p2.0?2.3 t a = 25 c v dd ? 0.7
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 14- 3 table 14-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.0 v) parameter symbol conditions min typ max unit output high voltage v oh3 v dd = 2.4 v,i oh = ? 1 ma port0, port1, p2.4-2.7 and port4 t a = 25 c v dd ? 1.0 ? ? v output low voltage v ol1 v dd = 2.4 v, i ol = 12 ma, port 3.1 only, t a = 25 c ? 0.4 0.5 v v ol2 v dd = 2.4 v, i ol = 5 ma p3.0, p3.4-3.5, p2.0-2.3 t a = 25 c 0.4 0.5 v ol3 i ol = 2ma port 0, port1, p2.4-2.7 and port4 t a = 25 c 0.4 1 input high leakage current i lih1 v in = v dd all input pins except x in and x out ? ? 1 a i lih2 v in = v dd , x in and x out 20 input low leakage current i lil1 v in = 0 v all input pins except x in , x out , and reset ? ? ? 1 a i lil2 v in = 0 v x in and x out ? 20 output high leakage current i loh v out = v dd all output pins ? ? 1 a output low leakage current i lol v out = 0 v all output pins ? ? ? 1 a pull-up resistors r l1 v in = 0 v, v dd = 2.4 v t a = 25 c, ports 0?2, p3.2?3.3 44 55 95 k w
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 14- 4 table 14-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.0 v) parameter symbol conditions min typ max unit supply current (note) i dd1 operating mode v dd = 5.0 v 8 mhz crystal ? 6 11 ma 4 mhz crystal 4.5 9 i dd2 idle mode v dd = 5.0 v 8 mhz crystal 1.8 3.5 4 mhz crystal 1.6 3.0 i dd3 stop mode; v dd = 5.0 v ? 18 25 ua v dd = 3.6 v 12 15 v dd = 2.4 v 4.5 8 v dd = 0.7 v 1 1.5 note : supply current does not include current drawn through internal pull-up resistors or external output current loads. table 14-3. characteristics of low voltage detect circuit (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit hysteresys voltage of lvd (slew rate of lvd) d v ? ? 100 300 mv low level detect voltage v lvd ? 2.00 2.20 2.40 v table 14-4. data retention supply voltage in stop mode (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit data retention supply voltage v dddr ? 1.0 ? 5.0 v data retention supply current i dddr v dddr = 1.0 v stop mode ? ? 1 a
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 14- 5 execution of stop instrction ~ ~ v dddr ~ ~ stop mode idle mode (basic timer active) data retention mode t wait ext int v dd normal operating mode 0.2v dd 0.8v dd figure 14-1. stop mode release timing when initiated by an external interrupt v dd ~ ~ normal operating mode ~ ~ stop mode oscillation stabilization time t wait reset occur execution of stop instrction reset note : t wait is the same as 4096 x 16 x 1/f osc . figure 14-2. stop mode release timing when initiated by a reset
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 14- 6 normal operating mode ~ ~ stop mode oscillation stabilization time reset occur execution of stop instrction v dd note : t wait is the same as 4096 x 16 x 1/f osc . v lvd ~ ~ data retention time v dddr back-up mode t wait figure 14-3. stop mode release timing when initiated by a lvd table 14-5. input/output capacitance (t a = ? 40 c to + 85 c , v dd = 0 v) parameter symbol conditions min typ max unit input capacitance c in f = 1 mhz; unmeasured pins are connected to v ss ? ? 10 pf output capacitance c out i/o capacitance c io table 14-6. a.c. electrical characteristics (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit interrupt input, high, low width t inth , t intl p0.0?p0.7, p2.3?p2.0 v dd = 5.0 v 200 300 ? ns reset input low width t rsl input v dd = 5.0 v 1000 ? ?
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 14- 7 t inth t intl 0.8 v dd 0.2 v dd note : the unit t cpu means one cpu clock period. figure 14-4. input timing for external interrupts (port 0, p2.3?p2.0) normal operating mode oscillation stabilization time reset occur v dd note : t wait is the same as 4096 x 16 x 1/f osc . reset t wait normal operating mode back-up mode (stop mode) figure 14-5. input timing for reset
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 14- 8 table 14-7. oscillation characteristics (t a = ? 40 c + 85 c) oscillator clock circuit conditions min typ max unit crystal x in c1 c2 x out cpu clock oscillation frequency 1 ? 8 mhz ceramic x in c1 c2 x out cpu clock oscillation frequency 1 ? 8 mhz external clock x in x out s3c80f9 external clock open pin x in input frequency 1 ? 8 mhz table 14-8. oscillation stabilization time (t a = ? 40 c + 85 c, v dd = 4.5 v to 5.0 v) oscillator test condition min typ max unit main crystal f osc > 400 khz ? ? 20 ms main ceramic oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range. ? ? 10 ms external clock (main system) x in input high and low width (t xh , t xl ) 25 ? 500 ns oscillator stabilization wait time t wait when released by a reset (1) ? 2 16 /f osc ? ms t wait when released by an interrupt (2) ? ? ? ms notes : 1. f osc is the oscillator frequency. 2. the duration of the oscillation stabilization time (t wait ) when it is released by an interrupt is determined by the setting in the basic timer control register, btcon.
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 14- 9 instruction clock 100 khz fosc (main oscillator frequency) 1 2 3 4 5 supply voltage (v) instruction clock = 1/6n x oscillator frequency (n = 1, 2, 8, or 16) a: 2.0 v, 8 mhz 250 khz 500 khz 1.0 mhz 1.25 mhz 2 mhz a 8 mhz 6 mhz 4 mhz 400 khz 6 7 figure 14-6. operating voltage range of s3c80f9
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 15- 1 15 electrical data 2 ( s3c80g7/c80g9) overview in this section, s3c80g7/c80g9 electrical characteristics are presented in tables and graphs. the information is arranged in the following order: ? absolute maximum ratings ? d.c. electrical characteristics ? d ata retention supply voltage in stop mode ? stop mode release timing when initiated by an external interrupt ? stop mode release timing when initiated by a reset ? i/o capacitance ? a.c. electrical characteristics ? input timing for external interrupts ? input timing for reset ? oscillation characteristics ? oscillation stabilization time
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 15- 2 table 15-1. absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v in ? ? 0.3 to v dd + 0.3 v output voltage v o all output pins ? 0.3 to v dd + 0.3 v output current high i oh one i/o pin active ? 18 ma all i/o pins active ? 60 output current low i ol one i/o pin active + 30 ma total pin current for ports 0, 1, and 2 + 100 total pin current for port 3 + 40 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c table 15-2. d.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.0 v) parameter symbol conditions min typ max unit operating voltage v dd f osc = 4 mhz (instruction clock = 1 mhz) 1.7 ? 5.0 v input high voltage v ih1 all input pins except v ih2 and v ih3 0.8 v dd ? v dd v v ih2 reset 0.85 v dd v dd v ih3 xin v dd ? 0.3 v dd input low voltage v il1 all input pins except v il2 and v il3 0 ? 0.2 v dd v v il2 reset 0.2 v dd v il3 xin 0.3 output high voltage v oh1 v dd = 2.4 v i oh = ? 6 ma port 3.1 only, ta = 25 c v dd ? 0.7 v v oh2 v dd = 2.4 v, i oh = ? 2.2ma p3.0, p2.0?2.3 t a = 25 c v dd ? 0.7
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 15- 3 table 15-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.0 v) parameter symbol conditions min typ max unit output high voltage v oh3 v dd = 2.4 v,i oh = ? 1 ma port0, port1, p2.4?2.7 and port4 t a = 25 c v dd ? 1.0 ? ? v output low voltage v ol1 v dd = 2.4 v, i ol = 12 ma, port 3.1 only, t a = 25 c ? 0.4 0.5 v v ol2 v dd = 2.4 v, i ol = 5 ma p3.0, p3.4?3.5, p2.0?2.3 t a = 25 c 0.4 0.5 v ol3 i ol = 2ma port 0, port1, p2.4?2.7 and port4 t a = 25 c 0.4 1 input high leakage current i lih1 v in = v dd all input pins except x in and x out ? ? 1 a i lih2 v in = v dd , x in and x out 20 input low leakage current i lil1 v in = 0 v all input pins except x in , x out , and reset ? ? ? 1 a i lil2 v in = 0 v x in and x out ? 20 output high leakage current i loh v out = v dd all output pins ? ? 1 a output low leakage current i lol v out = 0 v all output pins ? ? ? 1 a pull-up resistors r l1 v in = 0 v, v dd = 2.4 v t a = 25 c, ports 0?2, p3.2?3.3 44 55 95 k w
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 15- 4 table 15-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.0 v) parameter symbol conditions min typ max unit supply current (note) i dd1 operating mode v dd = 5.0 v 4 mhz crystal ? 4.5 9 ma i dd2 idle mode v dd = 5.0 v 4 mhz crystal 1.6 3.0 i dd3 stop mode; v dd = 5.0 v ? 1 6 ua note : supply current does not include current drawn through internal pull-up resistors or external output current loads. table 15-3. characteristics of low voltage detect circuit (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit hysteresys voltage of lvd (slew rate of lvd) d v ? ? 100 300 mv low level detect voltage v lvd ? 1.70 1.90 2.10 v table 15-4. data retention supply voltage in stop mode (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit data retention supply voltage v dddr ? 1.0 ? 5.0 v data retention supply current i dddr v dddr = 1.0 v stop mode ? ? 1 a
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 15- 5 execution of stop instrction ~ ~ v dddr ~ ~ stop mode idle mode (basic timer active) data retention mode t wait ext int v dd normal operating mode 0.2v dd 0.8v dd figure 15-1. stop mode release timing when initiated by an external interrupt v dd ~ ~ normal operating mode ~ ~ stop mode oscillation stabilization time t wait reset occur execution of stop instrction reset note : t wait is the same as 4096 x 16 x 1/f osc . figure 15-2. stop mode release timing when initiated by a reset
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 15- 6 table 15-5. input/output capacitance (t a = ? 40 c to + 85 c , v dd = 0 v) parameter symbol conditions min typ max unit input capacitance c in f = 1 mhz; unmeasured pins are connected to v ss ? ? 10 pf output capacitance c out i/o capacitance c io table 15-6. a.c. electrical characteristics (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit interrupt input, high, low width t inth , t intl p0.0?p0.7, p2.3?p2.0 v dd = 5.0 v 200 300 ? ns reset input low width t rsl input v dd = 5.0 v 1000 ? ?
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 15- 7 t inth t intl 0.8 v dd 0.2 v dd note : the unit t cpu means one cpu clock period. figure 15-3. input timing for external interrupts (port 0, p2.3?p2.0) normal operating mode oscillation stabilization time reset occur v dd note : t wait is the same as 4096 x 16 x 1/f osc . reset t wait normal operating mode back-up mode (stop mode) figure 15-4. input timing for reset
electrical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 15- 8 table 15-7. oscillation characteristics (t a = ? 40 c + 85 c) oscillator clock circuit conditions min typ max unit crystal x in c1 c2 x out cpu clock oscillation frequency 1 ? 4 mhz ceramic x in c1 c2 x out cpu clock oscillation frequency 1 ? 4 mhz external clock x in x out s3c80g9 external clock open pin x in input frequency 1 ? 4 mhz table 15-8. oscillation stabilization time (t a = ? 40 c + 85 c, v dd = 4.5 v to 5.0 v) oscillator test condition min typ max unit main crystal f osc > 400 khz ? ? 20 ms main ceramic oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range. ? ? 10 ms external clock (main system) x in input high and low width (t xh , t xl ) 25 ? 500 ns oscillator stabilization wait time t wait when released by a reset (1) ? 2 16 /f osc ? ms t wait when released by an interrupt (2) ? ? ? ms notes : 1. f osc is the oscillator frequency. 2. the duration of the oscillation stabilization time (t wait ) when it is released by an interrupt is determined by the setting in the basic timer control register, btcon.
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) electrical data 15- 9 instruction clock 100 khz fosc (main oscillator frequency) 1 2 3 4 5 supply voltage (v) instruction clock = 1/6n x oscillator frequency (n = 1, 2, 8, or 16) a: 1.7 v, 4 mhz 250 khz 500 khz 1.0 mhz 1.25 mhz 2 mhz a 8 mhz 6 mhz 4 mhz 400 khz 6 7 figure 15-6. operating voltage range of s3c80g9
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) mechanical data 16- 1 16 mechanical data overview the s3c80f7/c80f9/c80g7/c80g9 microcontroller is currently available in a 32-pin sop, 42-pin sdip and 44- pin qfp package. 32-sop-450a 20.30 max 19.90 0 .20 #17 #16 0-8 0.25 + 0.10 - 0.05 11.43 8.34 0.20 0.90 0.20 0.05 min 2.00 0.10 2.20 max 0.10 max 1.27 note : dimensions are in millimeters. 12.00 0 .30 #32 #1 (0.43) 0.40 0.10 figure 16-1. 32-pin sop package dimension
mechanical data s3c 80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) 16- 2 note : dimensions are in millimeters. 39.50 max 39.10 0 .20 0.50 0.10 1.78 (1.77) 0.51 min 3.30 0.30 3.50 0.20 5.08 max 42-sdip-600 0-15 1.00 0.10 0.25 + 0.10 - 0.05 15.24 14.00 0 .20 #42 #22 #21 #1 figure 16-2. 42-pin sdip package dimension
s3c80f7/c80f9/c80g7/c80g9 (ks88c01524/c01532/c01624/c01632) mechanical data 16- 3 44-qfp-1010b #44 note : dimensions are in millimeters. 10.00 0.20 13.20 0.30 10.00 0.20 13.20 0.30 #1 0.35 + 0.10 - 0.05 0.80 0.10 max 0.80 0.20 0.05 min 2.05 0.10 2.30 max 0.15 + 0.10 - 0.05 0-8 0.15 max (1.00) figure 16-3. 44-pin sqfp package dimension

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