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dual, 300 ma output, low noise, high psrr voltage regulator s data sheet adp222 / adp223 / adp224 / adp225 rev. b information furnished by analog devices is believed to be accurate and reliable . however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2011 analog devices, inc. all rights reserved. features input voltage range: 2.5 v to 5.5 v small, 8 - lead, 2 mm 2 mm lfcsp package initial accuracy: 1% high psrr: 70 db at 10 khz, 60 db at 100 khz, 40 db at 1 mhz low noise: 27 v rms at v out = 1.2 v, 50 v rms at v out = 2.8 v excellent transient response low dropout voltage: 170 mv at 300 ma load 65 a typical ground current at no load, both ldos enabled fixed output voltage from 0.8 v to 3.3 v ( adp222 / adp22 4 ) adjustable output voltage range from 0.5 v to 5.0 v ( adp22 3 / adp22 5 ) quick output discharge (qod) adp224 / adp225 overcurrent and thermal protection applications portable and battery - powered equipment portable medical devices post dc - to - dc regulation point of sale terminals credit card readers automatic meter readers wireless network equipment typical application circuit s en1 vout1 vin en2 gnd 6 4 3 2 adj2 vout2 1 8 5 7 adj1 adp223/ adp225 r1 r4 r2 on off on off v in = 4.2v + c1 1 f + c3 1f + c2 1f vout1 = 2.8v vout2 = 2.0v 09376-001 r3 figure 1. adp223 / adp225 en1 vout1 vin en2 gnd 6 4 3 2 sense2 vout2 1 8 5 7 sense1 adp222/ adp224 on off on off v in = 4.2v + c1 1f + c3 1f + c2 1f vout2 = 3.3v vout1 = 1.5v 09376-101 figure 2. adp222 / adp224 general description the 300 ma , adjustable dual output adp223 / adp225 and fixed dual output adp222 / adp224 combine high psrr, low noise, low quiescent current, and low dropout voltage in a voltage regulator that is ideally suited for wireless applic ations with demanding performance and board space requirements. the adp222 / adp224 are available with fixed outputs voltages from 0.8v to 3.3v. the adjustable output adp223 / adp225 may be set to output voltages from 0.5 v to 5.0 v. the low quiescent current, low dropout voltage , and wide input voltage range of the adp222 / adp223 / adp224 / adp225 extend the battery life of portable devices. the adp222 / adp223 / adp224 / adp225 maintain power supply rejection greater than 60 db fo r frequencies as high as 100 k hz while operating with a low headroom voltage. the adp222 / adp223 / adp224 / adp225 offer much lower noise performance than competing ldos without the need for a noise bypass capacitor. overcurrent and thermal protection circuitry prevent damage in adverse conditions. the adp224 and adp225 are identical to the adp222 and adp223 , respectively , but with the addition of a qu ick output discharge (qod) feature. the adp222 / adp223 / adp224 / adp225 are available in a small 8 - lead , 2 mm 2 mm lfcsp package and are stable with tiny 1 f , 30% ceramic output capacitors, resulting in the smallest possible board area for a wide variety of portable power needs.
adp222/adp223/adp224/adp225 data sheet rev. b | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 typical application circuits ............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 input and output capacitor, recommended specifications .. 4 absolute maximum ratings ............................................................ 5 thermal data ................................................................................ 5 thermal resistance ...................................................................... 5 esd caution .................................................................................. 5 pin configuration and function descriptio ns ............................. 6 typical performance characteristics ..............................................7 theory of operation ...................................................................... 17 applications information .............................................................. 18 capacitor selection .................................................................... 18 enable feature ............................................................................ 19 paralleling outputs to increase output current .................... 19 quick output discharge (qod) function ............................ 19 current limit and thermal over load protection ................. 20 thermal considerations ............................................................ 20 printed circuit board layout considerations ........................ 22 outline dimensions ....................................................................... 23 ordering guide .......................................................................... 23 revision history 8/11 rev. a to rev. b changes to features and general descriptions secti ons ............ 1 added figure 64; renumbered sequentially .............................. 17 changes to theory of operation section .................................... 17 changes to output capacitor section ......................................... 18 changes to paralleling outputs to increase output current section ............................................................................... 19 updated outline dimensions ....................................................... 23 7 /11 rev . 0 to rev. a a dded a dp222, adp224, and adp225 ......................... universal changes to features section, applications section, general description section, and figure 2 .................................... 1 changes to table 1 ............................................................................. 3 added figure 4; renumbered sequentially ................................... 6 change s to table 5 ............................................................................. 6 changes to typical performance cha racteristics section ........... 7 changes to theory of operation section and figure 62 .......... 17 added figure 63 ............................................................................. 17 added quick output discharge (qod) function section added figure 70 ............................................................................. 20 2 / 1 1 rev ision 0: initial version
data sheet adp222/adp223/adp224/adp225 rev. b | page 3 of 24 specifications v in = (v out + 0.5 v) or 2.5 v (whiche ver is greater), en1 = en2 = v in , i out1 = i out2 = 10 ma, c in = c out1 = c out2 = 1 f, t a = 25c, unless otherwise noted. table 1 . parameter symbol test conditions /comments min typ max unit input voltage range v in t j = ?40c to +12 5c 2.5 5.5 v operating supply current with both regulators on i gnd i out = 0 a 65 a i out = 0 a, t j = ? 40c to +125c 150 a i out = 10 ma 100 a i out = 10 ma, t j = ?40c to +125c 200 a i out = 300 ma 300 a i out = 300 ma, t j = ?40c to +125c 450 a shutdown current i gnd - sd en1 = en2 = gnd 0.2 2 a output voltage accuracy 1 v out t j = ?40c to +125c i out = 10 ma ? 1 + 1 % 0 a < i out < 300 ma, v in = (v out + 0.5 v) to 5.5 v ? 2 + 2 % adjustable - output voltage accura cy 1 v adj t j = ?40c to +125c i out = 10 ma 0.495 0.500 0.505 v 0 a < i out < 300 ma, v in = (v out + 0.5 v) to 5.5 v 0.490 0.510 v line regulation v out / v in v in = (v out + 0.5 v) to 5.5 v 0.01 %/v v in = (v out + 0.5 v) to 5.5 v, t j = ?40c to +125c ? 0.05 +0.05 %/v load regulation 2 v out / i out i out = 1 ma to 300 ma 0.001 %/ma i out = 1 ma to 300 ma, t j = ?40c to +125c 0.002 %/ma dropout voltage 3 v dropout v out = 3.3 v i out = 10 ma 6 mv i out = 10 ma, t j = ?40c to +125c 9 mv i out = 300 ma 170 mv i out = 300 ma, t j = ?40c to +125c a 260 mv sense input bias current sense i- bias 2.5 v v in 5.5 v, sensex connected to voutx 10 na adj x input bias current adj i- bias 2.5 v v in 5.5 v, adj x connected to vout x 10 na start - up time 4 t start - up v out = 3.3 v 240 s v out = 0.8 v 100 s current - limit threshold 5 i limit 340 400 ma thermal shutdown thermal shutdown threshold ts sd t j rising 155 c thermal shutdown hysteresis ts sd - hys 15 c en input en input logic high v ih 2.5 v v in 5.5 v 1.2 v en input logic low v il 2.5 v v in 5.5 v 0.4 v en input leakage current v i- leakage en1 = en2 = v in or gnd 0.1 a en1 = en2 = v in or gnd, t j = ?40c to +125c 1 a undervoltage lockout uvlo input voltage rising uvlo rise 2.45 v input voltage falling uvlo fal l 2.2 v hysteresis uvlo hys 120 mv output discharge time t dis v out = 2.8 v 1000 s output discharge resistance r qod 140
adp222/adp223/adp224/adp225 data sheet rev. b | page 4 of 24 parameter symbol test conditions /comments min typ max unit output noise out noise 10 hz to 100 khz, v in = 5 v, v out = 3.3 v 56 v rms 10 hz to 100 khz, v in = 5 v, v out = 2.8 v 50 v rms 10 hz to 100 khz, v in = 3.6 v, v out = 2.5 v 45 v rms 10 hz to 100 khz, v in = 3.6 v, v out = 1.2 v 27 v rms power supply rejection ratio psrr v in = 2.5 v, v out = 0.8 v, i out = 100 ma 100 hz 76 db 1 k hz 76 db 10 k hz 70 db 100 k hz 60 db 1 mhz 40 db v in = 3.8 v, v out = 2.8 v, i out = 100 ma 100 hz 68 db 1 k hz 68 db 10 k hz 68 db 100 k hz 60 db 1 mhz 40 db 1 accuracy when voutx is connected directly to adjx or sensex . when the voutx voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 based on an end - po int calculation using 1 ma and 3 00 ma loads . 3 dropout voltage is defined as the input - to - output voltage differential when the input voltage is set to the nom inal output voltage. this applies only for output voltages above 2.5 v. 4 start - up time is defined as the time between the rising edge of en to v out being at 90 % of its nominal value. 5 current - limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. for example, the current limit for a 3 . 0 v output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 v or 2.7 v. input and output cap acitor, recommended specifications t he minimum input and output capacitance should be greater than 0.70 f over the full range of the operating conditions. the full range of th e operating conditions in the application must be considered during device selection to ensure that the minimum capacitance spe cification is met. x7r and x5r type capacitors are recommended for use with the ldos , but y5v and z5u capacitors are not recommen ded for use with the ldos. table 2 . parameter symbol conditions min typ max unit minimum input and output capacitance c min t a = ?40c to +125c 0.70 f capacitor esr r esr t a = ?40c to +125c 0.001 1
data sheet adp222/adp223/adp224/adp225 rev. b | page 5 of 24 absolute maximum rat ings table 3 . parameter rating vin to gnd ? 0.3 v to +6 v adj1, adj2, vout1, vout2 to gnd ? 0.3 v to vin en1, en2 to gnd ? 0.3 v to +6 v storage temperature range ? 65 c to +150c operating junction temperature range ? 40c to +125c soldering conditions jedec j - std -020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal data absolute maximum ratings apply individually only, not in combination. the adp222 / adp223 / adp224 / adp225 can be damaged when the junction temperature limits are exceeded. monitoring ambient temperature does not guarantee that t j is within the specified temperature limits. in applications with hi gh power dissipation and poor thermal resistance , the maximum ambient temperature may have to be derated. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long a s the junction temperature is within specification limits. the junction temperature (t j ) of the device is dependent on the ambient temperature (t a ), the power dissipation of the device (p d ) , and the junction - to - ambient thermal resistance of the package ( j a ). maximum junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) using the formula t j = t a + ( p d ja ) junction - to - ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4 - layer board. ja is highly dependent on the application and board layout. in applications where high maximum power dissipation exists, close attention to thermal board design is required. the value of ja may vary, depending on pcb material, la yout, and environmen tal conditions. the s pecified value of ja is based on a 4 - layer, 4 in 3 in, 2 ? oz copper board, as per jedec standards. for more information, see the an - 772 application note , a design and manufacturing guide for the lead frame chip scale package (lfcsp) . jb is the junction - to - board thermal characterization parameter with units of c / w. jb of the package is based on modeling and calculation using a 4 - layer board. the jesd51 - 12, guidelines for reporting and using package thermal information , states that thermal characterization parameters are not the same as thermal resistances. jb measures the component power flowing through multiple thermal paths rather than a single path as in thermal r esistance, jb . therefore, jb thermal paths include convection from the top of the package as well as radiation from the package, factors that make jb more useful in real - world applications. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the formula t j = t b + ( p d jb ) refer to jesd51 - 8 and jesd51 - 12 for more detailed information about jb . thermal resistance ja and jb are specified for the worst - case conditions, that is, a device solde red in a circuit board for surface - mount packages. table 4 . thermal resistance package type ja jc jb unit 8 - lead 2 mm 2 mm lfcsp 50.2 31.7 18.2 c/w esd caution
adp222/adp223/adp224/adp225 data sheet rev. b | page 6 of 24 pin configuration an d function descripti ons en1 vout1 vin en2 gnd 6 4 3 2 sense2 vout2 1 8 5 7 sense1 notes 1. connect exposed p ad t o gnd. 09376-102 adp222/ adp224 figu re 3. adp222 / adp224 pin configuration en1 vout1 vin en2 adp223/ adp225 gnd 6 4 3 2 adj2 vout2 1 8 5 7 adj1 notes 1. connect exposed p ad t o gnd. 09376-002 figure 4. adp223 / adp225 pin configuration table 5 . pin function descriptions pin no. adp222 / adp224 adp223 / adp225 mnemonic description 1 1 en1 enable input for the second regulator. drive en1 high to turn on regulator 1 and drive en1 low to turn off regulator 1. for automatic s tartup, connect en1 to vin. 2 2 en2 enable input for the first regulator. drive en2 high to turn on r egulator 2 and drive en2 low to turn off regulator 2. for automatic startup, connect en2 to vin. 3 3 gnd ground pin. n/a 1 4 adj2 adjust pin for vout2. a resistor divider from vout2 to adj 2 sets the output voltage. 4 n/a 1 sense2 sense pin for vout2 . 5 5 vout2 regulated output voltage. connect an 1 f or greater output capacitor between vout2 and gnd. 6 6 vin regulator input supply. bypass vin to gnd with a 1 f or greater capacitor. 7 7 vout1 regulated output voltage. connect 1 f or greater output capacitor between vout1 and gnd. n/a 1 8 adj1 adjust pin for vout 1. a resistor divider from vout1 to adj 1 sets the output voltage. 8 n/a 1 sense1 sense pin for vout1 . epad the exposed paddle must be connected to ground. 1 n/a means not applicable.
data sheet adp222/adp223/adp224/adp225 rev. b | page 7 of 24 typical performance characteristics v in = 5 v, v out1 = 3.3 v, v out2 = 2.8 v, i out1 = i out2 = 1 ma, c in = c out = 1 f, t a = 25c, unless otherwise noted. 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 ?40 ?5 25 85 125 v out (v) junction temper a ture (c) load = 100 a load = 1m a load = 10m a load = 50m a load = 100m a load = 300m a 09376-105 figure 5 . output voltage vs. junction temperature, v out x = 3.3 v, adp222 / adp224 2.75 2.76 2.77 2.78 2.79 2.80 2.81 2.82 2.83 2.84 2.85 ?40 ?5 25 85 125 v out (v) junction temper a ture (c) 09376-106 load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a figure 6 . output voltage vs. junction temperature, v outx = 2.8 v, adp222 / adp224 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 ?40 ?5 25 85 125 v out (v) junction temper a ture (c) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376-107 figure 7 . output voltage vs. junction temperature, v outx = 1.8 v, adp222 / adp224 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 ?40 ?5 25 85 125 junction temper a ture (c) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376-108 v out (v) figure 8 . output voltage vs. j unction temperature, v outx = 1.2 v, adp222 / adp224 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 0.01 0.1 1 10 100 1000 v out (v) i load (ma) 09376-109 figure 9 . output voltage vs. load current, v outx = 3.3 v, adp222 / adp224 2.75 2.76 2.77 2.78 2.79 2.80 2.81 2.82 2.83 2.84 2.85 0.01 0.1 1 10 100 1000 i load (ma) 09376- 1 10 v out (v) figure 10 . output voltage vs. load current, v outx = 2.8 v, adp222 / adp224
adp222/adp223/adp224/adp225 data sheet rev. b | page 8 of 24 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 0.01 0.1 1 10 100 1000 i load (ma) 09376- 11 1 v out (v) figure 11 . output voltage vs. load current, v outx = 1.8 v, adp222 / adp224 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 0.01 0.1 1 10 100 1000 i load (ma) 09376- 1 12 v out (v) figure 12 . outpu t voltage vs. load current, v outx = 1.2 v, adp222 / adp224 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 v out (v) v in (v) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376- 1 13 figure 13 . output voltage vs. input voltage, v outx = 3.3 v, adp222 / adp224 2.75 2.76 2.77 2.78 2.79 2.80 2.81 2.82 2.83 2.84 2.85 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 v out (v) v in (v) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376- 1 14 figure 14 . output voltage vs. input voltage, v outx = 2.8 v, adp222 / adp224 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 2.30 2.70 3.10 3.50 3.90 4.30 4.70 5.10 5.50 v out (v) v in (v) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376- 1 15 figure 15 . output voltage vs. input voltage, v outx = 1.8 v, adp222 / adp224 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 2.30 2.70 3.10 3.50 3.90 4.30 4.70 5.10 5.50 v out (v) v in (v) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376- 1 16 figure 16 . output voltage vs. input voltage, v outx = 1.2 v, adp222 / adp224
data sheet adp222/adp223/adp224/adp225 rev. b | page 9 of 24 0 20 40 60 80 100 120 140 ?40 ?5 25 85 125 ground current (a) junction temper a ture (c) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376- 1 17 figure 17 . ground current vs. junction temperature, single output, adp222 / adp224 0 50 100 150 200 250 300 ground current (a) ?40 ?5 25 85 125 junction temper a ture (c) load = 100 a load = 1m a load = 10m a load = 50m a load = 100m a load = 300m a 09376- 1 18 figure 18 . ground current vs. junction temperature, dual output, adp222 / adp224 0 20 40 60 80 100 120 140 0.01 0.1 1 10 100 1000 ground current (a) i load (ma) 09376- 1 19 figure 19 . ground current vs. load current, single output, adp222 / adp224 0 50 100 150 200 250 0.01 0.1 1 10 100 1000 ground current (a) i load (ma) 09376-120 figure 20 . ground current vs. load current , dual output, adp222 / adp224 0 20 40 60 80 100 120 140 2.30 2.70 3.10 3.50 3.90 4.30 4.70 5.10 5.50 ground current (a) v in (v) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376-121 figure 21 . ground current vs. input voltage, v outx = 1.2 v, adp222 / adp224 2.30 2.70 3.10 3.50 3.90 4.30 4.70 5.10 5.50 ground current (a) v in (v) load = 10 a load = 100 a load = 1m a load = 10m a load = 100m a load = 300m a 09376-122 0 50 100 150 200 250 figure 22 . ground current vs. input voltage, v outx = 1.2 v and 1.8 v, adp222 / adp224
adp222/adp223/adp224/adp225 data sheet rev. b | page 10 of 24 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 ?40 ?5 25 85 125 v out (v) junction temperature (c) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-003 figure 23 . output voltage vs. junction temperature, v outx = 3.3 v , adp223 / adp225 2.75 2.76 2.77 2.78 2.79 2.80 2.81 2.82 2.83 2.84 2.85 ?40 ?5 25 85 125 v out (v) junction temperature (c) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-004 figure 24 . output voltage vs. junction temperature, v outx = 2.8 v , adp223 / adp225 ?40 ?5 25 85 125 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 v out (v) junction temperature (c) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-005 figure 25 . output voltage vs. junction temperature, v outx = 1.8 v , adp223 / adp225 ?40 ?5 25 85 125 junction temperature (c) 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 v out (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-006 figure 26 . output voltage vs. junction temperature, v outx = 1.2 v , adp223 / adp225 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 0.1 1 10 100 1000 v out (v) i load (ma) 09376-007 figure 27 . output voltage vs. load current, v outx = 3.3 v , adp223 / adp225 2.75 2.76 2.77 2.78 2.79 2.80 2.81 2.82 2.83 2.84 2.85 0.01 0.1 1 10 100 1000 v out (v) i load (ma) 09376-008 figure 28 . output voltage vs. load current, v outx = 2.8 v , adp223 / adp225
data sheet adp222/adp223/adp224/adp225 rev. b | page 11 of 24 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 0.1 1 10 100 1000 v out (v) i load (ma) 09376-009 figure 29 . output voltage vs. load current, v outx = 1.8 v , adp223 / adp225 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 0.1 1 10 100 1000 v out (v) i load (ma) 09376-010 figure 30 . output voltage vs. load current, v out x = 1.2 v , adp223 / adp225 3.70 3.90 4.10 4.30 4.70 4.90 5.10 5.30 5.50 v in (v) 3.20 3.26 3.24 3.22 3.28 3.30 3.32 3.34 3.36 3.38 3.40 v out (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-0 1 1 figure 31 . output voltage vs. input voltage, v outx = 3.3 v , adp22 3/ adp225 3.50 3.70 3.90 4.10 4.30 4.70 4.90 5.10 5.30 5.50 v in (v) 2.75 2.78 2.77 2.76 2.79 2.80 2.81 2.82 2.83 2.84 2.85 v out (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 200ma load = 300ma 09376-012 figure 32 . output voltage vs. input voltage, v outx = 2.8 v , adp223 / adp225 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 2.30 2.70 3.10 3.50 3.90 4.30 4.70 5.10 5.50 v out (v) v in (v) 09376-013 load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma f igure 33 . output voltage vs. input voltage, v outx = 1.8 v , adp223 / adp225 2.30 2.70 3.10 3.50 3.90 4.30 4.70 5.10 5.50 v in (v) 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 v out (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-014 figure 34 . output voltage vs. input v oltage, v outx = 1.2 v , adp223 / adp225
adp222/adp223/adp224/adp225 data sheet rev. b | page 12 of 24 ?40 ?5 25 85 125 junction temperature (c) 0 50 100 150 200 250 300 ground current (ua) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-015 figure 35 . ground current vs. junction temperature, single output, includes 100 a for output div ider , adp223 / adp225 0 50 100 150 200 250 300 350 400 450 500 ground current ( a) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma ?40 ?5 25 85 125 junction temperature (c) 09376-016 figure 36 . ground current vs. junction temperature, dual output, includes 200 a for output dividers , adp223 / adp225 0 50 100 150 200 250 0.01 0.1 1 10 100 1000 ground current ( a) i load (ma) 09376-017 figure 37 . ground current vs. load current, single output, includes 100 a for output divider , adp223 / adp225 0 100 200 300 400 500 50 150 250 350 450 0.01 0.1 1 10 100 1000 ground current ( a) i load (ma) 09376-018 figure 38 . ground current vs. load current, dual output, includes 200 a for output dividers , adp223 / adp225 0 50 100 150 200 250 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 ground current ( a) v in (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-019 figure 39 . ground current vs. input v oltage, v outx = 1.2 v, single output, includes 100 a for output divider , adp223 / adp225 0 50 100 150 200 250 300 350 400 450 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 ground current ( a) v in (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 200ma load = 300ma 09376-020 figure 40 . ground current vs. input voltage, v outx = 1.2 v and 1.8 v, dual output, includes 200 a for output dividers , adp223 / adp225
data sheet adp222/adp223/adp224/adp225 rev. b | page 13 of 24 0 20 40 60 80 100 120 140 1 10 100 1000 dropout vo lt age (mv) i load (ma) 09376-021 figure 41 . dropout v oltage vs. load current, v out = 3.3 v 0 20 40 60 80 100 120 140 160 1 10 100 1000 dropout vo lt age (mv) i load (ma) 09376-022 figure 42 . dropout v oltage vs. load current, v out = 2.8 v 2.90 2.95 3.00 3.05 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.1 3.2 3.3 3.4 3.5 3.6 v out (v) v in (v) load = 1ma load = 5ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-023 figure 43 . output volt age vs . input voltage in dropout, v outx = 3.3 v 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 2.80 2.85 2.90 2.6 2.7 2.8 2.9 3.0 3.1 v out (v) v in (v) 09376-024 load = 1ma load = 5ma load = 10ma load = 50ma load = 100ma load = 300ma figure 44 . output voltage vs . input voltage in dropout, v outx = 2.8 v 0 50 100 150 200 250 300 350 400 450 3.1 3.2 3.3 3.4 3.5 3.6 ground current ( a) v in (v) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-025 figure 45 . ground current vs. input voltage in dropout, v outx = 3.3 v v in (v) 0 50 100 150 200 250 300 350 400 2.6 2.7 2.8 2.9 3.0 3.1 ground current (ua) load = 100 a load = 1ma load = 10ma load = 50ma load = 100ma load = 300ma 09376-026 figure 46 . ground current vs. input voltag e in dropout, v outx = 2.8 v
adp222/adp223/adp224/adp225 data sheet rev. b | page 14 of 24 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) v ripple = 50mv v in = 4.3v v out = 3.3v c out = 1f load = 100 a load = 1ma load = 10ma load = 100ma load = 300ma 09376-027 figure 47 . power supply rejection ratio vs. frequency, v in = 4.3, v v outx = 3.3 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) load = 100 a load = 1ma load = 10ma load = 100ma load = 300ma v ripple = 50mv v in = 3.8v v out = 2.8v c out = 1 f 09376-028 figure 48 . power supply re jection ratio vs. frequency, v in = 3.8 v, v outx = 2.8 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) load = 1ma load = 10ma load = 100ma load = 300ma v ripple = 50mv v in = 2.8v v out = 1.8v c out = 1 f 09376-029 figure 49 . power supply rejection ratio vs. frequency, v in = 2.8 v, v outx = 1.8 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) load = 1ma load = 10ma load = 100ma load = 300ma v ripple = 50mv v in = 2.5v v out = 1.2v c out = 1 f 09376-030 figure 50 . power supply rejection ratio vs. frequency, v i n = 2. 5 v, v outx = 1.2 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) load = 1ma load = 10ma load = 100ma load = 300ma v ripple = 50mv v in = 3.8v v out = 3.3v c out = 1 f 09376-031 figure 51 . power supply rejection ratio vs. frequency, v in = 3.8 v, v outx = 3.3 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) load = 1ma load = 10ma load = 100ma load = 300ma v ripple = 50mv v in = 3.3v v out = 2.8v c out = 1 f 09376-032 figure 52 . power supply rejection ratio vs. frequency, v in = 3.3 v, v outx = 2.8 v
data sheet adp222/adp223/adp224/adp225 rev. b | page 15 of 24 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) v ripple = 50mv v in = 2.5v v out = 1.8v c out = 1 f 09376-033 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 load = 1ma load = 10ma load = 100ma load = 300ma fi gure 53 . power supply rejection ratio vs. frequency, v in = 2. 5 v, v outx = 1.8 v ch2 10mv ch1 1v ch3 10mv b w b w m1s a ch4 200mv 1 3 2 t 10.40% b w v in v out2 v out1 09376-034 figure 54 . transient line response, v outx = 3.3 v and 2.8 v, v in = 4 v to 5 v, i load = 10 ma ch2 10mv ch1 1v ch3 10mv b w b w m4s a ch4 200mv 1 3 2 t 9.8% b w 09376-035 v in v out2 v out1 figure 55 . transient line response, v outx = 1.2 v and 1.8 v, v in = 4 v to 5 v, i load = 10 ma ch2 10mv ch1 1v ch3 10mv b w b w m1s a ch4 200mv 1 3 2 t 9.8% b w 09376-036 v in v out2 v out1 figure 56 . transient line response, v outx = 3.3 v and 2.8 v, v in = 4 v to 5 v, i load = 300 ma ch2 10mv ch1 1v ch3 10mv b w b w m1s a ch4 200mv 1 3 2 t 10.00% b w 09376-037 v in v out2 v out1 figure 57 . transient line response, v outx = 1.2 v and 1.8 v, v in = 4 v to 5 v, i load = 300 ma ch2 50mv ch1 200m a ? ch3 10mv b w b w m10 s a ch1 200m a 1 3 2 t 10.20% b w 09376-038 v out2 v out1 load current on v out1 figure 58 . transient load response, v outx = 3.3 v, i load = 1 ma to 300 ma ; v outx = 2.8 v, i load = 1 ma
adp222/adp223/adp224/adp225 data sheet rev. b | page 16 of 24 ch2 50mv ch1 200m a ? ch3 10.0mv b w b w m10 s a ch1 200m a 1 3 2 t 10.20% b w 09376-039 load current on v out1 v out2 v out1 figure 59 . transient load response, v outx = 1.2 v, i load = 1 ma to 300 ma ; v outx = 1.8 v, i load = 1 ma 0 10 20 30 40 50 60 70 0.001 0.01 0.1 1 10 100 1000 noise (v rms) i load (ma) 1.2v 1.8v 2.8v 3.3v 09376-040 figure 60 . rms output noise vs. load current and output voltage, v in = 5 v, c out = 1 f 0.01 0.1 1 10 10 100 1k 10k 100k noise spectral density (v/hz) frequenc y (hz) 1.2v 1.8v 2.8v 3.3v 09376-041 figure 61 . outp ut noise spectral density, v in = 5 v, i load = 10 ma, c out = 1 f
data sheet adp222/adp223/adp224/adp225 rev. b | page 17 of 24 theory of operation the adp222 / adp223 / adp224 / adp225 are low quiescent current, fixed and adjustable dual output, low dropout linear regulators that operate from 2.5 v to 5.5 v and provide up to 300 ma of current from each output. drawing a low 300 a quiescent current (typical) at full load make the adp222 / adp223 / adp224 / adp225 ideal for battery-operated portable equipment. shutdown current consumption is typically 200 na. optimized for use with small 1 f ceramic capacitors, the adp222 / adp223 / adp224 / adp225 provide excellent transient performance. thermal shutdown en1 en2 g nd current limit current limit reference adp225 only control logic and enable vin vout1 140 ? vout2 adp223/adp225 adj1 adj2 09376-062 140 ? figure 62. internal block diagram, adp223 / adp225 thermal shutdown en1 en2 gnd current limit current limit reference adp224 only control logic and enable vin vout1 140? vout2 adp222/adp224 sense1 sense2 09376-063 140? figure 63. internal block diagram, adp222 / adp224 internally, the adp222 / adp223 / adp224 / adp225 consist of a reference, two error amplifiers, and two pmos pass transistors. output current is delivered via the pmos pass device, which is controlled by the error amplifier. the error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the pmos device is pulled lower, allowing more current to flow and increasing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing less current to flow and decreasing the output voltage. en1 vout1 vin en2 gnd 6 4 3 2 adj2 vout2 1 8 5 7 adj1 adp223/ adp225 r1 r4 r2 on off on off v in = 4.2v + c1 1f + c3 1f + c2 1f vout1 = 2.8v vout2 = 2.0v r3 09376-064 figure 64. typical application circuit for setting output voltages, adp223 / adp225 the adp223 / adp225 are exactly the same as the adp222 / adp224 except that the output voltage dividers are internally disconnected and the feedback input of the error amplifiers is brought out for each output. the output voltages can be set according to the following equations: v out1 = 0.50 v(1 + r1 / r2 ) v out2 = 0.50 v(1 + r3 / r4 ) the value of r1 and r3 should be less than 200 k to minimize errors in the output voltage caused by the adjx pin input current. for example, when r1 and r2 each equal 200 k, the output voltage is 1.0 v. the output voltage error introduced by the adjx pin input current is 2 mv or 0.20%, assuming a typical adjx pin input current of 10 na at 25c. the output voltage of the adp223 / adp225 may be set from 0.5 v to 5.0 v. the adp222 / adp224 are available in multiple output voltage options ranging from 0.8 v to 3.3 v. the adp224 / adp225 are identical to the adp222 / adp223 with the addition of a quick output discharge (qod) feature. this allows the output voltage to start up from a known state. the adp222 / adp223 / adp224 / adp225 use the en1/en2 pins to enable and disable the vout1/vout2 pins under normal operating conditions. when en1/en2 are high, vout1/vout2 turn on; when en1/en2 are low, vout1/vout2 turn off. for automatic startup, en1/en2 can be tied to vin.
adp222/adp223/adp224/adp225 data sheet rev. b | page 18 of 24 applications information capacitor selection outp ut capacitor the adp222 / adp223 / adp224 / adp225 are designed for operation with small, space - saving ceramic capacitors but function with most commonly used capacitors as long as care is taken with regard to the effective series resistance (esr) value. the esr of the output capacitor affects the stability of the ldo control loop. a minimum of 0.7 f capacitance with an esr of 1 ? or less is recommended to ensure the stability of the adp222 / adp223 / adp224 / adp225 . transient response to changes in load current is also affected by output capacitance. using a larger value of output capacitance improves the transient response of the adp222 / adp223 / adp224 / adp225 to large changes in load current. figure 65 shows the transient responses fo r an output capacitance value of 1 f. a ch1 200m a 1 m10 s t 10.20% 3 2 ch1 200m a ch3 10mv ch2 50mv b w b w ? b w 09376-043 v out2 v out1 load current on v out1 figure 65 . output transient response, c out = 1 f input bypass capacitor connecting a 1 f capacitor from vin to gnd reduces the circuit sensitivity to the printed circuit board (pcb) layout , especially when long input traces or high source impedance are encountered. if greater than 1 f of output capacitance is required, the input capacitor should be increased to match it. input and output capacitor properties any good quality ceramic capac itors can be used with the adp222 / adp223 / adp224 / adp225 , as long as they meet the minimum capacitance and maximum esr requirements. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. capacitors must have a dielectric adequate to ensure the minimu m capacitance over the necessary temperature range and dc bias conditions. x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended , but y5v and z5u dielectrics are not recommended, due to their poor temperature and dc bias characteris tics. figure 66 depicts the capacitance vs. voltage bias characteristic of an 0402, 1 f, 10 v, x5r capacitor. the voltage stability of a capacitor is strongly influenced by the capacitor size and voltage rating. in general, a capacitor in a larger package or higher voltage rating exhibits better stability. the temperature variation of the x5r dielectric is ~ 15% over the ?40c to +85 c temperature range and is not a function of package or voltage rating. 1 . 2 1 . 0 0 . 8 0 . 6 0 . 4 0 . 2 0 0 2 4 6 8 1 0 capacitance (f) v o lt a g e (v) 09376-044 figure 66 . capacitance vs. voltage bias characteristic use equation 1 to determine the worst - case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage. c eff = c bias (1 ? tempco ) (1 ? tol ) (1) where: c bias is the effective capacitance at the operating voltage. tempco is the worst - case capacitor temperature coefficient. tol is the worst - case component tolerance. in this example, the worst - case temperature coefficient (tempco) over ?40 c to +8 5 c is assumed to be 15% for an x5r dielectric . the tolerance of the capacitor (tol) is assumed to be 10%, and c bias is 0.94 f at 1.8 v, as shown in figure 66. substituting these values in equation 1 yields c eff = 0.94 f (1 ? 0.15) (1 ? 0.1) = 0.719 f therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the ldo over temperature and tolerance at the chosen output voltage. to guarantee the performance of the adp222 / adp223 / adp224 / adp225 , it is imperative that the effects of dc bias, temperature, and to lerances on the behavior of the capacitors be evaluated for each application.
data sheet adp222/adp223/adp224/adp225 rev. b | page 19 of 24 enable feature the adp222 / adp223 / ad p224 / adp225 use the enx pins to enable and disable the voutx pins under normal operating conditions. figure 67 shows a rising voltage on enx crossing the active threshold , where v outx turns on. when a falling voltage on enx crosses the inactive threshold, v outx turns off. 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 output vo lt age (v) enable vo lt age (v) v in = 5.5v 09376-045 figure 67 . typical enx pin operation, v in = 5.5 v as shown in figure 67 , the enx p ins have built - in hysteresis. this prevents on/off oscillations that can occur due to noise on the enx pins as it passes through the threshold points. the active/inactive thresholds of the enx pins are derived from the vin voltage. therefore, these thresh olds vary with changing input voltage. figure 68 shows typical enx active/inactive thresholds when the input voltage varies from 2.5 v to 5.5 v. 0 0.2 0.4 0.6 0.8 1.0 1.2 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 enable thresholds (v) v in (v) enx fall enx rise 09376-046 figure 68 . typica l enable thresholds vs. input voltage the adp222 / adp223 / adp224 / adp225 u s e an internal soft start to limit the inrush current when the output is enabled. the start - up time for the 2.8 v option is approximately 240 s from the time the enx active threshold is crossed to when the output reaches 90% of its final value. the start - up time is somewhat depen dent on the output voltage setting and increases slightly as the output voltage increases. 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 100 200 300 400 500 600 700 800 900 1000 output vo lt age (v) time ( s) enx 3.3v 2.8v 1.8v 1.2v 09376-047 figure 69 . typical start - up time paralleling outputs to increase output current the adp223 / adp225 use a single band gap to generate the reference voltage for each ldo . the reference voltages are trimmed to plus or minus a couple of millivolts of each other. this allows paralleling of the ldos to increa se the output current to 600 ma. the adjust pins of each ldo are tied together and a single output voltage divider sets the output voltage. even though the output voltage of each ldo is slightly different, at high load currents, the resistance of the packa ge and the board layout absorbs the difference. figure 70 shows the schematic of a typical application where the ldo outputs are paralleled. en1 vout1 vin en2 gnd 6 4 3 2 adj2 vout2 1 8 5 7 adj1 r1 r2 on off v in = 3.3v + c1 1f + c2 1f vout2 = 2.8v 09376-053 figure 70 . paralleling outputs for higher ou tput current quick output dischar ge (qod) function the adp224 / adp225 include an output discharge resistor to force the voltage on each output to zero when the respe ctive ldo is disabled. this ensures th at the outputs of the ldos are always in a well - defined state, regardless if it is enabled or not. the adp222 / adp223 do not in clude the output discharge function. figure 71 compares the t urn - o ff t ime of a 3.3 v output ldo with and without the qod function. both ldos have a 1 k res istor connected to each output. the ldo with the qod funct ion discharges the output to 0 v in less than 1 ms , whereas the 1 k load takes over 5 ms to do the same.
adp222/adp223/adp224/adp225 data sheet rev. b | page 20 of 24 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2000 4000 6000 8000 10000 vol ts (v) time (s) enable v out , no qod v out , with qod 09376-169 figure 71 . typical turn - off time with and w ithout qod f unction current limit and th ermal overload protection the adp222 / adp223 / adp224 / adp225 are protected against damage due to excessive power di ssipation by current and thermal overload protection circuits. the adp222 / adp223 / adp224 / adp225 are designed to current limit when the output load reaches 300 ma (typical). when the output load exceeds 300 ma, the output voltage is reduced to maintain a constant current limit. thermal overload protection is included, which lim its the junction temperature to a maximum of 155 c (typical) . under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above 15 5 c, the output is turned off, reducing the output current to 0. when the junction temperature drops below 140 c, the output is turned on again, and output current is restored to its nominal value. consider the case where a hard short from vout x to ground occurs. at first, the adp222 / adp223 / adp224 / adp225 cur - rent limits, so that only 300 ma is conducted into the short. if self - heatin g of the junction is great enough to cause its tempera - ture to rise above 15 5 c, thermal shutdown activates, turning off the output and reducing the output current to 0 ma. as the junction temperature cools and drops below 135c, the output turns on and co nducts 300 ma into the short, again causing the junction temperature to rise above 15 5 c. this thermal oscilla - tion between 140 c and 15 5 c causes a current oscillation between 300 ma and 0 ma that continues as long as the short remains at the output. curr ent and thermal limit protections are intended to protect the device against accidental overload conditions. for reliable operation, device power dissipation must be externally limited so that junction temperatures do not exceed 125c. thermal considerat ions in most applications, the adp222 / adp223 / adp224 / adp225 do not dissip ate much heat due to its high efficiency. however, in applications with high ambient temperature, and high supply voltage to output voltage differential, the heat dissipated in the package is large enough that it can cause the junction temperature of the die to exceed the maximum junction temperature of 125c. when the junction temperature exceeds 155 c , the converter enters thermal shutdown. it recovers only after the junction temper ature has decreased below 140 c to prevent any permanent damage. theref ore, thermal analysis for the chosen application is very important to guarantee reliable performance over all conditions. the junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package d ue to the power dissipation, as shown in equation 2. to guarantee reliable operation, the junction temperature of the adp222 / adp223 / adp224 / adp225 must not exceed 125c. to ensure that the junction temperature stays below this maximum value, the user must be aware of the parameters that contribute to junction temperature chang es. these parameters include ambient temperature , power d issipation in the power device, and thermal resistances between the junction and ambie nt air ( ja ). the ja number is dependent on the package assembly compounds that are used and the amount of copper used to solder the package gnd pin to the pcb. table 6 shows typical ja values of the 8 - lead lfcsp package for various pc b copper sizes , and table 7 shows the typical jb value of the 8 - lead lfcsp. table 6 . typical ja values copper size (mm 2 ) ja (c/w) 25 1 175.1 100 135.6 500 77.3 1000 65.2 6400 51 1 device soldered to minimum size pin traces. table 7 . typical jb value model jb (c/w) 8 - lead lfcsp 18.2
data sheet adp222/adp223/adp224/adp225 rev. b | page 21 of 24 the junction temperature of the adp222 / adp223 / adp224 / adp225 can be calculated by t j = t a + ( p d ja ) (2) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [( v in ? v out ) i load ] + ( v in i gnd ) where: i load is the load current. i gnd is the ground current. v in and v out are input and output voltages, respectively. power dissipation due to ground current is quite small and can be ignor ed. therefore, the junction temperature equation simplifies to the following: t j = t a + {[( v in ? v out ) i load ] ja } as shown in the simplified equation , for a given ambient temperature, input - to - output voltage differential, and continuous load current, there exists a minimum copper size requirement for the pcb to ensure that the junction temperature does not rise above 125c. figure 72 to figure 75 show junction temperat ure calculations for different ambient temperatures, power dissipation, and areas of pcb copper. 140 120 100 80 60 40 20 0 junction temper a ture t j (c) t ot al power dissi pa tion (w) 0 0.2 0.4 0.6 0.8 1.0 1.2 6400mm 2 1000mm 2 500mm 2 100mm 2 25mm 2 jedec t j max 09376-048 figure 72 . 8- lead lfcsp, t a = 25c 140 120 100 80 60 40 20 0 junction temper a ture t j (c) t ot al power dissi pa tion (w) 0 0.2 0.4 0.6 0.8 1.0 1.2 6400mm 2 1000mm 2 500mm 2 100mm 2 25mm 2 jedec t j max 09376-049 figure 73 . 8- lead lfcsp, t a = 50c 140 120 100 80 60 40 20 0 junction temper a ture t j (c) t ot al power dissi pa tion (w) 0 0.2 0.4 0.6 0.8 1.0 1.2 6400mm 2 1000mm 2 500mm 2 100mm 2 25mm 2 jedec t j max 09376-050 figure 74 . 8- lead lfcsp, t a = 85c 140 120 100 80 60 40 20 0 junction temper a ture t j (c) t ot al power dissi pa tion (w) 0 2 1 3 4 5 6 7 t b = 25c t b = 50c t b = 8 5 c t j max 09376-051 figure 75 . 8 - lead lfcsp, t a = 85c in the case where the board temperature is known, use the thermal characterization parameter, jb , to estimate the junction temperature rise (see figure 75 ). maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the following formula: t j = t b + ( p d jb ) ( 3 ) the typical value of jb is 1 8 .2 c/w for the 8 - lead lfcsp pack age.
adp222/adp223/adp224/adp225 data sheet rev. b | page 22 of 24 printed circuit boar d layout considerations heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the adp222 / adp223 / adp224 / adp225 . however, as listed in table 6 , a point of diminishing returns is eventually reached beyond whi ch an increase in the copper size does not yield significant heat dissipation benefits. place the input capacitor as close as possible to the vin and gnd pins. place the output capacitor as close as possible to the vout x and gnd pins. use of 0402 or 0603 s ize capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited. 09376-052 u1 j1 tb2 tb5 en1 c2 c1 c3 r3 r4 r1 r2 vout1 j2 tb6 adp223 - ________ - evalz vout2 tb7 gnd analog devices tb1 gnd tb4 vin tb3 en2 figure 76 . example 8 - lead lfcsp pcb layout
data sheet adp222/adp223/adp224/adp225 rev. b | page 23 of 24 outline dimensions 1.70 1.60 1.50 0.425 0.350 0.275 t op view 8 1 5 4 0.30 0.25 0.20 bottom view pin 1 index are a 2.00 bsc sq sea ting plane 0.60 0.55 0.50 1.10 1.00 0.90 0.20 ref 0.175 ref 0.05 max 0.02 nom 0.50 bsc exposed pa d pin 1 indic a t or (r 0.15) for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 07- 1 1-20 1 1-b figure 77 . 8 - lead lea d frame chip scale package [lfcsp _ud ] 2.00 mm 2.00 mm body, ultra thin, dual lead (cp - 8 - 10) dimensions shown in millimeters ordering guide output voltage (v) model 1 temperature range vout1 vout2 package description package option branding adp222a cpz - 1218 - r7 ?40c to +125c 1.2 1.8 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 l16 adp222acpz - 1228 - r7 ?40c to +125c 1.2 2.8 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 l17 adp222acpz - 1233 - r7 ?40c to +125c 1.2 3.3 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 l18 adp222acpz - 1528 - r7 ?40c to +125c 1.5 2.8 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lkr adp222acpz - 1533 - r7 ?40c to +125c 1.5 3.3 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lks adp222acpz - 1815 - r7 ?40c to +125c 1.8 1.5 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 ll0 adp222acpz - 1825 - r7 ?40c to +125c 1.8 2.5 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 ll1 adp222acpz - 1827 - r7 ?40c to +125c 1.8 2.7 8 - le ad lead frame chip scale package [lfcsp_ud] cp - 8 - 10 l3a adp222acpz - 1833 - r7 ?40c to +125c 1.8 3.3 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 ll2 adp222acpz - 2818 - r7 ?40c to +125c 2.8 1.8 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 ll3 adp222acpz - 2827 - r7 ?40c to +125c 2.8 2.7 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lje adp222acpz - 3325 - r7 ?40c to +125c 3.3 2.5 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lkv adp222acpz - 3328 - r7 ?40c to +125c 3.3 2.8 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lkw adp222acpz - 3330 - r7 ?40c to +125c 3.3 3.0 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lkx adp224acpz - 2818 - r7 ?40c to +125c 2.8 1.8 8 - lead lead frame chip scale package [lfcsp_ ud] cp - 8 - 10 lkp adp225acpz - r7 ?40c to +125c adjustable adjustable 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 lkq
adp222/adp223/adp224/adp225 data sheet rev. b | page 24 of 24 output voltage (v) model 1 temperature range vout1 vout2 package description package option branding adp223acpz - r7 ?40c to +125c adjustable adjustable 8 - lead lead frame chip scale package [lfcsp_ud] cp - 8 - 10 ljq adp223cp - eval z adjustable adjustable evaluation board adp225cp - evalz adjustable adjustable evaluation board 1 z = rohs compliant part. ? 2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the proper ty of their respective owners. d09376 - 0 - 8/11(b)

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