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  ? semiconductor components industries, llc, 2010 march, 2010 ? rev. 0 1 publication order number: NTD5867NL/d NTD5867NL n-channel power mosfet 60 v, 20 a, 39 m  features ? low r ds(on) ? high current capability ? 100% avalanche tested ? these devices are pb ? free, halogen free/bfr free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain ? to ? source voltage v dss 60 v gate ? to ? source voltage ? continuous v gs  20 v gate ? to ? source voltage ? non ? repetitive (t p < 10  s) v gs  30 v continuous drain current (r  jc ) steady state t c = 25 c i d 20 a t c = 100 c 13 power dissipation (r  jc ) t c = 25 c p d 36 w pulsed drain current t p = 10  s i dm 76 a operating junction and storage temperature t j , t stg ? 55 to 150 c source current (body diode) i s 20 a single pulse drain ? to ? source avalanche energy (v dd = 50 v, v gs = 10 v, r g = 25  , i l(pk) = 19 a, l = 0.1 mh, t j = 25 c) e as 18 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. thermal resistance maximum ratings parameter symbol value unit junction ? to ? case (drain) r  jc 3.5 c/w junction ? to ? ambient ? steady state (note 1) r  ja 45 1. surface ? mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces. dpak case 369aa (surface mount) style 2 marking diagrams & pin assignment 60 v 39 m  @ 10 v r ds(on) max i d max v (br)dss 50 m  @ 4.5 v http://onsemi.com 1 2 3 4 see detailed ordering and shipping information in the package dimensions section on p age 2 of this data sheet. ordering information 1 gate 2 drain 3 source 4 drain yww 58 67nlg y = year ww = work week 5867nl = device code g = pb ? free package g s n ? channel mosfet d ipak case 369d (straight lead) style 2 1 2 3 4 4 drain 2 drain 1 gate 3 source yww 58 67nlg 20 a 18 a
NTD5867NL http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250  a 60 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 60 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 100 v t j = 25 c 1.0  a t j = 125 c 100 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250  a 1.5 1.8 2.5 v negative threshold temperature coefficient v gs(th) /t j 5.2 mv/ c drain ? to ? source on resistance r ds(on) v gs = 10 v, i d = 10 a 26 39 m  v gs = 4.5 v, i d = 10 a 33 50 forward transconductance gfs v ds = 15 v, i d = 10 a 8.0 s charges, capacitances and gate resistances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 675 pf output capacitance c oss 68 reverse transfer capacitance c rss 47 total gate charge q g(tot) v gs = 10 v, v ds = 48 v, i d = 20 a 15 nc threshold gate charge q g(th) 1.0 gate ? to ? source charge q gs 2.2 gate ? to ? drain charge q gd 4.3 total gate charge q g(tot) v gs = 4.5 v, v ds = 48 v, i d = 20 a 7.6 nc gate resistance r g 1.3  switching characteristics (note 3) turn ? on delay time t d(on) v gs = 10 v, v dd = 48 v, i d = 20 a, r g = 2.5  6.5 ns rise time t r 12.6 turn ? off delay time t d(off) 18.2 fall time t f 2.4 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 10 a t j = 25 c 0.87 1.2 v t j = 100 c 0.78 reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/  s, i s = 20 a 17 ns charge time ta 13 discharge time tb 4.0 reverse recovery charge q rr 12 nc 2. pulse test: pulse width 300  s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures. ordering information order number package shipping ? NTD5867NL ? 1g ipak (straight lead) (pb ? free) 75 units / rail NTD5867NLt4g dpak (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NTD5867NL http://onsemi.com 3 typical performance curves 10v v ds , drain ? to ? source voltage (volts) i d , drain current (amps) v gs , gate ? to ? source voltage (volts) figure 1. on ? region characteristics figure 2. transfer characteristics i d , drain current (amps) figure 3. on ? resistance vs. gate ? to ? source voltage v gs , gate ? to ? source voltage (volts) figure 4. on ? resistance vs. drain current and gate voltage i d , drain current (amps) r ds(on) , drain ? to ? source resistance (  ) r ds(on) , drain ? to ? source resistance (  ) figure 5. on ? resistance variation with temperature t j , junction temperature ( c) figure 6. drain ? to ? source leakage current vs. drain voltage v ds , drain ? to ? source voltage (volts) r ds(on) , drain ? to ? source resistance (normalized) i dss , leakage (na) v ds 10 v t j = 25 c t j = ? 55 c t j = 125 c v gs = 4.5 v i d = 20 a v gs = 10 v t j = 25 c 3.8 v 3.0 v 4 v 3.6 v 2.8 v 3.2 v 3.4 v i d = 20 a t j = 25 c v gs = 10 v t j = 25 c 0 10 20 30 40 35 5 0123 23 45 0.020 0.030 0.040 0.050 0.060 46 810 0.020 0.035 10 15 20 5 0.030 0.025 0.040 0.6 0.8 1.0 1.2 1.4 ? 50 0 50 100 150 1.6 1.8 ? 25 25 75 125 3579 4.5 v v gs = 0 v t j = 150 c t j = 125 c 100 1000 10 20 30 40 60 10 10000 25 15 45 0 10 20 30 40 35 5 25 15 2.0 2.2 50
NTD5867NL http://onsemi.com 4 typical performance curves c rss 02030 drain ? to ? source voltage (volts) c, capacitance (pf) figure 7. capacitance variation 10 v gs = 0 v t j = 25 c c oss c iss v gs figure 8. gate ? to ? source voltage vs. total charge v gs , gate ? to ? source voltage (volts) q g , total gate charge (nc) v ds = 48 v i d = 20 a t j = 25 c q gd q gs q t v sd , source ? to ? drain voltage (volts) i s , source current (amps) figure 9. resistive switching time variation vs. gate resistance r g , gate resistance (ohms) t, time (ns) v gs = 0 v figure 10. diode forward voltage vs. current t r t d(off) t d(on) t f v dd = 48 v i d = 20 a v gs = 10 v t j = 25 c figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (volts) i d , drain current (amps) r ds(on) limit thermal limit package limit v gs = 10 v single pulse t c = 25 c 1 ms 100  s 10 ms dc 10  s 40 t j , junction temperature ( c) i d = 20 a figure 12. maximum avalanche energy vs. starting junction temperature eas, single pulse drain ? to ? source avalanche energy (mj) 0 100 200 300 400 0 0 2 4 6 8 51015 1 10 100 10 100 1000 0.7 0.5 0 10 20 5 15 0.8 0.9 10 100 1 10 100 0.1 1 25 125 20 10 0 75 100 150 50 1.0 15 5 700 800 600 500 10 1 0.6 900 1000 50 60
NTD5867NL http://onsemi.com 5 typical performance curves figure 13. thermal response r(t), effective transient thermal resistance (normalized) t, time (  s) 0.1 10 0.01 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse r  jc (t) = r(t) r  jc d curves apply for power pulse train shown read time at t 1 t j(pk) ? t c = p (pk) r  jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 0.01 0.1 0.001 0.0001 0.00001 0.000001 1.0
NTD5867NL http://onsemi.com 6 package dimensions dpak (single guage) case 369aa ? 01 issue a style 2: pin 1. gate 2. drain 3. source 4. drain d a b r v s f l 2 pl m 0.13 (0.005) t e c u j ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.025 0.035 0.63 0.89 e 0.018 0.024 0.46 0.61 f 0.030 0.045 0.77 1.14 j 0.018 0.023 0.46 0.58 l 0.090 bsc 2.29 bsc r 0.180 0.215 4.57 5.45 s 0.024 0.040 0.60 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 123 4 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243  mm inches  scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.386 0.410 9.80 10.40 h
NTD5867NL http://onsemi.com 7 package dimensions style 2: pin 1. gate 2. drain 3. source 4. drain 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak (straight lead dpak) case 369d ? 01 issue b on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NTD5867NL/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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