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  data bulletin MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. variable split band inverter features applications  ctcss highpass filter  good recovered audio quality  fixed and rolling code modes  serial (MX214) and parallel (mx224) loading options  32 programmable split points  half-duplex capability  mobile radio voice security  cellular telephone voice security clear / scramble en / mute rx / tx load / latch serial clock enable / mute clear / scramble rx / (ser / par) tx a0 a1 a2 a3 a4 (serial data in) rx in ps bias en rx ps rx mute bias ck 3 tx ps tx ps bias ck a tx in ps c6 rx tx f c1 rx tx f c2 ck 4 ck a tx rx bias clear tx scramble ck 4 bias bias bias ps mute rx rx out ps + en rx ctcss ck b rx rx ps en tx ps + en tx tx out clock switching rx / tx v dd v bias v ss clock divider 1mhz ps ck b ck b ck 3 ck4 ck a f c1 f c2 clock divider rom 1mhz osc xtal / clock xtal input latches powersave filter 3 filter 2 filter 1 filter 4 c 5 s the MX214/224 variable split band inverters are designed for mobile and cellular radio voice security applications. digital control functions are loaded serially into the MX214. the mx224 is loaded in parallel. the MX214/224 ics include a highpass filter that rejects subaudio frequencies, ensuring full ctcss compatibility. this ctcss filter is not included on the earlier generation mx204 vsb inverter. the MX214/224 splits the voiceband (300-2700hz) into upper and lower subbands, and inverts each subband about itself. the split point (defined as the frequency where the voice band is subdivided), is externally programmable to 32 distinct values in the 300 to 3000hz range. in the fixed code mode, a single point is used. fixed mode operation nets approximately 4 mutually exclusive secure channels. in rolling code mode, the split point is changed many times per second, usually under control of a microprocessor. rolling code scrambling requires synchronization, offers higher security than fixed code operation, and provides a much greater number of mutually exclusive secure channels. the MX214/224 offers a recovered audio product close to that of a telephone. the on-chip mute function is useful when implementing rolling code continuous synchronization schemes. powersave and clear/scramble controls are also included on-chip. timing and filter clocks are derived internally from an on-chip 1mhz reference oscillator driven by a 1mhz crystal or clock pulse input. the MX214 and the mx224 operate from a single 5.0v supply and available in the following packges: 22-pin cdip (MX214j/mx224j), 22-pin pdip (MX214p/mx224p), and 24-pin plcc (MX214lh/mx224lh).
variable split band inverter 2 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. contents section page 1. block diagram................................................................................................................ 3 2. signal list.................................................................................................................. ..... 4 3. external components.................................................................................................... 7 4. general description....................................................................................................... 8 5. application .................................................................................................................. ... 9 5.1 audio quality ............................................................................................................... ........... 9 6. performance specifications........................................................................................ 11 6.1 electrical specifications................................................................................................... ..... 11 6.1.1 absolute maximum limits ................................................................................................... .... 11 6.1.2 operating limits.......................................................................................................... ............ 11 6.1.3 operating characteristics ................................................................................................. ...... 12 6.1.4 timing .................................................................................................................... ................. 14 6.2 packages.................................................................................................................... .......... 15 mx-com, inc. reserves the right to change specifications at any time without notice.
variable split band inverter 3 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 1. block diagram clear / scramble en / mute rx / tx load / latch serial clock enable / mute clear / scramble rx / (ser / par) tx a0 a1 a2 a3 a4 (serial data in) rx in ps bias en rx ps rx mute bias ck 3 tx ps tx ps bias ck a tx in ps c6 rx tx f c1 rx tx f c2 ck 4 ck a tx rx bias clear tx scramble ck 4 bias bias bias ps mute rx rx out ps + en rx ctcss ck b rx rx ps en tx ps + en tx tx out clock switching rx / tx v dd v bias v ss clock divider 1mhz ps ck b ck b ck 3 ck4 ck a f c1 f c2 clock divider rom 1mhz osc xtal / clock xtal input latches powersave filter 3 filter 2 filter 1 filter 4 c 5 s figure 1: block diagram
variable split band inverter 4 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 2. signal list MX214 pin no. mx224 pin no. signal name description j/p lh j/p lh 7 1 1 1 xtal/clock input to the clock oscillator inverter. a 1mhz crystal input or externally derived 1mhz clock is injected here. 822 2 xtal output of the clock oscillator inverter. 9 3 serial data input this pin is used to input an 8-bit word representing the digital control functions. this word is loaded using the serial data clock and in input in the following sequence: mute, clear, tx / rx , a0, a1, a2, a3, a4. the latch / load is operated on the completion. reference the timing diagram in figure 8. 3 C a4 4 C a3 5 C a2 6 C a1 7 C a0 3 C a4 4 C a3 5 C a2 6 C a1 7 C a0 programming inputs in parallel mode, these five digital inputs define the split point frequency. each of the 5 input pins has a 1m  internal pull-up resistor. see table 4 for programming information. 88 tx / rx this digital input selects the receive and transmit paths and configures upperband and lowerband filter bandwidths while setting the ctcss highpass filter position on the signal path. see table 2, figure 6, and figure 7. 1m  internal pull-up resistor (rx). 13 8 serial / parallel this pin must be connected to v ss for serial loading. internal 1m  pull-up resistor. 9 9 clear/scramble this digital input puts the device into clear or scramble mode by controlling the application of carrier frequency to the upper and lower band balanced modulators. in scramble mode, the balanced modulator carrier frequency values are selected by the split point address a0-a4. see table 4. in clear mode, the carriers are disabled and the balanced modulators are bypassed internally, i.e. the lower band signal is not added to the output signal. 1mhz internal pull-up resistor (clear). 10 10 enable/mute this digital function is used to disable the receive or the transmit signal paths for rolling code synchronization while maintaining bias conditions. synchronization data can be transmitted during the mute periods, as is done in the mx1204 vsb scrambler module. 1m  internal pull-up resistor (enable) 14 10 serial clock input this is the externally applied data clock frequency used to shift input data along in devices wired in the serial-loading mode. one full data clock cycle is required to shift one data bit completely into the register. see timing diagram figure 8. 1m  internal pull-up resistor.
variable split band inverter 5 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. MX214 pin no. mx224 pin no. signal name description j/p lh j/p lh 15 11 11 11 latch / load this pin controls the loading of the 8 digital function inputs (enable, clear, a0-a4) into the internal register. when this pin is at a logic 1, all eight inputs are transparent and new data acts directly. for controlled changing of parameters in the parallel, latch / load must be kept at logic 0 while a new function is loaded, then strobed 0-1-0 to latch the inputs in. for serial loading, the serial data should be loaded with the latch / load at logic 0 and then the latch / load strobed 0-1-0 on completion of data loading. internal 1m  pull-up resistor (load). see figure 8. 16 12 12 12 powersave this digital input is used to place the MX214/224 into powersave mode where all parts of the device except the 1mhz oscillator are shut down. all signal input and output lines are made open circuit, free of all bias. this allows signal paths to be routed externally around the device, while reducing current consumption. a logic 0 at this input enables the device to work normally as shown in table 2. internal 1m  pull-up resistor. 17 13 13 13 v ss negative supply (gnd) 18 14 14 14 internal connection this pin is internally connected. leave open circuit. 19 15 15 15 rx output this is the processed received audio signal output. this pin is held at a dc bias voltage for all functions except powersave. this buffered output is driven by the summing circuit in the rx mode. signal paths and bias levels are detailed in table 2 and figure 7. 20 16 16 16 tx output this is the processed audio output for the transmission channel. this pin is held at a dc bias voltage for all functions except powersave. this summed and buffered signal is passed through the ctcss high pass filter to the output pin in the tx mode. signal paths and bias levels are detailed in table 2 and figure 6. 21 17 17 17 v bias normally at v dd /2, this pin requires an external decoupling capacitor (c7) to v ss . 22 18 18 18 rx input this is the analog received signal input. this pin is held at a dc bias voltage by a 300k  on-chip bias resistor, which is selected for all functions except powersave. it must be connected to external circuitry by capacitor c3. see figure 2 and figure 3. this input is routed through the ctcss high pass filter in rx mode to remove subaudio frequencies from the voiceband. signal paths and bias levels are detailed in table 2 and figure 7. 1 19 19 19 highband filter output the output of the input filter of the upperband limit. the tx / rx functions sets the lowpass filter at 3400hz or 2700hz respectively. this output must be connected to the highband balanced modulator input via capacitor c5. see figure 2 and figure 3.
variable split band inverter 6 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. MX214 pin no. mx224 pin no. signal name description j/p lh j/p lh 2 20 20 20 highband balanced modulator input the input to the balanced modulator of the upperband limit. this input must be connected to the highband filter output via capacitor c5. see figure 2 and figure 3. 3 21 21 21 lowband balanced modulator input the input to the balanced modulator of the lowerband limit. this input must be connected to the lowband filter output via capacitor c6. see figure 2 and figure 3. 4 22 22 22 tx input this analog clear audio input for the vsb scrambler. this pin is held at a dc bias voltage by a 300k  on-chip bias resistor, which is selected for all functions except powersave. in must be connected to external circuitry by capacitor c4. see figure 2 and figure 3. this input, in tx mode, is connected to upper and lowerband input filters. signal paths and bias levels are detailed in table 2 and figure 6. 5 23 23 23 lowband filter output the output of the input filter of the lowerband limit. the tx / rx function determines which filter is used (filter 1 or 2). see figure 6 and figure 7. this output must be connected to the lowband balanced modulator input via capacitor c6. see figure 7. 6242424v dd a single 5.0v supply is required. 10, 11, 12 4, 5, 6, 7, 9 n/c no connection table 1: signal list tx rx/ = 1 tx rx/ = 0 mute = 0 powersave rx path enabled disabled disabled disabled rx out level bias bias bias high impedance tx path disabled enabled disabled disabled tx out level bias bias bias high impedance table 2: functions influencing signal paths
variable split band inverter 7 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 3. external components (18) (17) (16) (15) (14) (13) (12) (11) (10) 22 21 20 19 18 17 16 15 14 13 12 n/c parallel/serial serial clock in load/latch around through v ss n/c rx out tx out v bias rx in xtal/clock xtal serial data in n/c n/c v dd tx in c6 c5 c7 c8 c3 v dd v ss 1 2 3 4 5 6 7 8 9 10 11 (19) (20) (21) (22) (23) (24) (1) (2) (3) (8) MX214p, MX214j (MX214lh) c4 r1 xtal/clock xtal v ss r2 c1 c2 x1 figure 2: recommended external components MX214 serial loading 24 23 22 21 20 19 18 17 16 15 14 13 n/c rx out tx out v bias rx in tx in v dd a0 rx/tx clear/scramble enable/mute load/latch a1 a3 c7 c8 c3 v dd 1 2 3 4 5 6 7 8 9 10 11 12 mx224p, mx224j (mx224lh) v ss around/through a2 a4 xtal xtal/clock programming inputs c4 c6 c5 r1 xtal/clock xtal v ss r2 c1 c2 x1 figure 3: recommended external components 'mx224 parallel loading'
variable split band inverter 8 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. component notes value tolerance r1 1.0m  10% r2 selectable c1 33pf 20% c2 68pf 20% c3 15nf 20% c4 15nf 20% c5 1 1.0f 20% c6 1 1.0f 20% c7 1.0f 20% c8 1.0f 20% x1 2 1mhz table 3: recommended external components notes: 1. c5 and c6 are coupling capacitors between filter outputs and balanced modulator inputs. 2. for best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least 40% of v dd , peak to peak. tuning fork crystals generally cannot meet this requirement. to obtain crystal oscillator design assistance, consult your crystal manufacturer. 4. general description the MX214/224 variable split band inverters are designed for mobile and cellular radio voice security applications. digital control functions are loaded serially into the MX214. the mx224 is loaded in parallel. the MX214/224 ics include a highpass filter that rejects subaudio frequencies, ensuring full ctcss compatibility. this ctcss filter is not included on the earlier generation mx204 vsb inverter. the MX214/224 splits the voiceband (300-2700hz) into upper and lower subbands, and inverts each subband about itself. the split point (defined as the frequency where the voice band is subdivided), is externally programmable to 32 distinct values in the 300 to 3000hz range. in the fixed code mode, a single point is used. fixed mode operation nets approximately 4 mutually exclusive secure channels. in rolling code mode, the split point is changed many times per second, usually under control of a microprocessor. rolling code scrambling requires synchronization, offers higher security than fixed code operation, and provides a much greater number of mutually exclusive secure channels. the MX214/224 offers a recovered audio product close to that of a telephone. the on-chip mute function is useful when implementing rolling code continuous synchronization schemes. powersave and clear/scramble controls are also included on-chip. timing and filter clocks are derived internally from an on-chip 1mhz reference oscillator driven by a 1mhz crystal or clock pulse input.
variable split band inverter 9 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 5. application the MX214 represents both the MX214 and the mx224 throughout this section. recommended external components are shown in figure 2 and figure 3. in scramble mode, split point frequencies are selected and set in accordance with the rom address code present at the inputs a0-a4. see table 4. in clear mode, both upper and lowerband filter limits are used (see figure 6 and figure 7), the carrier frequencies are turned off, and the balanced modulators are bypassed internally. the lowband audio is removed from the output signal prior to summing. rom address a4-a0 split point hz low band carrier, hz f c1 high band carrier, hz f c2 rom address a4-a0 split point hz low band carrier, hz f c1 high band carrier, hz f c2 00000 2800 3105 6172 10000 1135 1436 4504 00001 2625 2923 6024 10001 1050 1351 4424 00010 2470 2777 5813 10010 976 1278 4347 00011 2333 2631 5681 10011 913 1213 4310 00100 2210 2512 5555 10100 857 1157 4273 00101 2100 2403 5494 10101 792 1094 4166 00110 2000 2304 5376 10110 736 1037 4132 00111 1909 2212 5263 10111 688 988 4065 01000 1826 2127 5208 11000 636 936 4032 01001 1750 2049 5102 11001 591 891 3968 01010 1680 1984 5050 11010 552 853 3937 01011 1555 1858 4950 11011 512 813 3906 01100 1448 1748 4807 11100 471 772 3846 01101 1354 1655 4716 11101 428 728 3816 01110 1272 1572 4629 11110 388 688 3787 01111 1200 1501 4587 11111 350 650 3731 table 4: rom address programming the mute function disables the MX214/224s audio outputs to allow periodic transmission of synchronization data. a logic 0 at this input isolates the device while leaving the audio input and output ins at bias level (see table 2). when the mx21/224 is in powersave mode, audio signals may be hardwired around the device since the input and output pins are open circuit. see table 2. 5.1 audio quality figure 4 shows the recommended basic audio system layout using pre- and de-emphasis circuitry to maintain good recovered speech quality. the transmit mode, do not pre-emphasize the audio output of the MX214. in the receive mode, de-emphasis should be used after the MX214. amplitude control pre-emphasis MX214 tx rx MX214 de-emphasis amplitude control (optional) frequency inverter frequency inverter (optional) flat amplitude channel 300-3400hz figure 4: recommended basic communication audio system layout figure 5 shows the recommended basic audio system layout if it is necessary to install the MX214 within a radio having pre- and de-emphasis circuitry as a standard. this is where post-emphasis access is not possible in the transmitter.
variable split band inverter 10 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. pre-emphasis MX214 tx rx MX214 de-emphasis amplitude control frequency inverter frequency inverter (additional) flat amplitude channel 300-3400hz (optional) (fitted) de-emphasis (additional) pre-emphasis (fitted) figure 5: recommended basic radio communication audio system layout. during the transmit function the low pass and ctcss filters are configured automatically as shown in figure 6, with cut-off frequencies (-3db) indicated. bias ps 3400hz 3400hz bias ps + enable tx scramble c 5 f c2 scramble clear ck 3 filter 3 2700hz 3400hz filter 4 ck 3 2600hz 2600hz c 6 f c1 scramble clear ck a filter 2 2900hz 2900hz filter 1 ck a tx in ck b ck 4 300hz clear bias tx out ctcss s figure 6: basic tx path during the receive function the low pass and ctcss filters are configured automatically as shown in figure 7, with cut-off frequencies (-3db) indicated. bias rx mute 2700hz 3400hz bias ps + enable tx scramble c 5 f c2 scramble clear ck 4 filter 4 3400hz 3400hz filter 3 ck 3 2900hz 2900hz c 6 f c1 scramble clear ck a filter 1 2600hz 2600hz filter 2 ck a rx in ck 4 clear bias rx out s ck b 300hz ctcss bias ps figure 7: basic rx path
variable split band inverter 11 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 6. performance specifications 6.1 electrical specifications 6.1.1 absolute maximum limits exceeding these maximum ratings can result in damage to the device. general notes min. typ. max. units supply (v dd -v ss ) -0.3 7.0 v voltage on any pin to v ss -0.3 v dd + 0.3 v current v dd -30 30 ma v ss -30 30 ma any other pin -20 20 ma p/lh packages total allowable power dissipation at t amb = 25  c 800 mw derating above 25  c 10 mw/  c above 25  c operating temperature -30 70  c storage temperature -40 85  c j package total allowable power dissipation at t amb = 25  c 800 mw derating above 25  c 10 mw/  c above 25  c operating temperature -30 85  c storage temperature -55 125  c 6.1.2 operating limits correct operation of the device outside these limits is not implied. min. typ. max. units supply (v dd -v ss ) 4.5 5.0 5.5 v operating temperature (p/lh) -30 70  c operating temperature (j) -30 85  c xtal frequency 1.0 mhz
variable split band inverter 12 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 6.1.3 operating characteristics for the following conditions unless otherwise specified. v dd = 5.0v @ t amb = 25  c audio level 0db ref. = 775mv rms , xtal/clock frequency = 1.0mhz notes min. typ. max. units static values voltage 4.5 5.0 5.5 v current enabled 8 ma powersave 1.2 ma analog input impedances tx/rx input (enabled) 100 k  tx/rx input (powersave) 1 m  balanced modulator 40 k  analog output impedances rx output (tx mode) 100 k  rx output (rx mode) 2 k  rx output (powersave) 1 m  tx output (tx mode) 2 k  tx output (rx mode) 100 k  tx output (powersave) 1 m  input lpf 1 k  digital values digital input impedance 100 k  dynamic values input logic 1 3.5 v input logic 0 1.5 v xtal/clock frequency 1 mhz analog input level -18 6 db carrier breakthrough 1 -55 db baseband breakthrough 1, 2, 3 -33 db filter clock breakthrough 1, 2, 3 -50 db output noise 1, 4 -45 db passband characteristics clear mode 7 passband gain 0 db output lower 3db point (rx or tx) 300 hz output upper 3db point (rx or tx) 3400 hz scramble-descramble 5 received signal passband gain 6 0 db received signal lower 3db point 400 hz received signal upper 3db point 2700 hz transmitted signal lower 3db point 300 hz transmitted signal upper 3db point 3400 hz
variable split band inverter 13 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. notes min. typ. max. units ctcss (highpass filter) -3db point 300 hz passband gain 0 db stopband attenuation at f < 250hz 40 db operating characteristics notes: 1. measured at the output of a single device. 2. tx mode. 3. rx mode. 4. with input ac short-circuited to v ss . 5. measured at the output of a receiving device in a scrambler-descrambler system with a transmission channel having a flat amplitude response and a bandwidth of 300hz to 3400hz and measured relative to the input signal at the transmitting device. 6. excluding split point  150hz. 7. measured at the rx or tx output pin of a single source.
variable split band inverter 14 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 6.1.4 timing timing notes min. typ. max. units serial mode t sms serial mode enable set-up 250 ns t pwh serial clock high pulse width 250 ns t pwl serial clock low pulse width 250 ns t ds data set up time 150 ns t dhs data hold time 50 ns t ll latch / load set up time 250 ns t llw latch / load pulse width 150 ns parallel mode t llw latch / load pulse width 150 ns t dsp data set up time 150 ns t dhp data hold time 20 ns table 5: serial and parallel timing parallel / serial serial clock serial data input load / latch t sms load / latch parallel data inputs t ds t dhs 1st bit enable t pwh 2nd bit clear t pwl 3rd bit 8th bit rx / tx a 4 t ll t llw parallel loading serial loading t llw t dsp t dhp note: for 'serial load' devices the data loading sequence is: - enable - clear - rx/ - a - a - a - a - a tx 01234 figure 8: loading timing diagram
variable split band inverter 15 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 6.2 packages note : all dimensions in inches (mm.) angles are in degrees package tolerances b a h k l e f j1 j p c k1 e1 t pin1 a b c e e1 f h typ. max. min. dim. j j1 p t k1 k l 0.230 (5.84) 0.384 (9.75) 0.515 (13.08) 0.171 (4.34) 1.080 (27.43) 0.165 (4.19) 0.100 (2.54) 0.115 (2.92) 0.466 (11.84) 0.408 (10.36) 0.418 (10.62) 1.000 (25.40) 0.020 (0.51) 0.018 (0.46) 0.058 (1.47) 0.075 (1.91) 0.080 (2.03) 0.080 (2.03) 1.060 (26.92) 0.376 (9.55) 0.0102 (0.259) 0.055 (1.40) 0.0098 (0.249) figure 9: 22-pin cdip mechanical outline: order as part no. MX214j or mx224j note : all dimensions in inches (mm.) angles are in degrees package tolerances a b c e e1 h typ. max. min. dim. j j1 k l 0.360 (9.14) 0.480 (12.19) 0.128 (3.25) 1.100 (27.94) 0.185 (4.70) 0.420 (10.67) 0.390 (9.91) 0.420 (10.67) 0.020 (0.51) 0.020 (0.51) 0.040 (1.02) 0.066 (1.68) 1.080 (27.43) 0.330 (8.38) 0.100 (2.54) 0.045 (1.14) 0.065 (1.65) 0.015 (0.38) p 0.010 (0.25) t y 7 e y e1 t c p j1 k h j l b a pin 1 figure 10: 22-pin pdip mechanical outline: order as part no. MX214p or mx224p
variable split band inverter 16 MX214/224  1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480112.002 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. package tolerances note : all dimensions in inches (mm.) angles are in degrees a b c d e h p f g typ. max. min. dim. k j w t y 0.435 (11.05) 0.435 (11.05) 0.051 (1.30) 0.009 (0.22) 6 30 0.409 (10.40) 0.409 (10.40) 0.146 (3.70) 0.417 (10.60) 0.417 (10.60) 0.049 (1.24) 0.006 (0.152) 0.250 (6.35) 0.250 (6.35) 0.023 (0.58) 0.047 (1.19) 0.022 (0.55) 0.018 (0.45) 0.380 (9.61) 0.380 (9.61) 0.128 (3.25) 0.048 (1.22) 45 f g p a d b e pin 1 w c j k y w h t figure 11: 24-pin plcc mechanical outline: order as part no. MX214lh or mx224lh


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