november 2001 rev. 1 - eco #xxxx 1 pcmcia sram memory card srv20 series pc card products features ? high performance sram memory card ? universal 3.3 to 5 volt supply allows for wider compatibility between systems. ? fast access times: 150ns @ 3.3v ? 5v ? x8/x16 pcmcia standard interface ? low power cmos technology provides very low power and reliable data retention characteristics - standby current < 100a typical ? rechargeable lithium battery with recharge circuitry - eliminates the need for replaceable batteries - standby current during recharge typically < 2ma - battery backup time ? 18 months - type i card ? 40 months - type ii card typical based on 4mb ? unlimited write cycles, no endurance issues ? optional features: ? 2kb eeprom attribute memory containing cis ? optional hardware write protect switch ? pc card standard type i or type ii form factor the wedc sram series (srv20) memory cards offer a high performance nonvolatile storage solution for code and data storage, disk caching, and write intensive mobile and embedded applications. packaged in pcmcia type i or type ii housing (type ii for cards with extended battery backup time), the wedc sram srv20 series is based on high density and super low power sram memory devices, providing densities from 2mbytes to 16mbytes. the srv20 series of sram memory cards has a universal wide power supply (3v to 5v) and operates at speeds as high as 150ns. the cards are based on advanced cmos technology providing very low power and reliable data retention characteristics. wedc?s sram cards contain a rechargeable lithium battery and recharge circuitry, eliminating the need for replaceable batteries found in many sram cards. wedc?s standard cards are shipped with wedc?s sram logo. cards are also available with blank housings (no logo). the blank housings are available in both a recessed (for label) and flat housing. please contact wedc sales representative for further information on custom artwork. sram memory card 2mb through 16mb block diagram 16mb sram card shown + decoder and logic control address buffer [a1..a21] /csli /cshi /cshi [do..d7] [d8..d15] write prot switch s1 wp vcc [a22..a23] attribute memory ce1# ce2# we# oe# reg# ++ + /cs-a /cs-a /rd /rd /rd /wr /wr /wr ctrl ctrl a0 power management and battery control lithium battery to internal power supply vcc bvd1 bvd2 gnd vs1 vs2 [d8..d15] [do..d7] i/o buffer sram 2m x 8 [a1..a11] gnd nc + 2. pull up resistor (min 10k) notes: 1. pull down resistor (min 100k) + + sram 2m x 8 sram 2m x 8 sram 2m x 8 general description sram 2m x 8 sram 2m x 8 sram 2m x 8 sram 2m x 8
november 2001 rev. 1 - eco #xxxx 2 pcmcia sram memory card srv20 series pc card products pinout notes: 1. cd1# and cd2# are grounded internal to pc card. 2. shows density for which specified address bit is msb. higher order address bits are no connects (ie 1mb a19 is msb, a20 - a21 are nc). 3. bvd1 is an open drain output with a 10k ohm internal pull-up resistor. 4. the a23 address line for 16mb capacities is also used for 12mb cards. 5. vs1 is grounded and vs2 is open to indicate a 3.3v/5v card, with a 5v key, has been inserted. pin signal name i/o function active pin signal name i/o function active 1 gnd ground 35 gnd ground 2 dq3 i/o data bit 3 36 cd1# o card detect 1 low 3 dq4 i/o data bit 4 37 dq11 i/o data bit 11 4 dq5 i/o data bit 5 38 dq12 i/o data bit 12 5 dq6 i/o data bit 6 39 dq13 i/o data bit 13 6 dq7 i/o data bit 7 40 dq14 i/o data bit 14 7 ce1# i card enable 1 low 41 dq15 i data bit 15 8 a10 i address bit 10 42 ce2# i card enable 2 low 9 oe# i output enable low 43 vs1 o voltage sense 1 gnd (5) 10 a11 i address bit 11 44 n.c. 11 a9 i address bit 9 45 n.c. 12 a8 i address bit 8 46 a17 i address bit 17 13 a13 i address bit 13 47 a18 i address bit 18 14 a14 i address bit 14 48 a19 i address bit 19 15 we# i write enable low 49 a20 i address bit 20 2mb(2) 16 rdy/bsy# o ready/busy n.c. 50 a21 i address bit 21 4mb(2) 17 vcc supply voltage 51 vcc supply voltage 18 vpp1 prog. voltage n.c. 52 vpp2 prog. voltage n.c. 19 a16 i address bit 16 53 a22 address bit 22 8mb(2) 20 a15 i address bit 15 54 a23 address bit 23 1 6mb(2,4 ) 21 a12 i address bit 12 55 a24 address bit 24 22 a7 i address bit 7 56 a25 address bit 25 23 a6 i address bit 6 57 vs2 o voltage sense 2 n.c. 24 a5 i address bit 5 58 n.c. 25 a4 i address bit 4 59 wait# o extended bus cycle low 26 a3 i address bit 3 60 n.c. 27 a2 i address bit 2 61 reg# i attrib mem select low 28 a1 i address bit 1 62 bvd2 o bat. volt. detect 2 29 a0 i address bit 0 63 bvd1 o bat. volt. detect 1 (3) 30 dq0 i/o data bit 0 64 dq8 i/o data bit 8 31 dq1 i/o data bit 1 65 dq9 i/o data bit 9 32 dq2 i/o data bit 2 66 dq10 o data bit 10 33 wp o write potect high 67 cd2# o card detect 2 low 34 gnd ground 68 gnd ground
november 2001 rev. 1 - eco #xxxx 3 pcmcia sram memory card srv20 series pc card products mechanical min. 1.6mm 0.05 0.063? 10.0mm min 0.400? 5.0mm t1 0.197? 1.0mm 0.05 0.039? 85.6mm 0.20 3.370? 3.0mm 54.0mm 0.10 2.126? 1.0mm 0.05 0.039? note 1 substrate area interconnect area type ii 54.0mm 0.10 (2.126?) 10.0mm min (0.400?) 1.6mm 0.05 (0.063?) 1.0mm 0.05 (0.039?) 1.0mm 0.05 (0.039?) note 1 3.3mm t1 (0.130?) t1=0.10mm interconnect area t1=0.20mm substrate area interconnect area 10.0mm min (0.400?) 3.0mm min 85.6mm 0.20 (3.370?) substrate area type i note 1 : this dimension (1mm) allows insertion to 5v and 3v sockets
november 2001 rev. 1 - eco #xxxx 4 pcmcia sram memory card srv20 series pc card products symbol type name and function a0 - a25 input a ddress inputs: a 0 through a25 enable direct addressing of up to 64m b o f m em or y on th e car d. sign al a 0 is n ot u sed in w ord access mode. a25 is the most significant bit. (address pins used are based on card density ,see pinout for highest used address pin) dq0 - dq15 input/out pu t da ta input/o utput: dq0 through dq15 constitute the bi-directional databus. dq0 - dq7 constitute the lower (even) byte and dq8 - dq15 the upper (odd) byte. dq15 is the msb. ce1#, ce2# input card enable 1 and 2: c e1# enables even by te accesses, c e2# enables odd by te accesses. mu ltiplexing a0, ce1# and ce2# allows 8- bit hosts to access all data on dq0 - dq 7. oe# input o u tput ena ble: active low signal enabling read data from the memory card. we# input write enable: active low signal gating write data to the memory card. rdy/bsy# output ready/busy output: not used for sram cards cd1#, cd2# output card detect 1 and 2: provide card insertion detection. these signals are connected to ground internally on the memory card. the host socket interface circuitry shall supply 10k-ohm or larger pull-up resistors on these signal pins. wp output write protect: follow s hardw are w rite protect sw itch. w hen switch is placed in on position, signal is pulled high (10k ohm). when switch is off signal is pulled low. vpp1, vpp2 n.c. progra m/erase pow er supply: not used for sram cards. vcc card power supply: 3.3v / 5.0v for all internal circuitry. gnd ground: for all internal circuitry. reg# input attribute memory select : only used with cards built with optional attribute memory. rst input reset: not used for sram cards wait# output wait: this signal is pulled high internally for compatibility. no wait states are generated. bvd1, bvd2 ou tpu t ba ttery vo lta g e detec t: provides status of battery voltage. bvd2 = bvd1 = voh (battery voltage is guaranteed to retain data) bvd2 = vol, bvd1 = voh (data is valid, battery recharge required) bvd2 = bvd1 = vol (data may no longer be valid, battery requires extended recharge) vs1, vs2 output v o lta g e s en s e: notifies the host socket of the card's vc c requirements. vs1 is grounded and vs2 is open to indicate a 3.3v/5v 16 bit card, with a 5v key, has been inserted. rfu reserved for future use n.c. no interna l connection to ca rd: pin may be driven or left floating card signal description sram functional truth table read function common memory attribute memory function mode /ce2 /ce1 a0 /oe /we /reg d15-d8 d7-d0 /reg d15-d8 d7-d0 standby mode h h x x x x high-z high-z x high-z high-z byte access (8 bits) h l l l h h high-z even-byte l high-z even-byte hlhlh hhigh-zodd-bytelhigh-znot valid word access (16 bits) l l x l h h odd-byte even-byte l not valid even-byte odd-byte only access l h x l h h odd-byte high-z l not valid high-z write function standby mode h h x x x x x x x x x byte access (8 bits) h l l h l h x even-byte l x even-byte hlhhl h xodd-bytel x x
november 2001 rev. 1 - eco #xxxx 5 pcmcia sram memory card srv20 series pc card products absolute maximum ratings (2) operating temperature ta (ambient) commercial 0c to +60 c industrial -40c to +85 c storage temperature commercial 0c to +60 c industrial -40c to +85 c voltage on any pin relative to vss -0.5v to +5.5v (1) vcc supply voltage relative to vss -0.5v to +7.0v notes: (1) during transitions, inputs may undershoot to -2.0v or overshoot to vcc +2.0v for periods less than 20ns. (2) stress greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. sym parameter density notes min typ (3) max units test conditions icc vcc active current 2mb to 16mb 1 25 ma vcc = 5.25v tcycle = 150ns iccs vcc standby current all 2, 4 ! < 0.1 < 1 10 ma vcc = 5.25v control signals = vcc ili input leakage current all 5, 6 20 a vcc = vccmax vin =vcc or vss ilo output leakage current all 6 20 a vcc = vccmax vout =vcc or vss vil input low voltage all 6 0 0.8 v vih input high voltage all 6 3.85 vcc +0.5 v vol output low voltage all 6 0.4 v iol = 3.2ma voh output high voltage all 6 vcc-0.4 vcc v ioh = -2.0ma notes: 1. all currents are for x16 mode and are rms values unless otherwise specified. 2. control signals: ce 1 #, ce 2 #, oe#, we#, reg#. 3. typical: vcc = 5v, t = +25c. 4. iccs includes battery recharge current. value depends on battery discharge level. iccs min is specified for fully charged battery. iccs typical value is specified for battery discharge to 2.7v. iccs max is specified for a fully discharged battery (0v). battery will recharge to 1.5v in 20 sec. 5. values are the same for byte and word wide modes for all card densities. 6. exceptions: leakage currents on ce1#, ce2#, oe#, reg# and we# will be < 500 a when vin = gnd due to internal pull-up resistors. cmos test conditions: vil = vss 0.2v, vih = 5v 0.2v dc characteristics (1) battery characteristics srv21-24 parameter density notes type i type ii units conditions battery life all (1) min 10 min 10 years normal operation, t=25c 2mb 18 40 4mb 18 40 8mb 12 30 12mb 10 25 card capacity 16mb (2) 9 20 months (typical) battery backup time is a calculated value and is not guaranteed. this should not be used to schedule battery recharging. (temp 25c) notes: 1. battery life refers to functional lifetime of battery. 2. battery backup time is density and temperature dependent.
november 2001 rev. 1 - eco #xxxx 6 pcmcia sram memory card srv20 series pc card products 5.0v 3.3v sym (pcmcia) parameter min max min max unit t rc read cycle time 150 250 ns t a (a) address access time 150 250 ns t a (ce) card enable access time 150 250 ns t a (oe) output enable access time 75 125 ns t su (a) address setup time 20 30 ns t su (ce) card enable setup time 0 0 ns t h (a) address hold time 20 20 ns t h (ce) card enable hold time 20 20 ns t v (a) output hold from address change 0 0 ns t dis (ce) output disable time from ce# 75 100 ns t dis (oe) output disable time from oe# 75 100 ns t dis (ce) output enable time from ce# 5 5 ns t dis (ce) output enable time from oe# 5 5 ns ac characteristics note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 specifications. read timing diagram note 1 note 1 a[25::0], /reg /ce1, /ce2 /oe d[15::0] tc(r) ta(a) th(a) tv(a) ta(ce) tsu(ce) th(ce) ten(oe) ta(oe) tsu(a) data valid tdis(ce) tdis(oe) note: signal may be high or low in this area. read timing parameters
november 2001 rev. 1 - eco #xxxx 7 pcmcia sram memory card srv20 series pc card products 5.0v 3.3v sym (pcmcia) parameter min max min max unit t c w write cycle time 150 250 ns t w (we) write pulse width 80 150 ns t su (a) address setup time 20 30 ns t su (a-weh) address setup time for we# 100 180 ns t su (ce-weh) card enable setup time for we# 100 180 ns t su (d-weh) data setup time for we# 50 80 ns t h (d) data hold time 20 30 ns t rec (we) write recover time 20 30 ns t dis (we) output disable time from we# 75 100 ns t dis (oe) output disable time from oe# 75 100 ns t en (we) output enable time from we# 5 5 ns t dis (oe) output enable time from oe# 5 5 ns t su (oe-we) output enable setup from we# 10 10 ns t h (oe-we) output enable hold from we# 10 10 ns t su (ce) card enable setup time from oe# 0 0 ns t h (ce) card enable hold time 20 20 ns note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 specifications. write timing diagram write timing parameters th(o e -w e ) note 1 /c e 1 , /c e 2 note 1 tsu (c e -w e h ) tc(w ) a[25::0], /reg tw (w e ) td is(w e ) th(d ) d [1 5 ::0 ](d in ) d a t a in p u t tsu (a ) tsu (a -w e h ) /o e tsu (c e ) tsu(d-weh) trec(w e ) th(c e ) tsu (o e -w e ) td is(o e ) d [1 5 ::0 ](d o u t) ten(oe) ten(w e) note 2 note 2 /w e notes: 1. signal may be high or low in this area. 2. when the data i/o pins are in the output state, no signals shall be applied to the data pins (d15 - d0) by the host system.
november 2001 rev. 1 - eco #xxxx 8 pcmcia sram memory card srv20 series pc card products edi company name lot code / trace number date code part number product marking wed 8p016 srv21 00c15 c995 9915 note: some products are currently marked with our pre-merger company name/acronym (edi). during our transition period, some products will also be marked with our new company name/acronym (wed). starting october 2001 all pcmcia products will be marked only with the wed prefix. card capacity 016 16mb packaging option 00 standard, type 1 pc card pstandard pcmcia r ruggedized pcmcia card family and version - see card family and version info. for details (next page) temperature range c commercial 0c to +70c i industrial -40c to +85c card access time 15 150ns card technology 8sram part numbering 8 p 016srv21 00 c 15
november 2001 rev. 1 - eco #xxxx 9 pcmcia sram memory card srv20 series pc card products 8p xxx srv yy ss t zz where xxx: 002 2mb 004 4mb 006 6mb 008 8mb 012 12mb 016 16mb yy: 21 no attribute memory, no write protect switch 22 with attribute memory, no write protect switch 23 with write protect switch, no attribute memory 24 with attribute memory, with write protect switch ss: 00 wedc sram logo type i 01 blank housing, type i 02 blank housing, type i recessed 03 wedc sram logo, type ii (extended battery backup time) 04 blank housing, type ii (extended battery backup time) 05 blank housing, type ii recessed (extended battery backup time) t: c commercial i industrial zz: 15 150ns ordering information
november 2001 rev. 1 - eco #xxxx 10 pcmcia sram memory card srv20 series pc card products date of revision version description 9-may-01 0 initial release 6-nov-01 1 final release revision history filename: srv20_rev0.ppt white electronic designs corporation one research drive, westborough, ma 01581, usa tel: (508) 366 5151 fax: (508) 836 4850 www.whiteedc.com
|
