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1 ltc1564 1564fa 10khz to 150khz digitally controlled antialiasing filter and 4-bit p.g.a. 4-bit digitally controlled 8th-order lowpass filter ? cutoff adjustable from 10khz to 150khz in 10khz steps 100db attenuation at 2.5 f cutoff 4-bit digitally controlled programmable gain amplifier g = 1 to 16 in 1v/v steps miniature 16-pin ssop package no external components 122db total system dynamic range rail-to-rail input and output range 2.7v to 10v operation low noise mute mode low power shutdown mode available in 16-lead plastic ssop package antialias or reconstruction filtering dsp systems communications systems scientific instruments high resolutions (16 bits to 20 bits) processing signals buried in noise audio signal processing programmable data rates automatic gain control (agc) single part replacing multiple filters low noise programmable filter with variable gain the ltc ? 1564 is a new type of continuous time filter for antialiasing, reconstruction and other band-limiting appli- cations. no other analog components or filter expertise are needed to use it. there is one analog input pin and one analog output pin. the cutoff frequency (f c ) and gain are programmable while the shape of the lowpass response is fixed. a latching digital interface stores f c and gain settings or it can be bypassed for control directly from the pins. the ltc1564 operates from 2.7v to 10v total (single or split supplies) and comes in a 16-pin surface mount ssop. the ltc1564 is a rail-to-rail high resolution 8th-order lowpass filter with two stopband notches, giving approxi- mately 100db attenuation at 2.5 times the passband cutoff frequency f c (a de-facto standard for dsp front ends). signals with low or variable levels can be normalized with the built-in variable gain that reduces input-referred noise with increasing gain for a typical dynamic range (maxi- mum signal level to minimum noise) of 122db (20 equiva- lent bits) with 20khz f c and 118db at 100khz f c on a 5v supply. other frequency-response shapes can be provided upon request. please contact ltc marketing. in agnd v + rst g3 ltc1564 g2 g1 g0 out v C 1234567 1564 ta01 8 16 15 14 13 12 11 gain code frequency code v + and v C supplies can be from 1.35v to 5.25v each tie f and g pins to v + or v C to set frequency and gain dynamic range 118db to 122db at 5v depending on frequency code 0.1 f v + 10 9 en cs/ hold f3 f2 f1 f0 0.1 f analog out analog in v C ltc1564 programmable range frequency (khz) 5 gain (db) 10 100 500 1564 ta02 10 30 20 0 C10 C20 C30 C40 C50 C60 C70 C80 C120 C110 C100 C90 f c = 10khz gain = 1v/v f c = 150khz gain = 16v/v features descriptio u applicatio s u typical applicatio u , ltc and lt are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
2 ltc1564 1564fa g package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 out v C en cs/hold f3 f2 f1 f0 in agnd v + rst g3 g2 g1 g0 parameter conditions min typ max units total supply voltage 2.7 10.5 v supply current v s = 1.35v, v in = 0v 15 17 ma v s = 2.375v, v in = 0v 16 18.5 ma v s = 5v, v in = 0v 22 25 ma output voltage swing r l = 10k to 0v 4.5 4.65 v p-p output short-circuit current v s = 5v 10 ma dc offset voltage magnitude (referred to input) gain = 1, 0 c to 70 c 313 mv gain = 1, C 40 c to 85 c 316 mv gain = 10, 0 c to 70 c 15 mv gain = 10, C 40 c to 85 c 16 mv dc agnd reference voltage v s = single 5v supply 2.5 v passband gain f c = 50khz, f in = 10khz, gain = 1 C 0.1 0.3 0.8 db f c = 50khz, f in = 10khz, gain = 16 23.5 24.2 25.3 db passband ripple f c = 10khz, 0 f in 9khz (notes 2, 3) C0.5 0.5 db f c = 150khz, 0 f in 135khz (notes 2, 3) C 0.6 1.6 db roll off at cutoff frequency (f c ) (note 3) f c = 10khz (f = 0001) C1.2 C0.7 C0.3 db f c = 150khz (f = 1111) C1.5 C0.5 0.6 db roll off at 2f c (note 3) f c = 10khz C67 C63 C59 db roll off at 2.5f c (note 3) f c = 10khz C99 db wideband noise (referred to input) bw = 20khz, f c = 10khz, gain = 1 33 v rms bw = 20khz, f c = 10khz, gain = 16 2.5 v rms bw = 200khz, f c = 100khz, gain = 1 50 v rms total harmonic distortion f c = 100khz, f in = 10khz, v in = 1v rms C86 db (note 1) total supply voltage (v + to v C ) .............................. 11v input voltage ............................. v + + 0.3v to v C C 0.3v output short-circuit duration .......................... indefinite operating temperature range ltc1564c .............................................. 0 c to 70 c ltc1564i .......................................... C 40 c to 85 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number ltc1564cg ltc1564ig t jmax = 125 c, ja = 130 c/ w the denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 2.375v, f c = 10khz, gain = 1, r l = 10k, unless otherwise noted. absolute axi u rati gs w ww u package/order i for atio uu w electrical characteristics consult ltc marketing for parts specified with wider operating temperature ranges. order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/
3 ltc1564 1564fa parameter conditions min typ max units input impedance gain = 1, dc v in = 0v 10 k ? gain = 16, dc v in = 0v 625 ? output impedance f c = 10khz, f = 10khz 30 ? mute state (f = 0000) gain f = 0000, f in = 20khz, v in = 1v rms C103 db mute state output noise f = 0000, bw = 200khz 5.4 v rms shutdown supply current v s = 1.35v, en to v + 45 75 a v s = 1.35v, en to v + 150 a v s = 2.375v, en to v + 100 150 a v s = 2.375v, en to v + 180 a v s = 5v, en to v + (note 4) 175 a digital input high voltage v s = 1.35v 1.08 v v s = 2.375v 1.90 v v s = 5v 4.50 v digital input low voltage v s = 1.35v C1.08 v v s = 2.375v C1.90 v v s = 5v 0.50 v digital input pull-up or pull-down current (note 5) v s = 1.35v 3.5 6 a (digital inputs other than en) v s = 5v 13 20 a digital input pull-up current (en input) v s = 1.35v 12 a v s = 5v 10 20 a the denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 2.375v, f c = 10khz, gain = 1, r l = 10k, unless otherwise noted. electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: response is tested in production at discrete frequencies f in of 0.1, 0.5, 0.8 and 0.9 times f c . note 3: relative to gain at 0.1f c . note 4: all digital inputs driven rail-to-rail. when driving digital inputs with 0v and 5v levels, the shutdown current will increase to 3.5ma (typ). note 5: each digital input includes a small positive or negative current source to float the cmos input to v + or v C potential if it is unconnected. the table shows the current due to this source when the input is driven at the supply voltage opposite from the float potential. pins cs/hold, f3, f2, f0 and g3 to g0 float to the v C voltage, pins rst, en and f1 to the v + voltage. see floatable digital inputs in applications information section. typical perfor a ce characteristics uw overall frequency response (frequency scales normalized to f c ) f in /f c C130 C70 C90 C110 10 0 C10 C30 C50 C80 C100 C120 C20 C40 C60 1564 g01 gain (db) 0.1 10 1 f c = 10khz f c = 150khz f c = 50khz v s = single 5v unity gain (g code 0000) frequency (khz) 5 C10 gain (db) C5 0 5 6.25 7.5 8.75 10 1564 g02 11.25 12.5 C40 c, 25 c, 85 c f c = 10khz single 5v supply frequency (khz) 50 C10 gain (db) C5 0 85 c 5 62.5 75 87.5 100 1564 g03 112.5 125 f c = 100khz single 5v supply C40 c 25 c roll-offs over temperature (f c = 10khz) roll-offs over temperature (f c = 100khz)
4 ltc1564 1564fa typical perfor a ce characteristics uw detail of stopband response passband gain, phase and group delay f c (khz) 10 gain (db) C0.50 C0.25 0 70 110 1564 g04 C0.75 C1.00 30 50 90 130 150 C1.25 C1.50 v s = single 5v t a = 25 c frequency (khz) 15 gain (db) C80 C60 C40 55 1564 g05 C100 C120 C90 C70 C50 C110 C130 C140 25 35 45 65 f c = 10khz v s = 5v t a = 25 c frequency (khz) 2 gain (db) phase (degrees) C15 C5 5 10 1546 g06 C25 C35 C20 C10 0 C30 C40 C45 C270 C90 90 C450 C630 C360 C180 0 C540 C720 C810 delay ( s) 300 400 500 200 100 250 350 450 150 50 0 4 6 8 12 gain f c = 10khz phase group delay passband roll-off at f in = f c vs f c 2v/div 1564 g07 200 s/div output f c = 10khz unity gain v s = 5v input 100 s/div 1564 g08 input, 1v/div (pulse width 10 s) output, 100mv/div f c = 10khz unity gain v s = 5v rectangular pulse response short-pulse response triangular-wave time response snr vs input voltage thd + noise vs input voltage (f c = 10khz) 200 s/div 5v/div 1564 g09 f c = 10khz f in = 1khz unity gain v s = 5v input output input voltage (v p-p ) C80 (thd + noise)/signal (db) C60 C50 C30 C20 0.001 0.1 1 10 1564 g11 C100 0.01 C40 C70 C90 3v supply 5v supply 5v supply f c = 10khz f in = 1khz input voltage (v p-p ) 30 10 signal/noise (db) 50 70 90 110 0.001 0.1 1 10 1564 g10 0 0.01 140 130 20 40 60 80 100 120 gain = 16 f c = 20khz gain = 1 f c = 100khz gain = 1 f c = 20khz gain = 16 f c = 100khz limit for 5v total supply limit for 10v total supply passband input (f in < f c )
5 ltc1564 1564fa typical perfor a ce characteristics uw uu u pi fu ctio s out (pin 1): analog output. in normal filtering, this is the output of an internal operational amplifier and is capable of swinging essentially to any voltage between the power supply rails (that is, between v + and v C ). this output is designed to drive a nominal load of 5k and 50pf. for lowest signal distortion it should be loaded as lightly as possible. the output can drive lower resistances than 5k, but distortion may increase, and the output current will limit at approximately 10ma. capacitances higher than 50pf should be isolated by a series resistor of 500 ? to preserve ac stability. in the mute state (f code 0000 or rst = 0), the output operates as in normal filtering but the gain from the in pin becomes zero and the output noise is reduced. in the shutdown state (en = 1 or en open circuited), most of the circuitry in the ltc1564 shuts off and the out pin assumes a high impedance state. v , v + (pins 2, 14): power supply pins. the v + and v C pins should be bypassed with 0.1 f capacitors to an adequate analog ground plane using the shortest possible wiring. electrically clean supplies and a low impedance ground are important for the high dynamic range and high stopband suppression available from the ltc1564 (see further details under agnd). low noise linear power supplies are recommended. switching supplies are not recommended because of the inevitable risk of their switching noise coupling into the signal path, reducing dynamic range. en (pin 3): cmos-level digital chip enable input. logic 1 or open circuiting this pin causes a shutdown mode with reduced supply current. the active circuitry in the ltc1564 shuts off and its output assumes a high impedance state. if f and g bits are latched (cs/hold = 1) during the shutdown state, the latch will retain its contents. a small pull-up current source at the en input causes the ltc1564 to be in shutdown state if the en pin is left open. therefore, the user must connect the en pin to logic 0 (v C or optionally 0v with 5v supplies) for normal filter operation. cs/hold (pin 4): cmos-level digital enable input for the latch holding f and g bits. logic 0 makes the latch transparent so that the f and g inputs directly control the filters cutoff frequency and gain. logic 1 holds the last values of these inputs prior to the transition. this pin floats to logic 0 (v C ) when open circuited because of a small current source (see electrical characteristics, note 5). f3, f2, f1, f0 (pins 5, 6, 7, 8): cmos-level digital frequency control (f code) inputs. f3 is the most significant bit (msb). these pins program the ltc1564s cutoff frequency f c through the internal latch, which thd + noise vs input voltage (f c = 100khz) input voltage (v p-p ) C80 (thd + noise)/signal (db) C60 C50 C30 C20 0.001 0.1 1 10 1564 g12 C100 0.01 C40 C70 C90 3v supply 5v supply 5v supply f c = 100khz f in = 10khz baseband gain setting 2 1 10 100 4 8 1564 g13 input-referred noise ( v rms ) 1 16 f c = 100khz f c = 10khz frequency (hz) C60 gain (db) C40 C30 C10 10 0.1k 10k 100k 1m 1564 g14 C80 1k C20 C50 C70 0 f c = 10khz v s = 2.5v negative supply v + supply bypass = 0.1 f v C supply bypass = none positive supply v + supply bypass = none v C supply bypass = 0.1 f noise vs frequency and gain settings power supply rejection vs frequency
6 ltc1564 1564fa uu u pi fu ctio s passes the bits directly when the cs/hold input is at logic 0. when cs/hold changes to logic 1, the f pins cease to have effect and the latch holds the previous values. the f code controls the filters cutoff frequency f c in 10khz steps up to 150khz, as summarized in table 1. table 1 f3 f2 f1 f0 nominal f c (at output of internal latch) (cutoff frequency) 0000 0 (m ute state: filter gain is zero) 0001 10khz 0010 20khz 0011 30khz 0100 40khz 0101 50khz 0110 60khz 0111 70khz 1000 80khz 1001 90khz 1010 100khz 1011 110khz 1100 120khz 1101 130khz 1110 140khz 1111 150khz thus f c is proportional to the binary value of the f code. note that small current sources pull f1 to v + and f3, f2 and f0 to v C when these pins are left unconnected (see electrical characteristics, note 5). this sets an f code input of 0010 (2, in decimal form) by default, giving an f c of 20khz in normal filtering operation, if cs/hold is logic 0 or is open circuited. g0, g1, g2, g3 (pins 9, 10, 11, 12): cmos-level digital gain control (g code) inputs. g3 is the most significant bit (msb). these pins program the ltc1564s passband gain through the internal latch, which passes the bits directly when the cs/hold input is at logic 0. when cs/hold changes to logic 1, the g pins cease to have effect and the latch retains the previous input values. this gain control is linear in amplitude: nominal passband gain of the ltc1564 is the binary value of the g code, plus one as shown in table 2. note that small current sources pull the g pins to v C when these pins are left unconnected (see electrical character- istics, note 5). this sets a g code input of 0000 by default, giving unity passband gain in normal filtering operation, if cs/hold is logic 0 or is open circuited. rst (pin 13): cmos-level asynchronous reset input. logic 0 on this pin immediately resets the internal f and g latch to all zeros, regardless of the state of the cs/hold pin or the f or g input pins. this causes the ltc1564 to enter a mute state (powered but with zero signal gain) because of the resulting f = 0000 command. logic 1 permits the other pins to control f and g. this pin floats to logic 1 (v + ) when open circuited because of a small current source (see electrical characteristics, note 5). a brief internal reset (shorter than the analog settling time of the filter) also occurs when power is first applied. nominal nominal g3 g2 g1 g0 passband gain (volts peak-to-peak) input impedance (volt/volt) (db) dual 5v single 5v single 3v (k ? ) 0000 1 0 10 5.0 3.0 10 0001 2 6.0 5 2.5 1.5 5 0010 3 9.5 3.33 1.67 1.0 3.33 0011 4 12 2.5 1.25 0.75 2.5 0100 5 14.0 2 1 0.6 2 0101 6 15.6 1.67 0.83 0.5 1.67 0110 7 16.9 1.43 0.71 0.43 1.43 0111 8 18.1 1.25 0.63 0.38 1.25 1000 9 19.1 1.1 0.56 0.33 1.11 1001 10 20.0 1.0 0.50 0.30 1 1010 11 20.8 0.91 0.45 0.27 0.91 1011 12 21.6 0.83 0.42 0.25 0.83 1100 13 22.3 0.77 0.38 0.23 0.77 1101 14 22.9 0.71 0.36 0.21 0.71 1110 15 23.5 0.67 0.33 0.20 0.66 1111 16 24.1 0.63 0.31 0.19 0.63 (at output of internal latch) maximum input signal level table 2
7 ltc1564 1564fa agnd (pin 15): analog ground. the agnd pin is at the midpoint of an internal resistive voltage divider, develop- ing a potential halfway between the v + and v C pins, with an equivalent series resistance to the pin of nominally 7k. (in the shutdown state, analog switch fets interrupt the voltage-divider resistors and the agnd pin assumes a high impedance.) agnd also serves as the internal half- supply reference in the ltc1564, tied to the noninverting inputs of all internal op amps and establishing the ground reference voltage for the in and out pins. because of this, very clean grounding is recommended, including an uu u pi fu ctio s ltc1564 digital ground plane (if any) analog ground plane 1 single-point system ground 234567 1564 f01 8 16 15 14 13 12 11 0.1 f v + 10 9 0.1 f v C figure 1. dual supply ground plane connection ltc1564 digital ground plane (if any) analog ground plane 1 single-point system ground 234567 1564 f01 8 16 v + /2 reference 15 14 13 12 11 0.1 f 1 f v + 10 9 figure 2. single supply ground plane connection analog ground plane surrounding the package. for dual supply operation, this ground plane will be tied to the 0v point and the agnd pin should connect directly to the ground plane (figure 1). for single supply operation, in contrast, if the system signal ground is at v C , the ground plane should tie to v C and the agnd pin should be ac- bypassed to the ground plane by at least a 0.1 f high quality capacitor (at least 1 f for best ac performance) (figure 2). as with all high dynamic range analog circuits, performance in an application will reflect the quality of the grounding. table 3. summary of ltc1564 digital controls and modes en rst cs/hold f3 f2 f1 f0 g3 g2 g1 g0 function 1 1 1 xxxx xxx x s hutdown mode. filter disabled. latch holds f and g inputs present when last cs/hold = 0 1 1 0 xxxx xxx x s hutdown mode. filter disabled. latch accepts f and g inputs 1 0 x xxxx xxx x s hutdown mode. filter disabled. latch contents (f and g) reset to all zeros 0 1 0 0000 xxxx m ute mode. filter active, zero gain, reduced noise 0 0 x xxxx xxx x m ute mode. filter active, zero gain, reduced noise. latch contents (f and g) reset to all zeros 0 1 1 other than 0000 x x x x normal filtering operation. latch holds f and g inputs present when last cs/hold = 0 0 1 0 other than 0000 x x x x normal filtering operation. filter responds directly to f and g input pins (see separate pin descriptions) x = doesnt matter
8 ltc1564 1564fa i n (pin 16): analog input. the filter in the ltc1564 senses the voltage difference between the in and agnd pins. in normal filtering (en = 0, rst = 1, f code other than 0000), the in pin connects within the ltc1564 to a digitally controlled resistance whose other end is a current-sum- ming point at the agnd potential. at unity gain (g code 0000), the value of this input resistance is nominally 10k and the in voltage range is rail-to-rail (v + to v C ). when filtering at gain settings above unity (g code 0000), the input resistance falls as (1/gain) to nominally 625 ? at a gain of 16 (g code 1111) and the linear input range also falls in inverse proportion to gain. (the variable gain capability is designed to boost lower level input signals with good noise performance.) input resistance does not vary significantly with the frequency-setting f code ex- cept in the mute state (f code 0000). in either the mute state (f code 0000 or rst = 0) or the shutdown state (en = 1 or en open circuited), analog switches disconnect the in pin internally and this pin presents a very high input resistance. circuitry driving the in pin must be compat- ible with the lt1564s input resistance and with the variation of this resistance in the event that the ltc1564 is used in multiple modes. signal sources with significant output resistance may introduce a gain error as the sources output resistance and the ltc1564s input resis- tance form a voltage divider. this is especially true at the higher gain or g code settings where the ltc1564s input resistance is lowest. in single supply voltage applications with elevated gain settings (g code 0000) it is important to keep in mind that the ltc1564s ground reference point is agnd, not v C . with increasing gains, the ltc1564s linear input voltage range is no longer rail-to-rail but converges toward agnd. similarly the out pin swings positive or negative with respect to agnd. at unity gain (g code 0000), both in and out voltages can swing from rail-to- rail. uu u pi fu ctio s block diagra w g3 agnd shutdown switch shutdown switch r v C v + v + in v C en g2 g1 g0 f3 cmos latch variable gain amplifier f2 f1 f0 1564 f03 cs/hold rst out programmable filter r figure 3. block diagram
9 ltc1564 1564fa functional description the ltc1564 is a self-contained, continuous time, vari- able gain, high order analog lowpass filter. the gain magnitude between in and out pins is approximately constant for signal frequency components up to the cutoff frequency f c and falls off rapidly for frequencies above f c . the pins in, out and agnd (analog ground) are the sole analog signal connections on the ltc1564; the others are power supplies and digital control inputs to select f c (and to select gain if desired). the f c range is 10khz to 150khz in 10khz steps. the form of the lowpass frequency re- sponse is an 8-pole elliptic type with two stopband notches (figure 4). this response rolls off by approximately 100db from f c to 2.5f c . the ltc1564 is laser trimmed for f c accuracy, passband ripple, gain and offset. it delivers a combination of 100+db stopband attenuation, 100+db signal-to-noise ratio (snr) and 100+khz f c . digital control logic levels for the ltc1564 digital inputs are nominally rail-to-rail cmos. (logic 1 is v + , logic 0 is v C or alterna- tively 0v with 5v supplies). the part is tested with 10% and 90% of full excursion on the inputs, thus 1.08v at 1.35v supplies, 1.9v at 2.375v and 0.5v and 4.5v at 5v. the f c and gain settings are always controlled by the out- put of an on-chip cmos latch. inputs to this latch are the pins f3 through f0, g3 through g0, the latch-enable con- trol cs/hold and the asynchronous reset input rst. a logic-0 input to cs/hold makes the latch transparent so that the f and g input pins pass directly to the latch outputs and therefore control the filter directly. raising cs/hold to logic 1 freezes the latchs output so that the f and g input pins have no effect. logic 0 at the rst input at any time resets the latch outputs to all zeros. the all-zero state, in turn, imposes a mute mode with zero gain and low output noise if the filter is powered on (en = 0). the all-zeros condition will persist until rst is returned to logic 1, non- zero f and g inputs are set up and the latch outputs are updated by cs/hold = 0. en is a chip-enable input caus- ing a shutdown state. specific details on the digital con- trols appear in the pin functions section of this data sheet. floatable digital inputs every digital input of the ltc1564 includes a small current source (roughly 10 a) to float the cmos input to v + or v C potential if the pin is unconnected. table 4 summarizes the open-circuit default levels. table 4. open-circuit default input levels input floating logic level effect en 1 shutdown state cs/hold 0 f and g pins enabled rst 1 latch not reset f3 f2 f1 f0 0 0 1 0 f c = 20khz g3 g2 g1 g0 0 0 0 0 unity passband gain note particularly that the pull-up current source at the en pin forces the ltc1564 to the shutdown state if this pin is left open. therefore the user must connect en deliberately to a logic-0 level (v C , or optionally 0v with 5v supplies) for normal filter operation. the other digital inputs float to applicatio s i for atio wu uu 100db frequency (hz) gain (db) f c 2.5f c 1564 f04 figure 4. general shape of frequency response figure 3 is a block diagram showing analog signal path, digital control latch, and analog ground (agnd) circuitry. a proprietary active-rc architecture filters the analog signal. this architecture limits internal noise sources to near the fundamental kt/c bounds for a filter of this order and power consumption. the variable gain capability at the input is an integral part of the filter, and allows boosting of low level input signals with little increase in output referred noise. this permits the input noise floor to drop steadily with increasing gain, enhancing the snr at lower signal levels. such a property is difficult to achieve in practice by combining separate variable gain amplifier and filter circuits.
10 ltc1564 1564fa applicatio s i for atio wu uu levels that program the part for enabled f and g pins (cs/hold = 0), 20khz f c and unity passband gain. there- fore six connections (power pins, en to logic 0, agnd, in and out) are enough to set up a working 20khz lowpass filter, and additional pins can be connected as necessary to select different f c or gain. this feature of floatable logic inputs is intended for rapid prototyping and experimentation. floating the logic inputs is not recommended for production designs because, depending on construction details, the high impedances of these inputs may permit unwanted interference cou- pling and consequent erroneous digital inputs to the ltc1564. also, it may be necessary to consider the effect of the pull- up and pull-down current sources on the logic that drives the ltc1564. in particular, if the ltc1564 operates from 5v but receives digital inputs from logic using 5v and 0v, cmos logic levels will be compatible but the possibility exists of the ltc1564 pulling current out of the driving logic at those ltc1564 inputs that are capable of floating to logic 0. that is because the small current sources at these in- puts return to v C , not to 0v. if the driving logic presents a high impedance or three-state output, the ltc1564s in- put current may pull this output below 0v, although the current is limited to about 10 a. the system designer should be aware of this possibility and ensure that any such current flow is compatible with the driving logic. mute state the mute mode keeps the filter powered as in normal filtering but turns off the signal path for minimal signal transmission (approximately C100db) and reduced out- put noise. this feature may be useful for gating a signal source on and off, or for system calibration procedures. note however that the dc output in the mute state may shift by some millivolts compared to normal filtering because the internal signal path changes. recovery from mute, like other transient responses in a filter, proceeds at the time scale of the filters pole-zero time constants and therefore is faster at the higher f c settings (that is, at the higher f codes). the ltc1564 enters the mute state when the f bits at the latch output (figure 3) become 0000. (it can be remem- bered as a zero-bandwidth frequency setting.) this is achieved either by presenting a 0000 code to the f inputs and lowering the cs/hold input to enable the latch, or alternatively at any time by lowering rst, which immedi- ately resets the latch contents to all zeroes. such a reset also occurs normally at the application of power, unless cs/hold is low and a nonzero pattern at the f inputs overrides the brief power-on reset. in the mute state, the g gain-control inputs have no effect. output noise in mute is largely thermal and wideband (unlike in normal filtering, where the filters response affects the noise spectrum). typical mute-state output noise is 5.4 v rms in 200khz measurement bandwidth and less than 3 v rms in 40khz bandwidth. it has occa- sionally happened elsewhere in the electronics industry that someone would characterize a circuit or system by comparing its output level in normal operation to the noise level in a mute state as though this were a normal signal- to-noise ratio (snr), which it is not, because this signal and noise exist only at different times. a scrupulous name for such a measure is smr, signal-to-mute ratio. accord- ingly in a 40khz bandwidth, the ltc1564 can exhibit an smr exceeding 120db. construction and instrumentation cautions electrically clean construction is important in applications seeking the full dynamic range or high stopband rejection of the ltc1564. short, direct wiring will minimize parasitic capacitance and inductance. high quality supply bypass capacitors of 0.1 f near the chip provide good decoupling from a clean, low inductance power source. but several inches of wire (i.e., a few microhenrys of inductance) from the power supplies, unless decoupled by substantial ca- pacitance ( 10 f) near the chip, can cause a high-q lc resonance in the hundreds of khz in the chips supplies or ground reference. this may impair stopband rejection and other specifications at those frequencies. in stringent filter applications we have often found that a compact, carefully laid out printed circuit board with good ground plane makes a difference in both stopband rejection and distor- tion. finally, equipment to measure filter performance can itself introduce distortion or noise floors. checking for these limits with a wire replacing the filter is a prudent routine procedure.
11 ltc1564 1564fa typical applicatio s u 16-bit output, sampling rate to 500ksps, analog bandwidth to 150khz, gain to 24db. (for more information, see linear technology magazine, may 2001) 2-chip flexible dsp front end with amplification, antialias filtering and a/d conversion boosting a 100mv rms input signal to nearly fill the input range of the ltc1608 adc. input frequency of 40khz, ltc1608 f sample = 204.8ksps, ltc1564 is set for f c = 50khz and gain of 16 (f = 0101, g = 1111). measured thd is 86db, hd 2 = 88db, snr = 85db with 100mv rms input. dynamic range of approximately 115db 4096-point fft spectrum with low level input frequency (khz) 0 C60 C40 0 76.8 1564 ta04 C80 C100 25.6 51.2 102.4 C120 C140 C20 amplitude (db) 2.2 f 1 f 1 f 10 ? 22 f 4 6 differential analog input 2.5v refcomp control logic and timing b15 to b0 16-bit sampling adc C + 1 f 5v or 3v p control lines d15 to d0 output buffers 16-bit parallel bus 11 to 26 ognd ov dd 28 1564 ta03 29 1 2 a in + a in C shdn cs convst rd busy 33 32 31 30 27 7.5k ltc1608 3 36 35 10 9 5v 5v av dd av dd dv dd dgnd v ref 8 agnd agnd 7 agnd 5 agnd 34 C5v v ss 1 f 2.5v ref 1 f 1.75x + v + en v C out agnd in 16 cs/ hold rst f 4 5 6 7 8 9 10 11 12 15 1 2 3 14 13 g ltc1564 5v C5v 0.1 f 0.1 f 249 ? 1% metal film 249 ? 1% metal film c1* filter control antialias filter/amp adc a v f c input + C *c1 is a 1000pf npo, surface mount device place as close as possible to the ltc1608 input pins a v information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12 ltc1564 1564fa ? linear technology corporation 2001 lt/tp 0905 rev a ? printed in usa related parts u package descriptio g package 16-lead plastic ssop (5.3mm) (reference ltc dwg # 05-08-1640) typical applicatio s u in agnd v + rst g3 ltc1564 g2 g1 g0 out v C 1234567 1564 ta05 8 16 6 7 2 3 r source 10k 4 v source v in 15 14 13 12 11 gain code frequency code v + supply from 2.7v to 10.5v tie f and g pins to v + or ground to set frequency and gain 0.1 f 1 f v + 0.1 f v + 10 9 en cs/ hold f3 f2 f1 f0 v out + C + lt1677 single supply, very low noise input buffer for high impedance source driving the input of ltc1564 single supply differential output driver in agnd v + rst g3 ltc1564 g2 g1 g0 out v C 1234567 1564 ta06 8 2.49k 16 15 14 13 12 11 gain code frequency code v + supply from 4.5v to 10.5v tie f and g pins to v + or ground to set frequency and gain. outputs drive 100 ? /1000pf loads 0.1 f 1 f v in v + 10 9 en cs/ hold f3 f2 f1 f0 2.49k 6 5 4 7 v out C 2.49k 2.49k C + 1/2 lt1813 2 8 v + 3 1 0.1 f v out + 2.49k C + 1/2 lt1813 part number description comments ltc1560-1 1mhz/500khz continuous time, lowpass elliptic filter f cuttoff = 500khz or 1mhz ltc1562/ltc1562-2 universal 8th order active rc filters f cutoff(max) = 150khz (ltc1562), f cutoff(max) = 300khz (ltc1562-2) ltc1563-2/ltc1563-3 4th order active rc lowpass filters f cutoff(max) = 256khz ltc1565-31 650khz continuous time, linear phase lowpass filter 7th order, differential inputs and outputs ltc1566-1 2.3mhz continuous time lowpass filter 7th order, differential input and outputs ltc1569-6/ltc1569-7 self clocked, 10th order linear phase lowpass filters f clk /f cutoff = 64/1, f cutoff(max) = 75khz (ltc1569-6), f clk /f cutoff = 32/1, f cutoff(max) = 300khz (ltc1569-7) linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com 7.40 C 8.20 (.291 C .323) 1234 5 6 7 8 5.90 C 6.50* (.232 C .256) 14 13 12 11 10 9 15 16 g16 ssop 0204 2.0 (.079) max 0.05 (.002) min 0.65 (.0256) bsc 0.22 C 0.38 (.009 C .015) typ 0.09 C 0.25 (.0035 C .010) 0 C 8 0.55 C 0.95 (.022 C .037) 5.00 C 5.60** (.197 C .221) millimeters (inches) note: 1. controlling dimension: millimeters 2. dimensions are in dimensions do not include mold flash. mold flash shall not exceed .152mm (.006") per side dimensions do not include interlead flash. interlead flash shall not exceed .254mm (.010") per side * ** 3. drawing not to scale 0.42 0.03 0.65 bsc 5.3 C 5.7 7.8 C 8.2 recommended solder pad layout 1.25 0.12

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