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pws750 1 pws750-3u pws750-2u 4 3 4 1 6 3 2 5 6 7 0.3? 0.3? 10 w ? o +v o s d g s d g 2n7002 or 2n7008 2n7002 or 2n7008 0.3? driver soft start oscillator r 1 t 16 t 0.3? comparator differential amplifier +v +v in 7 3 11 10? pws750-1u ttl out ttl in enable v d input gnd 12 14 10 (2) (2) (1) 10 w (1) 10 w (3) 10 w (3) reference s (1) output ground the pws750-2u and PWS750-4U are split-bobbin wound isolation transformers using a ferrite core. they are encapsulated in plastic packages, allowing a high isolation voltage rating. the pws750-3u is a high-speed monolithic diode bridge in a plastic 8-pin so package. one pws750-1u can be used to drive up to four channels (15v nominal operation). one pws750-2u and pws750-3u and two 2n7002 (surface mount) or 2n7008 (to-92) mosfets made by siliconix are used per isolated channel. when a PWS750-4U is used as the transformer (5v input), then two tn0604s made by supertex must be used, due to the higher currents of the primary (lower rds on) and the lower v gs threshold. with 5v operation only one channel can be directly driven by the pws750-1u (a simple fet booster circuit can be used for multichannel operation; see figure 3). isolated, unregulated dc/dc converter components pws750 description the pws750 consists of three building blocks for building a low cost dc/dc converter. with them you can optimize dc/dc converter pc board layout or build a multichannel isolated dc/dc converter. all parts are surface mount, requiring minimal space to build the converter. the modular design minimizes the cost of isolated power. the pws750-1u is a high-frequency (800khz nomi- nal) driver that can drive n-channel mosfets up to the size of a 1.3a 2n7010. the recommended mosfet for individual transformer drivers is the 2n7008. the pws750-1u is supplied in a 16-pin double-wide so package. applications l industrial process control equipment l ground-loop elimination l pc-based data acquisition l vending machines features l 100% tested for high-voltage breakdown l compact-surface mount l multichannel operation l 5v or 15v input options l flexible use with pws740/pws745 components pws750 single-channel connection typical connection for internal oscillator operation notes: (1) user option. (2) use tn0604 for 5v to 15v operation. (3) multichannel operation. duplicate for multichannel operation with pws750-2u. ? 1988 burr-brown corporation pds-838f printed in u.s.a. april, 1997 international airport industrial park ? mailing address: po box 11400, tucson, az 85734 ? street address: 6730 s. tucson blvd., tucson, az 85706 ? tel: (520) 746-1111 ? twx: 910-952-1111 internet: http://www.burr-brown.com/ ? faxline: (800) 548-6133 (us/canada only) ? cable: bbrcorp ? telex: 066-6491 ? fax: (520) 889-1510 ? immediate product info: (800) 548-6132
2 pws750 specifications electrical at t a = 25 c; +v in = +15v; and i out = 15ma balanced loads, unless otherwise noted. parameter conditions min typ max units pws750-1u oscillator frequency: internal osc ttl in = 0v 725 800 875 khz external osc 1 2.5 mhz supply: 15v operation 10 15 18 v 5v operation 4.5 5 5.5 v t, t drive current 50 mapk t, t drive voltage, high 37v low 0.7 v ttl in , i ih 10 na i il C1 m a v ih 2v v il 0.8 v ttl out , i ol 15 ma pws750-2u +v in to v out isolation transformer isolation voltage rated continuous ac 60hz 750 vrms 100% test (1) 60hz, 1s, <5pc pd 1200 vrms barrier impedance 10 12 || 8 w || pf leakage current at 60hz v iso = 240vrms 1 1.5 m arms winding ratio primary/secondary 48/48 pws750-3u diode bridge reverse recovery i f = i r = 50ma 40 ns reverse breakdown i r = 100 m a55 v reverse current v r = 40v 1.5 m a forward voltage i f = 100ma 1.8 v PWS750-4U +5v in to 15v out isolation transformer isolation voltage rated continuous ac 60hz 750 vrms 100% test (1) 60hz, 1s, <5pc pd 1200 vrms barrier impedance 10 12 || 8 w || pf leakage current at 60hz v iso = 240vrms 1 1.5 m arms winding ratio primary/secondary 24/70 temperature range specification 0 +70 c operating derated performance C40 +85 c storage C40 +85 c notes: (1) tested at 1.6 x rated, fail on 5pc partial discharge leakage current on five successive pulses at 60hz. the information provided herein is believed to be reliable; however, burr-brown assumes no responsibility for inaccuracies or omissions. burr-brown assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. prices and specifications are subject to change without notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any third party. burr-brown does not authorize or warrant any burr-brown product for use in life support devices and/or systems.
pws750 3 8 7 6 4 3 2 1 14 5 t v d +v in 16 15 13 12 11 10 9 16-pin so double-wide surface mount enable gnd ttl out ttl in t pws750-1u pin configurations ac 4 3 2 1 5 6 7 8 ac +v Cv 8-pin so surface mount pws750-3u 5 pws750-2u PWS750-4U 8-pin dip surface mount 6 8 7 1 2 3 4 nc ac gnd ac nc t o v d t o absolute maximum ratings supply voltage ..................................................................................... 18v junction temperature ...................................................................... 150 c storage temperature ........................................................ C40 c to +85 c lead temperature (soldering, soic, 3s) ........................................ +260 c max load, sum of both outputs (pws750-2u, 4u) ......................... 60ma pws750-xu basic model number components 1u : high-frequency driver 2u, 4u : isolation transformer 3u : high-speed monolithic diode bridge ordering information package information package drawing product package number (1) pws750-1u 16-pin soic 211 pws750-2u 8-pin plastic 226 pws750-3u 8-pin so 182 PWS750-4U 8-pin plastic 226 note: (1) for detailed drawing and dimension table, please see end of data sheet, or appendix c of burr-brown ic data book.
4 pws750 typical performance curves t a = +25 c, v in = 15vdc, i load = 15ma unless otherwise noted. PWS750-4U line regulation 5.3 5.2 5.1 5 4.9 4.8 4.7 14 15 16 17 ? (v) out input (v) 4.6 5.4 13 18 pwr750-2u line regulation 16 14 12 10 10 12 14 16 ? (v) out input (v) 18 18 pwr750-2u and pws70-4u load lines 10 15 20 0 5 10 15 20 25 30 ? (v) out load (ma) pws750-2u PWS750-4U output ripple voltage 50 40 30 20 10 0 0.2 0.4 0.6 0.8 1 filter capacitance (?) ripple voltage (mvp-p) ripple frequency = oscillator frequency 0.1 efficiency/load curve 80 70 60 50 40 30 0 5 10 15 20 25 30 efficiency (%) PWS750-4U 4 channel pws750-1u pws750-2u load current (?a) ttl signal duty cycle in 100 75 50 25 0 % duty cycle 1 1.5 2 2.5 synchronization frequency (mhz) (= twice the fet drive frequency) dc = % t h t + t h l t h t l acceptable duty cycle nominal operating frequency synchronization frequency (mhz) (= twice the fet drive frequency)
pws750 5 theory of operation the pws750 components are basic building blocks to be used with other standard components to build an isolated push-pull dc/dc converter. the oscillator runs at 800khz nominal, making it possible to reduce the size of the trans- former and lower the output ripple voltage. pws750-1u oscillator pin functions ttl in is used to control the driver frequency with an external ttl level frequency source. the input frequency must be twice the desired driver frequency, since there is an internal divide-by-2 circuit to produce a 50% duty cycle output. the input duty cycle can vary from 12% to 95% (see typical performance curves). when in the free running mode, the ttl in pin must be tied to ground. ttl out is used when it is desired to synchronize the outputs of multiple pws750-1us to minimize beat frequency prob- lems. a standard open collector output is provided, therefore a 330 w to 3.3k w pull-up resistor will be necessary depend- ing on stray capacitance on the sync line. a maximum of eight pws750-1us can be connected without the use of an external ttl buffer. an enable pin is provided so that the driver (t, t) can be shut down to minimize power use if required. a ttl low applied to the pin will shut down the driver within one cycle. a ttl high will enable the driver within one cycle. the ttl out will still have an 800khz signal when a master driver is disabled, so other synchronized drivers will not be shut down. the pin can be left open for normal operation. the +v in pin supplies power to the oscillator. the v d pin connects the power to the transformer through the internal overcurrent sense resistor. the other end of the overcurrent sense resistor is tied to +v in . a 0.3 m f bypass capacitor must be connected to the v d pin to reduce the ripple current through the shunt resistor; otherwise false current limit conditions can occur due to ripple voltage peaks. typical performance curves (cont) t a = +25 c, v in = 15vdc, i load = 15ma unless otherwise noted. during overload conditions the output drive shuts off for approximately 80 m s, then turns back on for 20 m s, resulting in a 25% power up duty cycle. if the overload condition still exists, then the output will shut off again. when the fault or the excessive load is removed, the converter resumes normal operation. the t and t pins are the complementary fet drive outputs and are tied directly to the corresponding fet gate. the connection must be as short as possible. for multiple chan- nel operation they cannot be located above any ground or power planes, because capacitive loading will not allow fast enough charging of the fet gate. pws750-2u and PWS750-4U transformer pin functions on the primary side the v d pin of the pws750-2u is tied directly to the v d pin of the pws750-1u. remember to place a 0.1 m f capacitor as close to the pws750-2u v d pin as possible. the t o and t o pins are connected to the drains of the corresponding fets, whose sources are connected to ground. on the secondary side of the transformer, the gnd pin is tied directly to the isolated ground. ac pins are 800khz square wave signals at twice the output voltage, and are connected directly to the corresponding pin on the pws750-3u. pins 2 and 4 can be interchanged for ease of hook up. the connection to the diode bridge must be as direct as possible to minimize radiated noise. the winding ratio for the pws750-2u is 1:1. this means that the output would normally be less than the input due to voltage drops in the fets, transformer and diode bridge. since the dc/dc converter is operating at 800khz, the transformer is starting to operate close to the resonant frequency, which causes the output to increase in magni- tude. output voltage drift with a ?5ma load 15.5 15.25 15 14.75 14.5 ?5 0 25 50 75 100 temperature (?) v (v) out ttl in frequency (mhz) 1.5 1.6 2 1 16 15 ? out (v) the output voltage can be adjusted ?% by varying the driver frequency 14 15.5 14.5
6 pws750 +v in figure 1. sample pc board layout, 4:1.
pws750 7 6 5 7 pws750-2u 2 3 4 3 6 pws750-3u 4 1 output gnd 0.3? ? o +v o duplicate for up to 8 channels user option 10? 0.3? input gnd 14 12 10 en ttl in ttl out pws750-1u 1 g 16 d s 56 2n7002 t t 3 7 11 v d in +v +v w g d s 56 2n7002 w g d s 2n7002 g d s 2n7002 0.3? 0.3? pws750-3u high speed diode bridge pin functions the ac pins are tied directly to the ac pins of the pws750- 2u. the +v and Cv pins are rectified output voltages. the filter capacitors must be located as close as possible to these pins to minimize series inductance and therefore noise. bypass capacitors will be needed at each device in the circuit. basic operation single channel operation, pc board layout considerations a simple two-layer board can be used on single channel applications to create a dc/dc converter with low radiated noise. a ground plane should be located directly under both the input and the output components for optimum ground return paths. the surface mount components make it easy to design with a ground plane. the output filter capacitors should be located as close to the pws750-3u as possible. a sample layout is shown in figure 1. for multiple channel applications, t and t traces must have minimum capacitive loading. therefore, there should be no ground plane (or power plane) under these two traces. the driver signal is a 4-6v low current 800khz signal, which will generate little radiated noise if the traces are kept short. multiple channel operation the oscillator can drive up to four-channels (eight fets) directly when operating at 10-18v. a 10 w resistor must be placed in series with t and t to stabilize the fet gate charging. for more than four-channel operation, or 5v- multiple-channel operation, the driver circuit needs a fet booster circuit, as shown in figure 2. large gate drive surge currents (>100ma) are needed to turn on the gates. if the total output current drawn by all the channels exceeds 250ma, then it will be necessary to circumvent the current limit circuit by leaving the v d pin of the pws750-1u open, and connect the v d pin of the pws750-2u directly to the supply. 5v operation with 5v operation, the transformer winding current ratio is 3:1, therefore generating much greater currents in the pri- mary. the input ripple voltage will be larger, so an input pi filter will be necessary to isolate the converter noise from the rest of the circuit. for example, when the output is 15ma the input current will be at least 120ma. mosfet max drive current package breakdown tn0604 4a to-92 40v 2n7002 115ma so-t23 60v 2n7008 500ma to-92 60v 2n7010 1.3a to-237 60v 2n7012 1.2a 4-pin dip 60v table i. mosfet selector guide. figure 2. mosfet driver booster circuits.
8 pws750 2n7008, 8ea. pws750-2u pws750-2u iso122p pws750-3u 2 3 4 7 6 5 3 6 1 4 2 1 10 9 7 8 v out 1? 16 0.33 f m 10? +v in +v in 15 7 3 1 16 2 1 10 9 8 v out 16 +v in 15 1 4 1 4 2 1 10 9 7 7 10 9 2 1 8 16 15 8 16 15 v out +v in pws750-1u +v in v out 11 14 iso122p iso122p iso122p 7 1 4 3 6 2 3 4 7 6 5 pws750-3u pws750-2u pws750-2u pws750-3u 2 3 4 7 6 5 3 6 1 4 1 4 3 6 2 3 4 7 6 5 pws750-3u 1? output current rating the pws750-1u oscillator contains soft start circuitry to protect the fets from high inrush currents during turn on. the internal input current limit is 250ma peak to prevent thermal overload of the mosfets. the maximum output rating is 30ma. total current, which can be drawn from each isolation channel, is the total of the power being drawn from both the +v and Cv outputs. for example, if one output is not used, then maximum current can be drawn from the other output. in all cases the maximum current that can be drawn from any individual channel is: |+i out | + |Ci out | < 60ma it should be noted that many analog circuit functions do not simultaneously draw equal current from both the positive and negative supplies. when multiple channel operation is used, the maximum current of all channels must be reduced to prevent the overcurrent limit to trip. alternately, bypass the overcurrent by leaving the v d pin of the pws750-1u open and connect- ing the v d pin of the pws750-2u directly to the supply. high voltage testing burr-brown corporation has adopted a partial discharge test criterion that conforms to the german vde0884 optocou- pler standard. this method requires that less than 5pc partial discharge crosses the isolation barrier with 1200vrms 60hz applied. this criterion confirms transient overvoltage (1.5 x 750vrms) protection without damage to the pws750-2u or PWS750-4U. life test results verify the absence of high voltage breakdown under continuous rated voltage and maxi- mum temperature. figure 3. four-channels of 10v signal isolation with channel-to-channel isolation.
pws750 9 v ?0v in 15 1 2 16 power for input signal conditioning circuitry 0.3? 0.3? 4 1 6 8 10 9 v ?0v out 0.3? power for output circuitry 0.3? 1 4 iso122p 7 d pws750-3u s 5 6 7 4 d s 3 2 tno604 10? pws750-1u +v in v d 7 3 11 input gnd 14 16 t 0.3? 0.3? d pws750-3u s 5 6 7 4 d s 3 2 PWS750-4U 3 6 3 5v tno604 tn0604 tn0604 PWS750-4U 1 t 180ma 3 turns pws750-1u 7 3 11 14 1 tno604 d s g 47pf gnd 0.3? +5v 1? 16 19 15 14 pws726 41 30 32 ? o +v o v d ttl in ? t h7f to7-14-3.5 the minimum ac barrier voltage that initiates partial dis- charge above 5pc is defined as the inception voltage. decreasing the barrier voltage to a lower level is required before partial discharge ceases; this is known as extinction voltage. we have developed a package insulation system to yield an inception voltage greater than 1200vrms so that transient voltages below this level will not damage the isolation barrier. the extinction voltage is above 750vrms so that even overvoltage-induced partial discharge will cease once the barrier voltage is reduced to the rated value. previous high voltage test methods relied on applying a large enough overvoltage (above rating) to break down marginal units, but not so high as to permanently damage good ones. our partial discharge testing gives us more confidence in barrier reliability than breakdown/no break- down criteria. figure 5. a pws750 driver can be used to boost the input voltage to 15v to power a pws726 from a 5v supply. figure 4. a complete 10v signal acquisition system operating from a single 5v supply.
10 pws750 1 4 d s 10? pws750-1u +v in v d 7 input gnd 14 1 t 0.3? pws750-3u 4 5 3 2 1 pws740-2 0.3? 6 3 g 6 2n7008 0.3? output gnd +v o o ? d s 16 g 2n7008 3 11 v ?0v in ? +v power for input signal conditioning circuits 1 4 2 3 22 24 21 iso103 12 16 14 10 v ?0v out 0.3? 1 4 d s 5 6 72 d s 4 3 tn0604 10? pws750-1u +v in v d 7 3 11 input gnd 14 16 1 0.3? 0.3? pws750-3u s d s PWS750-4U 0.3? 6 3 5v tn0604 tn0604 tn0604 PWS750-4U d g g g g 1 4 pws750-3u 6 3 0.3? +v o ? o 11 6 7 2 4 3 5 figure 6. powering the internally powered iso103 isolation buffer from a single 5v supply. two power channels are necessary to provide the 80ma nominal for the +v of the iso103. figure 7. 1500vac isolation using pws740-2 transformer.
pws750 11 ttl 6, 7 8 12 13 in 45 t t pws740-3 pws750-3 0.3? v in 20? pws745-1 5v 11 16 1 2, 3 14, 15 v in1 ac gnd ac 36 pws745-2 pws740-2 pws750-2 gnd1 14 20k w 20pf +v s1 ? s1 iso120 23 21 v+ v 15 12 16 11 10 v out1 9 22 ext osc 4 24 3 0.3? pws740-3 pws750-3 v in2 ac gnd ac 36 pws745-2 pws740-2 pws750-2 gnd2 14 20k w 20pf +v s2 t o iso120 23 21 22 ext osc 4 24 3 0.3? 10? v+ up to 6 more channels v+ v 15 12 16 11 10 v out2 9 v d t o t o v d t o 0.3? 0.3? 0.3? 0.3? v v+ ac ac v v+ ac ac 1 4 d s d s 10? pws750-1u +v in v d 7 3 11 input gnd 14 t 1 t 16 0.3? pws750-3u 5 6 4 3 2 pws750-2u 0.3? 6 3 g g 7 2n7010 0.3? output gnd +v o o ? duplicate for up to 8 channels 2n7010 figure 8. fet pair driving up to eight-channels. figure 9. synchronized-multichannel isolation system.

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