View FDC6301N01_3499576.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

se p te mb er 20 01 f dc6 301 n dual n -channel , digital fet general description features absolute maximum ratings t a = 25 o c unless other wise noted symbol parameter f dc6 301 n units v dss , v cc drain-source voltage, power supply voltage 25 v v gss , v in gate-source voltage , v in v i d , i out drain/output current - continuous 0.22 a - pulsed 0.5 p d maximum power dissipation ( note 1a ) (note 1b ) 0.9 w 0.7 t j ,t stg operating and storage temperature range -55 to 150 c esd electrostatic discharge rating mil-std-883d human body model (100pf / 1500 ohm) 6 .0 kv thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a ) 140 c/w r q jc thermal resistance, junction-to-case (note 1) 60 c/w fdc6301n rev. d 25 v, 0.22 a continuous, 0.5 a peak. r ds(on) = 5 w @ v gs = 2.7 v r ds(on) = 4 w @ v gs = 4 .5 v. very low level gate drive requirements allowing direct operation in 3v circuits. v gs(th) < 1.5v. gate-source zener for esd ruggedness . >6 kv human body model. these dual n -c hannel logic level enhancement mode field effect transistors are produced using fairchild 's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance. this device has been designed especially for low voltage applications as a replacement for digital transistors. since bias resistors are not required, these n-c hannel fet's can replace several digital transistors, with a variety of bias resistors. d s g in gnd vcc inverter application out mark: .301 1 5 4 2 3 6 sot-23 supersot t m -8 soic-16 so-8 sot-223 supersot t m -6 ? 20 01 fairchild semiconductor corporation - 0 . 5 to +8
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 25 v d bv dss / d t j breakdown voltage temp. coefficient i d = 250 a , referenced to 25 o c 25 mv / o c i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v 1 a t j = 5 5c 10 a i gss gate - body leakage current v gs = 8 v, v ds = 0 v 100 na on characteristics (note 2) d v gs(th) / d t j gate threshold voltage temp.coefficient i d = 250 a , referenced to 25 o c -2.1 mv / o c v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 0.65 0.85 1.5 v r ds(on) static drain-source on-resistance v gs = 2.7 v, i d = 0.2 a 3.8 5 w t j =12 5c 6.3 9 v gs = 4.5 v, i d = 0.4 a 3.1 4 i d(on) on-state drain current v gs = 2.7 v, v ds = 5 v 0.2 a g fs forward transconductance v ds = 5 v, i d = 0.4 a 0.25 s dynamic characteristics c iss input capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz 9.5 pf c oss output capacitance 6 pf c rss reverse transfer capacitance 1.3 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = 6 v, i d = 0.5 a, v gs = 4.5 v, r gen = 50 w 5 10 ns t r turn - on rise time 4.5 10 ns t d(off) turn - off delay time 4 8 ns t f turn - off fall time 3.2 7 ns q g total gate charge v ds = 5 v, i d = 0.2 a, v gs = 4.5 v 0.49 0.7 nc q gs gate-source charge 0.22 nc q gd gate-drain charge 0.07 nc inverter electrical characteristics (t a = 25c unless otherwise noted) i o (off) zero input voltage output current v cc = 20 v, v i = 0 v 1 a v i (off) input voltage v cc = 5 v, i o = 10 a 0.5 v v i (on) v o = 0.3 v, i o = 0.005 a 1 v r o (on) output to ground resistance v i = 2.7 v, i o = 0.2 a 3.8 5 w notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. r q ja shown below for single device operation on fr-4 in still air. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. fdc6301n rev. d b. 180 o c/w on a 0.005 in 2 of pad of 2oz copper. a . 140 o c/w on a 0.125 in 2 pad of 2oz copper.
fdc6301n rev. d 0 1 2 3 4 5 0 0.1 0.2 0.3 0.4 0.5 v , drain-source voltage (v) i , drain-source current (a) 3.5 2.7 2.5 2.0 1.5 ds d 3.0 v = 4.5v gs 0 0.1 0.2 0.3 0.4 0.5 0.6 0.8 1 1.2 1.4 i , drain current (a) drain-source on-resistance v = 2.0v gs 2.7 3.0 4.0 4.5 d 3.5 2.5 r ds(on ) , normalized typical electrical characteristics figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 1.8 t , junction temperature (c) drain-source on-resistance j v = 2.7 v gs i = 0.2a d r , normalized ds(on) figure 3. on-resistance variation with temperature . 0.5 1 1.5 2 2.5 0 0.05 0.1 0.15 0.2 v , gate to source voltage (v) i , drain current (a) 25c 125c v = 5.0v ds gs d t = -55c j figure 5 . transfer characteristics. 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 0.2 0.5 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v = 0v gs sd s figure 6 . body diode forward voltage varia tion with source current and temperature. 2 2.5 3 3.5 4 4.5 5 0 3 6 9 12 15 v , gate to source voltage (v) i = 0.2a gs r , on-resistance (ohm) ds(on) 125c 25c d figure 4 . on resistance variation with gate-to - source voltage.
fdc6301n rev. d typical electrical characteristics (continued) figure 9 . maximum safe operating area. 0 0.1 0.2 0.3 0.4 0.5 0.6 0 1 2 3 4 5 q , gate charge (nc) v , gate-source voltage (v) g gs i = 0.2a d 15v v = 5v ds 10v figure 7 . gate charge characteristics . 0.5 1 2 5 10 15 25 35 0.01 0.02 0.05 0.1 0.2 0.5 1 v , drai n-source voltage (v) i , drain current (a) ds d dc 1s 100ms 1ms rds(on) limit v = 2.7v single pulse r =see note 1b t = 25c gs a q ja 10ms 0.01 0.1 1 10 100 300 0 1 2 3 4 5 single pulse time (sec) power (w) single pulse r =see note 1b t = 25c q ja a figure 10 . single pulse maximum power dissipation. 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 r(t), normalized effective duty cycle, d = t / t 1 2 r (t) = r(t) * r r = see note 1b q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 figure 11 . transient thermal response curve . note: thermal characterization performed using the conditions described in note 1b .transient thermal response will change depending on the circuit board design. 0.1 0.5 1 2 5 10 25 1 2 3 5 10 20 30 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 8 . capacitance characteristics .

!"#$%"&'(%& %)'"%&'!%*$%('((!'&$$% "'+'%,'*- %& ''.$'- '($$%+!% !"'*%("&%%$%%(
/ 0 ! 11 2 2 345

1

23 45 11
3 45 1
1 1 2

1

3

21

6 2 7 1

21

11 2 1

21 11 23 2

$
2 (

( %

1
1 1
1
2

2

1
23
11
2 1

2

1

1

2

1

1

1

2
1

2
"
$
$
(
$

! " !

#$ !$
%

$& ' ()!!
*!
* + ,$

" !

%

- $ "
./ "
.0 "
.1 2

2,
"
$!$ 8$%-'

3% 3$
45

▲Up To Search▲

Price & Availability of FDC6301N01

	To Download FDC6301N01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .