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? semiconductor components industries, llc, 2009 october, 2009 ? rev. 1 1 publication order number: lmv821/d lmv821, lmv822, lmv824 single, dual, quad low voltage, rail-to-rail operational amplifiers the lmv821, lmv822, and lmv824 are operational amplifiers with low input voltage offset and drift vs. temperature. in spite of low quiescent current requirements these devices have 5 mhz bandwidth and 1.4 v/ s slew rate. in addition they provide rail ? to ? rail output swing into 600 loads. the input common ? mode voltage range includes ground, and the maximum input offset voltage is only 3.5 mv. substantially large capacitive loads can be driven by simply adding a pullup resistor or isolation resistor. the lmv821 (single) is available in a space ? saving sc70 ? 5 while the dual and quad also come in ultra small soic and tssop packages. features ? low offset voltage: 3.5 mv ? very low offset drift: 1.0 v/ c ? high bandwidth: 5 mhz ? rail ? to ? rail output swing into a 600 load ? capable of driving highly capacitive loads ? these devices are pb ? free and are rohs compliant typical applications ? notebook computers ? pdas ? modem transmitter/ receivers figure 1. gain vs. frequency figure 2. cmrr vs. input common mode voltage 30 40 50 60 70 80 ? 1012345 input common mode voltage (v) cmrr (db) v s = 5 v ? 20 ? 10 0 10 20 30 40 50 60 70 80 1k 10k 100k 1m 10m gain (db) frequency (hz) v s = 5 v, r l = 100 k http://onsemi.com sc ? 70 case 419a see detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. ordering and marking information micro8 case 846a soic ? 14 case 751a tssop ? 14 case 948g 1 1 1 soic ? 8 case 751 1 8 1
lmv821, lmv822, lmv824 http://onsemi.com 2 marking diagrams aaem aae = specific device code m = date code = pb ? free package pin connections (top view) sc70 ? 5 +in v ? ? in v + output ? + 2 1 3 5 4 lmv 824 alyw 1 14 lmv824 = specific device code a = assembly location l = wafer lot y = year w = work week = pb ? free package v822 = specific device code a = assembly location y = year w = work week = pb ? free package v822 ayw 1 8 lmv824g awlyww 1 14 lmv824 = specific device code a = assembly location wl = wafer lot y = year ww = work week g = pb ? free package out a 1 2 3 4 ? + + ? 8 7 6 5 in a ? in a+ v ? v+ out b in b ? in b+ a b micro8/soic ? 8 1 2 3 4 5 6 7 14 13 12 11 10 9 8 ? + a + ? d ? + + ? b c out a in a ? in a+ v+ in b+ in b ? out b out d in d ? in d+ v ? in c+ in c ? out c soic ? 14 1 2 3 4 5 6 7 14 13 12 11 10 9 8 ? + a + ? d ? + + ? b c out a in a ? in a+ v+ in b+ in b ? out b out d in d ? in d+ v ? in c+ in c ? out c (top view) (top view) (top view) v822 alyw 1 8 v822 = specific device code a = assembly location l = wafer lot y = year w = work week = pb ? free package sc ? 70 soic ? 14 tssop ? 14 micro8 soic ? 8 (note: microdot may be in either location) (note: microdot may be in either location) (note: microdot may be in either location) (note: microdot may be in either location) tssop ? 14
lmv821, lmv822, lmv824 http://onsemi.com 3 maximum ratings symbol rating value unit v s supply voltage (operating range v s = 2.7 v to 5.5 v) 5.5 v v idr input differential voltage supply voltage v v icr input common mode voltage range ? 0.5 to (v+) +0.5 v maximum input current 10 ma t so output short circuit (note 1) continuous t j maximum junction temperature (operating range ? 40 c to 85 c) 150 c ja thermal resistance c/w sc ? 70 280 micro8 238 soic ? 8 212 soic ? 14 156 tssop ? 14 190 t stg storage temperature ? 65 to 150 c mounting temperature (infrared or convection ? 20 sec) 235 c v esd esd tolerance machine model human body model 200 2000 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. continuous short ? circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction tem- perature of 150 c. output currents in excess of 45 ma over long term may adversely af fect reliability. shorting output to either v+ or v ? will adversely affect reliability.
lmv821, lmv822, lmv824 http://onsemi.com 4 2.7v dc electrical characteristics unless otherwise noted, all min/max limits are guaranteed for t a = 25 c, v+ = 2.7 v, v ? = 0 v, v cm = v+/2, v o = v+/2 and r l > 1 m . typical specifications represent the most likely parametric norm. min/max specifications are guaranteed by testing, characterization, or statistical analysis. parameter symbol conditions min typ max unit input offset voltage v io 1 3.5 mv t a = ? 40 c to +85 c 4 input offset voltage average drift tcv os 1 v/ c input bias current i b 105 210 na t a = ? 40 c to +85 c 315 input offset current i io 0.5 30 na t a = ? 40 c to +85 c 50 common ? mode rejection ratio cmrr 0 v v cm 1.7 v 70 85 db t a = ? 40 c to +85 c 68 power supply rejection ratio psrr 1.5 v v+ 4 v, v ? = ? 1 v, v o = 0 v, v cm = 0.0 v 75 85 db t a = ? 40 c to +85 c 70 input common ? mode voltage range v cm for cmrr 53 db and t a = ? 40 c to +85 c ? 0.2 ? 0.3 to 2.0 1.9 v large signal voltage gain av r l = 600 , v o = 0.5 v to 2.5 v 80 95 db t a = ? 40 c to +85 c 70 r l = 2 k , v o = 0.5 v to 2.5 v 83 89 t a = ? 40 c to +85 c 80 output swing v oh r l = 600 to 1.35 v 2.5 2.58 v t a = ? 40 c to +85 c 2.4 v ol r l = 600 to 1.35 v 0.13 0.21 t a = ? 40 c to +85 c 0.3 v oh r l = 2 k to 1.35 v 2.6 2.66 t a = ? 40 c to +85 c 2.5 v ol r l = 2 k to 1.35 v 0.08 0.12 t a = ? 40 c to +85 c 0.2 output current i o sourcing, v o = 0 v 12 ma sinking, v o = 2.7 v 12 26 supply current i cc lmv821 (single) 0.242 0.3 ma t a = ? 40 c to +85 c 0.5 lmv822 (both applications) 0.5 0.7 t a = ? 40 c to +85 c 0.9 lmv824 (all four applications) 1 1.3 t a = ? 40 c to +85 c 1.5
lmv821, lmv822, lmv824 http://onsemi.com 5 2.5v dc electrical characteristics unless otherwise noted, all min/max limits are guaranteed for t a = 25 c, v+ = 2.5 v, v ? = 0 v, v cm = v+/2, v o = v+/2 and r l > 1 m . typical specifications represent the most likely parametric norm. min/max specifications are guaranteed by testing, characterization, or statistical analysis. parameter symbol conditions min typ max unit input offset voltage v io t a = ? 40 c to +85 c 1 3.5 mv 4 output swing v oh r l = 600 to 1.25 v 2.3 2.37 v t a = ? 40 c to +85 c 2.2 v ol r l = 600 to 1.25 v 0.13 0.20 t a = ? 40 c to +85 c 0.3 v oh r l = 2 k to 1.25 v 2.4 2.46 t a = ? 40 c to +85 c 2.3 v ol r l = 2 k to 1.25 v 0.08 0.12 t a = ? 40 c to +85 c 0.20 2.7v ac electrical characteristics unless otherwise specified, all limits are guaranteed for t a = 25 c, v+ = 2.7 v, v ? = 0 v, v cm = 1.0 v, v o = v+/2 and rl > 1 m . typical specifications represent the most likely parametric norm. min/max specifications are guaranteed by testing, characterization, or statistical analysis. parameter symbol conditions min typ max unit slew rate sr (note 2) 1.5 v/us gain bandwidth product gbwp 5 mhz phase margin m 55 gain margin g m 12.9 db input ? referred voltage noise e n f = 1 khz, v cm = 1 v 12 nv/ hz input ? referred current noise i n f = 1khz 0.2 pa/ hz total harmonic distortion thd f = 1 khz, av = ? 2, r l = 10 k , v o = 1.8 v pp 0.023 % amplifier ? to ? amplifier isolation (note 3) 135 db 2. connected as voltage follower with input step from 0.5 v to 1.5 v. number specified is the average of the positive and negative slew rates. 3. input referred, r l = 100 k connected to v+/2. each amp excited in turn with 1khz to produce v o = 3 v pp . for supply voltages < 3 v, v o = v+.
lmv821, lmv822, lmv824 http://onsemi.com 6 5v dc electrical characteristics unless otherwise noted, all min/max limits are guaranteed for t a = 25 c, v+ = 5 v,v ? = 0 v, vcm = v+/2, v o = v+/2 and r l > 1 m . typical specifications represent the most likely parametric norm. min/max specifications are guaranteed by testing, characterization, or statistical analysis. parameter symbol conditions min typ max unit input offset voltage v io 1 3.5 mv t a = ? 40 c to +85 c 4 input offset voltage average drift tcv os 1 v/ c input bias current i b 119 245 na t a = ? 40 c to +85 c 380 input offset current i io 0.5 30 na t a = ? 40 c to +85 c 50 common ? mode rejection ratio cmrr 0 v v cm 4.0 v 72 90 db t a = ? 40 c to +85 c 70 power supply rejection ratio psrr 1.7 v v+ 4 v, v ? = 1 v, v o = 0 v, v cm = 0.0 v 75 85 db t a = ? 40 c to +85 c 70 input common ? mode voltage range v cm for cmrr 58 db and t a = ? 40 c to +85 c ? 0.2 ? 0.2 to 4.3 4.2 v large signal voltage gain a v r l = 600 , v o = 1.0 v to 4.0 v 87 100 db t a = ? 40 c to +85 c 73 r l = 2 k , v o = 1.0 v to 4.0 v 84 99 t a = ? 40 c to +85 c 82 output swing v oh r l = 600 to 2.5 v 4.75 4.84 v t a = ? 40 c to +85 c 4.7 v ol r l = 600 to 2.5 v 0.17 0.33 t a = ? 40 c to +85 c 0.4 v oh rl = 2 k to 2.5 v 4.85 4.9 t a = ? 40 c to +85 c 4.8 v ol r l = 2 k to 2.5 v 0.1 0.15 t a = ? 40 c to +85 c 0.2 output current i o sourcing, vo = 0 v 20 45 ma t a = ? 40 c to +85 c 10 sinking, vo = 5 v 20 40 t a = ? 40 c to +85 c 15 supply current i cc 0.3 0.4 ma t a = ? 40 c to +85 c 0.6 lmv822 (both applications) 0.5 0.7 t a = ? 40 c to +85 c 0.9 lmv824 (all four applications) 1 1.3 t a = ? 40 c to +85 c 1.5
lmv821, lmv822, lmv824 http://onsemi.com 7 5v ac electrical characteristics unless otherwise specified, all limits are guaranteed for t a = 25 c, v+ = 5 v, v ? = 0 v, v cm = 2.0 v, v o = v+/2 and r l > 1 m . typical specifications represent the most likely parametric norm. min/max specifications are guaranteed by testing, characterization, or statistical analysis. parameter symbol conditions min typ max unit slew rate sr (note 4) 2 v/ s gain bandwidth product gbwp 5.6 mhz phase margin m 63 gain margin g m 11.7 db input ? referred voltage noise e n f = 1 khz, v cm = 1 v 11 nv/ hz input ? referred current noise i n f = 1 khz 0.21 pa/ hz total harmonic distortion thd f = 1 khz, a v = ? 2, r l = 10 k , v o = 4.11 vpp 0.012 % amplifier ? to ? amplifier isolation (note 5) 135 db 4. connected as voltage follower with input step from 0.5 v to 3.5 v. number specified is the average of the positive and negative slew rates. 5. input referred, r l = 100 k connected to v+/2. each amp excited in turn with 1 khz to produce v o = 3 v pp . (for supply voltages < 3 v, v o = v+).
lmv821, lmv822, lmv824 http://onsemi.com 8 typical performance characteristics 0 20 40 60 80 100 120 100 1k 10k 100k crosstalk rejection (db) frequency (hz) figure 3. crosstalk rejection vs. frequency 0 10 20 30 40 50 60 70 80 90 100 100 1k 10k 100k 1m +psrr (db) frequency (hz) figure 4. +psrr vs. frequency v s = 5 v v s = 2.7 v 0 10 20 30 40 50 60 70 80 90 100 100 1k 10k 100k 1m frequency (hz) figure 5. ? psrr vs. frequency ? psrr (db) v s = 5 v v s = 2.7 v ? 20 ? 10 0 10 20 30 40 50 60 70 80 1k 10k 100k 1m 10m gain (db) frequency (hz) figure 6. gain vs. frequency v s = 5 v, c l = 0 pf, r l = 100 k ? 20 ? 10 0 10 20 30 40 50 60 70 80 1k 10k 100k 1m 10m gain (db) frequency (hz) figure 7. gain vs. frequency v s = 2.7 v, c l = 0 pf, r l = 100 k figure 8. non ? inverting stability vs. capacitive load
lmv821, lmv822, lmv824 http://onsemi.com 9 typical performance characteristics 0.5 1 1.5 2 2.5 3 2.5 3 3.5 4 4.5 5 gain (db) frequency (hz) figure 9. gain vs. frequency av = 1, r l = 100 k , t a = 25 c sr+ sr ? figure 10. non ? inverting large signal step response figure 11. non ? inverting small signal step response figure 12. inverting large signal step response figure 13. inverting small signal step response
lmv821, lmv822, lmv824 http://onsemi.com 10 applications information + ? r1 r2 v o v ref v in v oh v o v ol hysteresis v inl v inh v ref mc1403 lmv821 ? + r1 v cc v cc v o 2.5 v r2 50 k 10 k v ref 5.0 k r c r c + ? v o for: f o = 1.0 khz r = 16 k c = 0.01 f v cc lmv821 lmv821 figure 14. voltage reference figure 15. wien bridge oscillator figure 16. comparator with hysteresis v o 2.5 v(1 r1 r2 ) v ref 1 2 v cc f o 1 2 rc v in l r1 r1 r2 (v ol v ref) v ref v in h r1 r1 r2 (v oh v ref) v ref h r1 r1 r2 (v oh v ol ) for less than 10% error from operational amplifier, ((q o f o )/bw) < 0.1 where f o and bw are expressed in hz. if source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. given: f o = center frequency a(f o ) = gain at center frequency choose value f o , c v in figure 17. multiple feedback bandpass filter ? + v cc r3 r1 r2 v ref c c v o co = 10 c c o lmv821 then : r3 q f o c r1 r3 2a(f o ) r2 r1 r3 4q 2 r1 r3
lmv821, lmv822, lmv824 http://onsemi.com 11 ordering information order number number of channels specific device marking package type shipping ? lmv821sq3t2g* single aae sc ? 70 (pb ? free) 3000 / tape & reel lmv822dmr2g* dual v822 micro8 (pb ? free) 4000 / tape & reel lmv822dr2g* dual v822 soic ? 8 (pb ? free) 2500 / tape & reel LMV824DR2G quad lmv824 soic ? 14 (pb ? free) 2500 / tape & reel lmv824dtbr2g quad lmv 824 tssop ? 14 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *contact factory.
lmv821, lmv822, lmv824 http://onsemi.com 12 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a ? 01 obsolete. new standard 419a ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ? b ? sc ? 88a, sot ? 353, sc ? 70 case 419a ? 02 issue j
lmv821, lmv822, lmv824 http://onsemi.com 13 package dimensions micro8 ? case 846a ? 02 issue h s b m 0.08 (0.003) a s t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. 846a-01 obsolete, new standard 846a-02. b e pin 1 id 8 pl 0.038 (0.0015) ? t ? seating plane a a1 c l *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8x 8x 6x mm inches scale 8:1 1.04 0.041 0.38 0.015 5.28 0.208 4.24 0.167 3.20 0.126 0.65 0.0256 dim a min nom max min millimeters ?? ?? 1.10 ?? inches a1 0.05 0.08 0.15 0.002 b 0.25 0.33 0.40 0.010 c 0.13 0.18 0.23 0.005 d 2.90 3.00 3.10 0.114 e 2.90 3.00 3.10 0.114 e 0.65 bsc l 0.40 0.55 0.70 0.016 ?? 0.043 0.003 0.006 0.013 0.016 0.007 0.009 0.118 0.122 0.118 0.122 0.026 bsc 0.021 0.028 nom max 4.75 4.90 5.05 0.187 0.193 0.199 h e h e d d e
lmv821, lmv822, lmv824 http://onsemi.com 14 package dimensions soic ? 8 nb case 751 ? 07 issue aj seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
lmv821, lmv822, lmv824 http://onsemi.com 15 package dimensions soic ? 14 case 751a ? 03 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint* 7x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
lmv821, lmv822, lmv824 http://onsemi.com 16 package dimensions tssop ? 14 case 948g ? 01 issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 lmv821/d micro8 is a trademark of international rectifier. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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