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  original creation date: 06/05/98 last update date: 08/18/99 last major revision date: 06/05/98 mnclc404a-x rev 0a0 microcircuit data sheet wideband, high-slew rate, monolithic op amp general description the clc404 is a high-speed, monolithic op amp that combines low power consumption (110mw typical, 120mw maximum) with superior large signal performance. operating off of +5v supplies, the clc404 demonstrates a large-signal bandwidth (5vpp output) of 165mhz. the bandwidth performance, along with other speed characteristics such as rise and fall time (2.1ns for a 5v step), is nearly identical to the small signal performance since slew rate is not a limiting factor in the clc404 design. with its 175mhz bandwidth and 10ns settling (to 0.2%), the clc404 is ideal for driving ultra-fast flash a/d converters. the 0.5 degree deviation from linear phase, coupled with -53dbc 2nd harmonic distortion and -60dbc 3rd harmonic distortion (both at 20mhz), is well suited for many digital and analog communication applications. these same characteristics, along with 70ma output current, differential gain of 0.07%, and differential phase at 0.03 degree, make the clc404 an appropriate high-performance solution for video distribution and line driving applications. constructed using an advanced, complementary bipolar process and comlinear's proven current feedback topologies, the clc404 provides performance far beyond that of other monolithic op amps. ns part numbers CLC404AJ-QML industry part number clc404a prime die ub1928b controlling document 5962-9099401mpa processing mil-std-883, method 5004 quality conformance inspection mil-std-883, method 5005 subgrp description temp ( c) o 1 static tests at +25 2 static tests at +125 3 static tests at -55 4 dynamic tests at +25 5 dynamic tests at +125 6 dynamic tests at -55 7 functional tests at +25 8a functional tests at +125 8b functional tests at -55 9 switching tests at +25 10 switching tests at +125 11 switching tests at -55 1
microcircuit data sheet mnclc404a-x rev 0a0 features - 165mhz large signal bandwidth (5vpp) - 2600v/us slew rate - low power: 110mw - low distortion: -53dbc at 20mhz - 10ns settling to 0.2% - 0.07% diff. gain, 0.03% diff. phase applications - fast a/d conversion - line drivers - video distribution - high-speed communications - radar, if processors 2
microcircuit data sheet mnclc404a-x rev 0a0 (absolute maximum ratings) (note 1) supply voltage (vs) +7 vdc output current (iout) 70 ma differential input voltage (vid) 10 v common mode input voltage (vcm) +5v dc maximum power dissipation (pd) (note 2) 1.25w junction temperature (tj) +175 c storage temperature range -65 c to +150 c lead temperature +300 c (soldering, 10 seconds) thermal resistance junction -to-ambient (thetaja) tbd ceramic dip (still air) tbd (500 lfpm) junction -to-case (thetajc) tbd ceramic dip package weight (typical) tbd ceramic dip esd tolerance (note 3) 1000v esd rating note 1: absolute maximum ratings are limits beyond which damage to the device may occur. operating ratings are conditions for which the device is functional, but do not guarantee specific performance limits. for guaranteed specifications and test conditions see the electrical characteristics. the guaranteed specifications apply only for the test conditions listed. some performance characteristics may degrade when the device is not operated under the listed test conditions. note 2: the maximum power dissipation must be derated at elevated temperatures and is dictated by tjmax (maximum junction temperature), thetaja (package junction to ambient thermal resistance), and ta (ambient temperature). the maximum allowable power dissipation at any temperature is pdmax = (tjmax - ta) / thetaja or the number given in the absolute maximum ratings, whichever is lower. note 3: human body model, 100 pf discharged through 1.5k ohms. 3
microcircuit data sheet mnclc404a-x rev 0a0 recommended operating conditions supply voltage (vs) +5 vdc gain range (av) +2 to +21 and -1 to -20 ambient operating temperature range (ta) -55 c to +125 c 4
mnclc404a-x rev 0a0 microcircuit data sheet electrical characteristics dc parameters: (the following conditions apply to all the following parameters, unless otherwise specified.) dc: vs = +5 v dc, load resistance (rl) = 100 ohms, av = +6, feedback resistance (rf) = 500 ohms, and gain settling resistance (rg) = 100 ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups +iin input bias current (noninverting) -22 +22 ua 1, 2 -44 +44 ua 3 -iin input bias current (inverting) -18 +18 ua 1 -22 +22 ua 2 -40 +40 ua 3 vio input offset voltage -5.0 +5.0 mv 1 -10.0 +10.0 mv 2 -9.0 +9.0 mv 3 tc (+iin) average +input bias current drift 1 -200 +200 na/c 2 1 -275 +275 na/c 3 tc (-iin) average -input bias current drift 1 -200 +200 na/c 2 1 -275 +275 na/c 3 tc (vio) average input offset voltage drift 1 -50 +50 uv/c 2, 3 is supply current no load, quiescent -12 +12 ma 1, 2, 3 psrr power supply rejection ratio +vs = +4.5v to +5.0v, -vs = -4.5v to -5.0v 248 db1 2 45 db 2, 3 cmrr common mode rejection ratio vcm = +1.0 v 146 db1 1 44 db 2, 3 +iout output current 1 +50 ma 1, 2 1 +30 ma 3 -iout output current 1 -50 ma 1, 2 1 -30 ma 3 rout output impedance at dc 1 0.2 ohms 1, 2 1 0.3 ohms 3 +rin input resistance 1 500 kohms 1 1 1000 kohms 2 1 250 kohms 3 cin input capacitance ta = +25 c 1 2 pf 4 5
mnclc404a-x rev 0a0 microcircuit data sheet electrical characteristics dc parameters:(continued) (the following conditions apply to all the following parameters, unless otherwise specified.) dc: vs = +5 v dc, load resistance (rl) = 100 ohms, av = +6, feedback resistance (rf) = 500 ohms, and gain settling resistance (rg) = 100 ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups +vout output voltage swing rl = 100 ohms 2 +2.7 v 4, 5 2 +2.3 v 6 -vout output voltage swing 2 -2.7 v 4, 5 2 -2.3 v 6 ssbw small signal bandwidth -3 db bandwidth, vout < 2 vpp 150 mhz 4 2 120 mhz 5 2 150 mhz 6 lsbw large signal bandwidth -3 db bandwidth, vout < 5 vpp 1 140 mhz 4, 6 1 110 mhz 5 gfpl gain flatness peaking low at 0.1 mhz to 40 mhz, vout <2 vpp 0.3 db 4 2 0.4 db 5, 6 gfph gain flatness peaking high at > 40 mhz, vout < 2 vpp 0.5 db 4 2 0.7 db 5, 6 gfr gain flatness rolloff at 0.1 mhz to 75 mhz, vout < 2 vpp 1db4 2 1.3 db 5 2 1 db 6 lpd linear phase deviation at < 75 mhz, vout < 2 vpp 1 1.0 deg. 4, 6 1 1.2 deg. 5 hd2 2nd harmonic distortion 2 vpp at 20 mhz, vout = 2 vpp -45 dbc 4 2 -45 dbc 5 2 -40 dbc 6 hd3 3nd harmonic distortion 2 vpp at 20 mhz, vout = 2 vpp -50 dbc 4 2 -50 dbc 5, 6 sr slew rate av = +2, measured at +1 v, cl <10 pf, vout = 3v 1 2000 v/us 4, 5, 6 6
mnclc404a-x rev 0a0 microcircuit data sheet electrical characteristics ac parameters: (the following conditions apply to all the following parameters, unless otherwise specified.) ac: vs = +5 v dc, load resistance (rl) = 100 ohms, av = +6, feedback resistance (rf) = 500 ohms, and gain settling resistance (rg) = 100 ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups trs rise and fall time 2v step, cl < 10 pf 1 2.4 ns 9, 11 1 2.9 ns 10 trl rise and fall time 5v step, cl < 10 pf 1 2.6 ns 9, 11 1 3.2 ns 10 ts settling time 2v step at 0.2% of the fixed value, cl <10 pf 1 15 ns 9, 10, 11 os overshoot 2 v step, cl < 10 pf 112%9 1 15 % 10, 11 note 1: if not tested, shall be guaranteed to the limits specified in table i herein. note 2: group a testing only. note 3: the algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this table. 7
microcircuit data sheet mnclc404a-x rev 0a0 graphics and diagrams graphics# description 07076hra2 cerdip (j), 8 lead (b/i ckt) j08arl cerdip (j), 8 lead (p/p dwg) p000396a cerdip (j), 14 lead (pinout) see attached graphics following this page. 8

n mil/aerospace operations 2900 semiconductor drive santa clara, ca 95050 1 8 2 7 3 6 4 5 clc404j 8 - lead dip top view connection diagram p000396a n/c -in +in -vcc n/c vout +vcc n/c
microcircuit data sheet mnclc404a-x rev 0a0 revision history rev ecn # rel date originator changes 0a0 m0002924 08/18/99 shaw mead initial mds release 9


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