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  high common-mode voltage, programmable gain d ifference amplifier ad628 features high common-mode input voltage range 120 v at v s = 15 v gain range 0.1 to 100 operating temperature range: ?40c to 85c supply voltage range dual supply: 2.25 v to 18 v single supply: 4.5 v to 36 v excellent ac and dc performance offset temperature stability rti: 10 v/c maximum offset: 1.5 v mv maximum cmrr rti: 75 db minimum, dc to 500 hz, g = +1 applications high voltage current shunt sensing programmable logic controllers analog input front end signal conditioning +5 v, +10 v, 5 v, 10 v, and 4 to 20 ma isolation sensor signal conditioning power supply monitoring electrohydraulic control motor control general description the ad628 is a precision difference amplifier that combines excellent dc performance with high common-mode rejection over a wide range of frequencies. when used to scale high voltages, it allows simple conversion of standard control voltages or currents for use with single-supply adcs. a wideband feedback loop minimizes distortion effects due to capacitor charging of - adcs. a reference pin (v ref ) provides a dc offset for converting bipolar to single-sided signals. the ad628 converts +5 v, +10 v, 5 v, 10 v, and 4 to 20 ma input signals to a single-ended output within the input range of single-supply adcs. the ad628 has an input common-mode and differential-mode operating range of 120 v. the high common-mode input impedance makes the device well suited for high voltage measurements across a shunt resistor. the inverting input of the buffer amplifier is available for making a remote kelvin connection. functional block diagram r ext1 r ext2 r g +v s +in ?in +in ?in ?v s a2 a1 + in ? in 100k 100k 10k 10k v ref 10k ad628 out g = +0.1 c filt 02992-c-001 figure 1. 30 40 50 60 70 80 90 100 110 120 130 cmrr (db) frequency (hz) 100 10 1k 10k 100k 02992-c-002 v s = 2.5v v s = 15v figure 2. cmrr vs. frequency of the ad628 a precision 10 k resistor connected to an external pin is provided for either a low-pass filter or to attenuate large differential input signals. a single capacitor implements a low- pass filter. the ad628 operates from single and dual supplies and is available in an 8-lead soic_n or 8-lead msop package. it operates over the standard industrial temperature range of ?40c to +85c. rev. f information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved.
ad628 rev. f | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 7 thermal characteristics .............................................................. 7 esd caution .................................................................................. 7 pin configuration and function descriptions ............................. 8 typical performance characteristics ............................................. 9 test circ u its ..................................................................................... 13 theory of operation ...................................................................... 14 applications ..................................................................................... 15 gain adjustment ........................................................................ 15 input voltage range ................................................................... 15 voltage level conversion .......................................................... 16 current loop receiver .............................................................. 17 monitoring battery voltages ..................................................... 17 filter capacitor values ............................................................... 18 kelvin connection ..................................................................... 18 outline dimensions ....................................................................... 19 ordering guide .......................................................................... 19 revision history 3/06rev. e to rev. f changes to table 1............................................................................ 3 changes to figure 3.......................................................................... 7 replaced voltage level conversion section ............................... 16 changes to figure 32 and figure 33............................................. 17 updated outline dimensions ....................................................... 19 changes to ordering guide .......................................................... 19 5/05rev. d to rev. e changes to table 1........................................................................... 3 changes to table 2........................................................................... 5 changes to figure 33..................................................................... 18 3/05rev. c to rev. d updated format................................................................ universal changes to table 1........................................................................... 3 changes to table 2........................................................................... 5 4/04rev. b to rev. c updated format................................................................ universal changes to specifications ............................................................... 3 changes to absolute maximum ratings ...................................... 7 changes to figure 3......................................................................... 7 changes to figure 26..................................................................... 13 changes to figure 27..................................................................... 13 changes to theory of operation................................................. 14 changes to figure 29..................................................................... 14 changes to table 5......................................................................... 15 changes to gain adjustment section......................................... 15 added the input voltage range section..................................... 15 added figure 30 ............................................................................ 15 added figure 31 ............................................................................ 15 changes to voltage level conversion section .......................... 16 changes to figure 32..................................................................... 16 changes to table 6......................................................................... 16 changes to figure 33 and figure 34............................................ 17 changes to figure 35..................................................................... 18 changes to kelvin connection section...................................... 18 6/03rev. a to rev. b changes to general description ................................................... 1 changes to specifications............................................................... 2 changes to ordering guide ........................................................... 4 changes to tpcs 4, 5, and 6 .......................................................... 5 changes to tpc 9............................................................................ 6 updated outline dimensions...................................................... 14 1/03rev. 0 to rev. a change to ordering guide............................................................. 4 11/02rev. 0: initial version
ad628 rev. f | page 3 of 20 specifications t a = 25c, v s = 15 v, r l = 2 k, r ext1 = 10 k, r ext2 = , v ref = 0, unless otherwise noted. table 1. ad628ar ad628arm parameter conditions min typ max min typ max unit differential and output amplifier gain equation g = +0.1(1+ r ext1 /r ext2 ) v/v gain range see figure 29 0.1 1 100 0.1 1 100 v/v offset voltage v cm = 0 v; rti of input pins 2 ; output amplifier g = +1 ?1.5 +1.5 ?1.5 +1.5 mv vs. temperature 4 8 4 8 v/c cmrr 3 rti of input pins; g = +0.1 to +100 75 75 db 500 hz 75 75 db minimum cmrr over temperature ?40c to +85c 70 70 db vs. temperature 1 4 1 4 (v/v)/c psrr (rti) v s = 10 v to 18 v 77 94 77 94 db input voltage range common mode ?120 +120 ?120 +120 v differential ?120 +120 ?120 +120 v dynamic response small signal bandwidth ?3 db g = +0.1 600 600 khz full power bandwidth 5 5 khz settling time g = +0.1, to 0.01%, 100 v step 40 40 s slew rate 0.3 0.3 v/s noise (rti) spectral density 1 khz 300 300 nv/hz 0.1 hz to 10 hz 15 15 v p-p differential amplifier gain 0.1 0.1 v/v error ?0.1 +0.01 +0.1 ?0.1 +0.01 +0.1 % vs. temperature 5 5 ppm/c nonlinearity 5 5 ppm vs. temperature 3 10 3 10 ppm offset voltage rti of input pins ?1.5 +1.5 ?1.5 +1.5 mv vs. temperature 8 8 v/c input impedance differential 220 220 k common mode 55 55 k cmrr 4 rti of input pins; g = +0.1 to +100 75 75 db 500 hz 75 75 db minimum cmrr over temperature ?40c to +85c 70 70 db vs. temperature 1 4 1 4 (v/v)/c output resistance 10 10 k error ?0.1 +0.1 ?0.1 +0.1 % output amplifier gain equation g = (1 + r ext1 /r ext2 ) v/v nonlinearity g = +1, v out = 10 v 0.5 0.5 ppm offset voltage rti of output amp ?0.15 +0.15 ?0.15 +0.15 mv vs. temperature 0.6 0.6 v/c output voltage swing r l = 10 k ?14.2 +14.1 ?14.2 +14.1 v r l = 2 k ?13.8 +13.6 ?13.8 +13.6 v
ad628 rev. f | page 4 of 20 ad628arm ad628ar parameter conditions min typ max min typ max unit bias current 1.5 3 1.5 3 na offset current 0.2 0.5 0.2 0.5 na cmrr v cm = 13 v 130 130 db open-loop gain v out = 13 v 130 130 db power supply operating range 2.25 18 2.25 18 v quiescent current 1.6 1.6 ma temperature range ?40 +85 ?40 +85 c 1 to use a lower gain, see the ga section. in adjustment 2 the addition of the difference amplifier and output amplifier offset voltage does not exceed this specification. 3 error due to common mode as seen at the output: ] [] 10 )(0.1)( [ 20 75 gain amplifier output v cm out = v 4 error due to common mode as seen at the output of a1: ] 10 )(0.1)( [ 20 75 cm out v a1 = v
ad628 rev. f | page 5 of 20 t a = 25c, v s = 5 v, r l = 2 k, r ext1 = 10 k, r ext2 = , v ref = 2.5, unless otherwise noted. table 2. ad628ar ad628arm parameter conditions min typ max min typ max unit differential and output amplifier gain equation g = +0.1(1+ r ext1 /r ext2 ) v/v gain range see figure 29 0.1 1 100 0.1 1 100 v/v offset voltage v cm = 2.25 v; rti of input pins 2 ; output amplifier g = +1 ?3.0 +3.0 ?3.0 +3.0 mv vs. temperature 6 15 6 15 v/c cmrr 3 rti of input pins; g = +0.1 to +100 75 75 db 500 hz 75 75 db minimum cmrr over temperature ?40c to +85c 70 70 db vs. temperature 1 4 1 4 (v/v)/c psrr (rti) v s = 4.5 v to 10 v 77 94 77 94 db input voltage range common mode 4 ?12 +17 ?12 +17 v differential ?15 +15 ?15 +15 v dynamic response small signal bandwidth C 3 db g = +0.1 440 440 khz full power bandwidth 30 30 khz settling time g = +0.1; to 0.01%, 30 v step 15 15 s slew rate 0.3 0.3 v/s noise (rti) spectral density 1 khz 350 350 nv/hz 0.1 hz to 10 hz 15 15 v p-p differential amplifier gain 0.1 0.1 v/v error C0.1 +0.01 +0.1 C0.1 +0.01 +0.1 % nonlinearity 3 3 ppm vs. temperature 3 10 3 10 ppm offset voltage rti of input pins ?2.5 +2.5 ?2.5 +2.5 mv vs. temperature 10 10 v/c input impedance differential 220 220 k common mode 55 55 k cmrr 5 rti of input pins; g = +0.1 to +100 75 75 db 500 hz 75 75 db minimum cmrr over temperature ?40c to +85c 70 70 db vs. temperature 1 4 1 4 (v/v)/c output resistance 10 10 k error ?0.1 +0.1 ?0.1 +0.1 % output amplifier gain equation g = (1 + r ext1 /r ext2 ) v/v nonlinearity g = +1, v out = 1 v to 4 v 0.5 0.5 ppm output offset voltage rti of output amplifier ?0.15 0.15 ?0.15 0.15 mv vs. temperature 0.6 0.6 v/c output voltage swing r l = 10 k 0.9 4.1 0.9 4.1 v r l = 2 k 1 4 1 4 v bias current 1.5 3 1.5 3 na offset current 0.2 0.5 0.2 0.5 na cmrr v cm = 1 v to 4 v 130 130 db open-loop gain v out = 1 v to 4 v 130 130 db
ad628 rev. f | page 6 of 20 ad628arm ad628ar parameter conditions min typ max min typ max unit power supply operating range 2.25 +36 2.25 +36 v quiescent current 1.6 1.6 ma temperature range ?40 +85 ?40 +85 c 1 to use a lower gain, see the gain adjustment section. 2 the addition of the difference amplifier and output amplifier offset voltage does not exceed this specification. 3 error due to common mode as seen at the output: ] [] 10 )(0.1)( [ 20 75 gain amplifier output v cm out = v 4 greater values of voltage are possible with greater or lesser values of v ref . 5 error due to common mode as seen at the output of a1: ] 10 )(0.1)( [ 20 75 cm out v a1 = v
ad628 rev. f | page 7 of 20 absolute maximum ratings table 3. parameter rating supply voltage 18 v internal power dissipation see figure 3 input voltage (common mode) 120 v 1 differential input voltage 120 v 1 output short-circuit duration indefinite storage temperature ?65c to +125c operating temperature range C40c to +85c lead temperature (soldering, 10 sec) 300c 1 when using 12 v supplies or higher (see the in section). put voltage range stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics 0 0.2 0.4 0.6 0.8 1.0 power dissipation (w) 1.2 1.4 1.6 20 0 ?40 ?20 ?60 40 60 80 100 ambient temperature (c) 02992-c-003 8-lead soic package 8-lead msop package t j = 150c msop ja (jedec; 4-layer board) = 132.54c/w soic ja (jedec; 4-layer board) = 154c/w figure 3. maximum power dissipation vs. temperature esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd pr ecautions are recommended to avoid performance degradation or loss of functionality.
ad628 rev. f | page 8 of 20 pin configuration and fu nction descriptions top view (not to scale) 8 7 6 5 1 2 3 4 +in ?v s v ref c filt ?in +v s r g out ad628 02992-c-004 figure 4. pin configuration table 4. pin function descriptions pin no. mnemonic descriptions 1 +in noninverting input 2 ?v s negative supply voltage 3 v ref reference voltage input 4 c filt filter capacitor connection 5 out amplifier output 6 r g output amplifier inverting input 7 +v s positive supply voltage 8 ?in inverting input
ad628 rev. f | page 9 of 20 typical performance characteristics 0 5 10 15 20 25 % of units 30 35 40 ?1.6 ?1.2 ?0.8 ?0.4 0 0.4 0.8 1.2 1.6 2.0 input offset voltage (mv) 02992-c-005 8440 units figure 5. typical distribution of input offset voltage, v s = 15 v, soic_n package 0 5 10 15 20 25 % of units ?74 ?78 ?82 ?86 ?90 ?94 ?98 ?102 ?106 ?110 cmrr (db) 02992-c-006 8440 units figure 6. typical distribution of co mmon-mode rejection, soic_n package 30 40 50 60 70 80 90 100 110 120 130 cmrr (db) frequency (hz) 100 10 1k 10k 100k 02992-c-007 v s = 2.5v v s = 15v figure 7. cmrr vs. frequency 0 20 40 60 80 100 120 140 psrr (db) 0.1 1 10 100 1k 10k 100k 1m frequency (hz) 02992-c-008 g = +0.1 ?15v +15v +2.5v figure 8. psrr vs. frequency, single and dual supplies voltage noise density (nv/ hz) 100 1000 1 10 100 1k 10k 100k frequency (hz) 02992-c-009 figure 9. voltage noise spectral density, rti, v s = 15 v voltage noise density (nv/ hz) 100 1000 1 10 100 1k 10k 100k frequency (hz) 02992-c-010 figure 10. voltage noise spectral density, rti, v s = 2.5 v
ad628 rev. f | page 10 of 20 02992-c-011 100 90 10 0 10 time (sec) 5 noise (5 v/div) 0 1s figure 11. 0.1 hz to 10 hz voltage noise, rti ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 gain (db) 100 1k 10k 100k 1m 10m frequency (hz) 02992-c-012 g = +100 g = +10 g = +1 g = +0.1 figure 12. small signal frequency response, v out = 200 mv p-p, g = +0.1, +1, +10, and +100 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 gain (db) 10 100 1k 10k 100k 1m frequency (hz) 02992-c-013 g = +100 g = +10 g = +1 g = +0.1 figure 13. large signal frequency response, v out = 20 v p-p, g = +0.1, +1, +10, and +100 0 5 10 15 20 25 % of devices 30 35 40 012345678910 gain error (ppm) 02992-c-014 9638 units figure 14. typical distribution of +1 gain error ?150 ?100 ?50 0 50 100 150 common-mode voltage (v) v s (v) 5 01 0 1 5 02992-c-015 2 0 upper cmv limit lower cmv limit v ref = 0v +85c ?40c +85c ?40c +25c figure 15. common-mode operating range vs. power supply voltage for three temperatures 02992-c-016 100 90 10 0 500 v 4.0v r l = 1k r l = 2k r l = 10k v s = 15v output voltage (v) output error ( v) figure 16. normalized gain error vs. v out , v s = 15 v
ad628 rev. f | page 11 of 20 02992-c-017 100 90 10 0 100 v 500mv r l = 1k r l = 2k r l = 10k v s = 2.5v output voltage (v) output error ( v) figure 17. normalized gain error vs. v out , v s = 2.5 v bias current (na) 0 1 2 3 4 ?40 ?20 0 20 40 60 80 100 temperature (c) 02992-c-018 figure 18. bias current vs. temperature buffer ?15 ?10 ?5 0 5 10 15 output voltage swing (v) 0 5 10 15 20 25 output current (ma) 02992-c-019 ?25c +85c ?25c ?40c +25c ?40c +85c +25c figure 19. output voltage oper ating range vs. output current 02992-c-020 100 90 10 0 500mv 50mv 4 s figure 20. small signal pulse response, r l = 2 k, c l = 0 pf, top: input, bottom: output 02992-c-021 100 90 10 0 500mv 50mv 4 s figure 21. small signal pulse response, r l = 2 k, c l = 1000 pf, top: input, bottom: output 02992-c-021 100 90 10 0 500mv 50mv 4 s figure 22. large signal pulse response, r l = 2 k, c l = 1000 pf, top: input, bottom: output
ad628 rev. f | page 12 of 20 02992-c-023 100 90 10 0 5v 10mv 100 s figure 23. settling time to 0.01%, 0 v to 10 v step 02992-c-024 100 90 10 0 5v 10mv 100 s figure 24. settling time to 0.01% 0 v to ?10 v step
ad628 rev. f | page 13 of 20 test circuits +in ?in out + ? ad829 g = +100 +in ?in g = +0.1 + ? ad707 ?in +in 100k fet probe hp3589a spectrum analyzer c filt ?v s v ref 100k r g 10k 10k 10k ad628 +v s 02992-c-025 figure 25. cmrr vs. frequency +in 100k c filt v ref ad628 +v s +in ?in out ?v s r g + ? ad829 +in ?in g = +0.1 g = +100 g = +100 scope 10k ?in 100k 10k 10k 20 +15v 1 vac 02992-c-026 figure 26. psrr vs. frequency 6 23 1 8 7 5 4 +in 100k c filt v ref 10k ad628 +v s hp3561a spectrum analyzer 10k 10k +in ?in g = +0.1 +in ?in ?in 100k 10k 10k out ?v s r g 02992-c-027 figure 27. noise tests
ad628 rev. f | page 14 of 20 theory of operation the ad628 is a high common-mode voltage difference amplifier, combined with a user-configurable output amplifier (see figure 28 and figure 29 ). differential mode voltages in excess of 120 v are accurately scaled by a precision 11:1 voltage divider at the input. a reference voltage input is available to the user at pin 3 (v ref ). the output common-mode voltage of the difference amplifier is the same as the voltage applied to the reference pin. if the uncommitted amplifier is configured for gain, connect pin 3 to one end of the external gain resistor to establish the output common-mode voltage at pin 5 (out). the output of the difference amplifier is internally connected to a 10 k resistor trimmed to better than 0.1% absolute accuracy. the resistor is connected to the noninverting input of the output amplifier and is accessible at pin 4 (c filt ). a capacitor can be connected to implement a low-pass filter, a resistor can be connected to further reduce the output voltage, or a clamp circuit can be connected to limit the output swing. the uncommitted amplifier is a high open-loop gain, low offset, low drift op amp, with its noninverting input connected to the internal 10 k resistor. both inputs are accessible to the user. careful layout design has resulted in exceptional common- mode rejection at higher frequencies. the inputs are connected to pin 1 (+in) and pin 8 (?in), which are adjacent to the power pins, pin 2 (?v s ) and pin 7 (+v s ). because the power pins are at ac ground, input impedance balance and, therefore, common- mode rejection are preserved at higher frequencies. +in ?in +in ?in a2 a1 +in ?in 100k 100k 10k 10k v ref 10k out g = +0.1 c filt r g 02992-c-028 figure 28. simpli fied schematic +v s +in ?in ?v s a2 +in ?in 100k 100k 10k 10k v ref reference voltage 10k ad628 out g = +0.1 r g r ext3 c filt r ext2 r ext1 +in ?in a1 02992-c-029 figure 29. circuit connections
ad628 rev. f | page 15 of 20 applications gain adjustment the ad628 system gain is provided by an architecture consisting of two amplifiers. the gain of the input stage is fixed at 0.1; the output buffer is user-adjustable as g a2 = 1 + r ext1 / r ext2 . the system gain is then ? ? ? ? ? ? ? ? += ext2 ext1 total r r g 10.1 (1) at a 2 na maximum, the input bias current of the buffer amplifier is very low and any offset voltage induced at the buffer amplifier by its bias current may be neglected (2 na 10 k = 20 v). however, to absolutely minimize bias current effects, select r ext1 and r ext2 so that their parallel combination is 10 k. if practical resistor values force the parallel combination of r ext1 and r ext2 below 10 k, add a series resistor (r ext3 ) to make up for the difference. table 5 lists several values of gain and corresponding resistor values. table 5. nearest standard 1% resistor values for various gains 1 total gain (v/v) a2 gain (v/v) r ext1 () r ext2 () r ext3 () 0.1 1 10 k 0 0.2 2 20 k 20 k 0 0.25 2.5 25.9 k 18.7 k 0 0.5 5 49.9 k 12.4 k 0 1 10 100 k 11 k 0 2 20 200 k 10.5 k 0 5 50 499 k 10.2 k 0 10 100 1 m 10.2 k 0 1 see figure 29 . to set the system gain to less than 0.1, create an attenuator by placing resistor r ext4 from pin 4 (c filt ) to the reference voltage. a divider is formed by the 10 k resistor that is in series with the positive input of a2 and resistor r ext4 . a2 is configured for unity gain. using a divider and setting a2 to unity gain yields 1 ? ? ? ? ? ? ? ? + = ext4 ext4 divider w r r g k 10 0.1 / input voltage range vref and the supply voltage determine the common-mode input voltage range. the relation is expressed by ref s cm v v v upper 102111 ? + )v.C( (2) ref s cm v v 102111 ? + ? )v.( v lower where v s+ is the positive supply, v s? is the negative supply, and 1.2 v is the headroom needed for suitable performance. equation 2 provides a general formula for calculating the common-mode input voltage range. however, keep the ad628 within the maximum limits listed in table 1 to maintain optimal performance. this is illustrated in figure 30 where the maximum common-mode input voltage is limited to 120 v. figure 31 shows the common-mode input voltage bounds for single-supply voltages. ?200 ?150 ?100 ?50 0 50 input common-mode voltage (v) 100 150 200 86 24 01 0 1 2 1 supply voltage (v) 02992-c-035 4 1 6 maximum input common-mode voltage when v ref = gnd figure 30. input common-mode voltage vs. supply voltage for dual supplies ?80 ?60 ?40 ?20 0 20 40 60 80 100 input common-mode voltage (v) 86 24 01 0 1 2 1 single-supply voltage (v) 02992-c-034 4 1 6 maximum input common-mode voltage when v ref = midsupply figure 31. input common-mode voltage vs. supply voltage for single supplies
ad628 rev. f | page 16 of 20 the differential input voltage range is constrained to the linear operation of the internal amplifiers a1 and a2. the voltage applied to the inputs of a1 and a2 should be between v s? + 1.2 v and v s+ ? 1.2 v. similarly, the outputs of a1 and a2 should be kept between v s? + 0.9 v and v s+ ? 0.9 v. voltage level conversion industrial signal conditioning and control applications typically require connections between remote sensors or amplifiers and centrally located control modules. signal conditioners provide output voltages of up to 10 v full scale. however, adcs or microprocessors operating on single 3.3 v to 5 v logic supplies are now the norm. thus, the controller voltages require further reduction in amplitude and reference. furthermore, voltage potentials between locations are seldom compatible, and power line peaks and surges can generate destructive energy between utility grids. the ad628 offers an ideal solution to both problems. it attenuates otherwise destruc- tive signal voltage peaks and surges by a factor of 10 and shifts the differential input signal to the desired output voltage. conversion from voltage-driven or current-loop systems is easily accomplished using the circuit shown in figure 32 . this shows a circuit for converting inputs of various polarities and amplitudes to the input of a single-supply adc. to adjust common-mode output voltage, connect pin 3 (v ref ) and the lower end of the 10 k resistor to the desired voltage. the output common-mode voltage is the same as the reference voltage. designing such an application can be done in a few simple steps, including the following: ? determine the required gain. for example, if the input voltage must be transformed from 10 v to 0 v to +5 v, the gain is +5/+20 or +0.25. ? determine if the circuit common-mode voltage should be changed. an ad7940 adc is illustrated for this example. when operating from a 5 v supply, the common-mode voltage of the ad7940 is half the supply, or 2.5 v. if the ad628 reference pin and the lower terminal of the 10 k resistor are connected to a 2.5 v voltage source, the output common-mode voltage is 2.5 v. table 6 shows resistor and reference values for commonly used single-supply converter voltages. r ext3 is included as an option to balance the source impedance into a2. this is described in more detail in the gain adjustment section. table 6. nearest 1% resistor values for voltage level conversion applications input voltage (v) adc supply voltage (v) desired output voltage (v) v ref (v) r ext1 (k) r ext2 (k) 10 5 2.5 2.5 15 10 5 5 2.5 2.5 39.7 10 10 5 2.5 0 39.7 10 5 5 2.5 0 89.8 10 10 3 1.25 1.25 2.49 10 5 3 1.25 1.25 15 10 10 3 1.25 0 15 10 5 3 1.25 0 39.7 10
ad628 rev. f | page 17 of 20 5 1 3 4 8 2 7 +vs ?vs 6 ?in +in v ref 100k ? 10k ? 100k ? 10k ? 10k ? a1 a2 4 5 6 3 1 2 sclk sdata cs gnd v dd v in ad628 serial data ref195 +12v v out v in 2 3 4 6 c filt r g 10 f 0.1 f 10 f 0.1 f 10 f 0.1 f 10 f 0.1 f ad7940 +/?10v 15nf 2 3 1 ad8606 1/2 49.9 ? 33nf +12 v ? 12 v 10k ? 10k ? ad628 reference voltage r ext2 10k ? r e x t 1 1 5 k ? ad8606 2/2 5 6 7 4 8 02992-030 figure 32. level shifter current loop receiver analog data transmitted on a 4 to 20 ma current loop can be detected with the receiver shown in figure 33 . the ad628 is an ideal choice for such a function because the current loop is driven with a compliance voltage sufficient to stabilize the loop, and the resultant common-mode voltage often exceeds com- monly used supply voltages. note that with large shunt values, a resistance of equal value must be inserted in series with the inverting input to compensate for an error at the noninverting input. monitoring battery voltages figure 34 illustrates how the ad628 is used to monitor a battery charger. voltages approximately eight times the power supply voltage can be applied to the input with no damage. the resistor divider action is well-suited for the measurement of many power supply applications, such as those found in battery chargers or similar equipment. 6 8 1 4 5 7 2 3 ad628 +15v +2.5v 9.53k : ?15v 10k : 0v to 5v to adc i = 4 to 20ma 100k : 210k : 100k : 100k : 249 : v cm = 15v 10k : 10k : 2 49 : 02992-c-031 figure 33. level shifter for 4 to 20 ma current loop
ad628 rev. f | page 18 of 20 +in ?in g = +0.1 10k a1 ?in 100k +v s 5v v ref ?v s +in ?in a2 out ad628 100k 10k other batteries in charging circuit charging circuit +1.5v battery 10k +in nv bat (v) r ext1 10k 0v to 5v to adc c filt r g 02992-c-032 figure 34. battery voltage monitor filter capacitor values connect a capacitor to pin 4 (c filt ) to implement a low-pass filter. the capacitor value is () f15.9/ t fc = where f t is the desired 3 db filter frequency. table 7 shows several frequencies and their closest standard capacitor values. table 7. capacitor values for various filter frequencies frequency (hz) capacitor value (f) 10 1.5 50 0.33 60 0.27 100 0.15 400 0.039 1 k 0.015 5 k 0.0033 10 k 0.0015 kelvin connection in certain applications, it may be desirable to connect the inverting input of an amplifier to a remote reference point. this eliminates errors resulting in circuit losses in interconnect- ing wiring. the ad628 is particularly suited for this type of connection. in figure 35 , a 10 k resistor added in the feedback matches the source impedance of a2. this is described in more detail in the gain adjustment section. +in ?in a2 +v s 5v ?in +in v ref out circuit loss load +in ?in g = +0.1 a1 ad628 ?v s 10k 10k 10k 100k 100k v s /2 c filt r g 10k 02992-c-033 figure 35. kelvin connection
ad628 rev. f | page 19 of 20 outline dimensions compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 36. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa figure 37. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model temperature range description package option branding ad628ar ?40c to +85c 8-lead soic_n r-8 ad628ar-reel ?40c to +85c 8-lead soic_n 13" reel r-8 ad628ar-reel7 ?40c to +85c 8-lead soic_n 7" reel r-8 ad628arz 1 ?40c to +85c 8-lead soic_n r-8 AD628ARZ-RL 1 ?40c to +85c 8-lead soic_n 13" reel r-8 ad628arz-r7 1 ?40c to +85c 8-lead soic_n 7" reel r-8 ad628arm ?40c to +85c 8-lead msop rm-8 jga ad628arm-reel ?40c to +85c 8-lead msop 13" reel rm-8 jga ad628arm-reel7 ?40c to +85c 8-lead msop 7" reel rm-8 jga ad628armz 1 ?40c to +85c 8-lead msop rm-8 jgz ad628armz-rl 1 ?40c to +85c 8-lead msop 13" reel rm-8 jgz ad628armz-r7 1 ?40c to +85c 8-lead msop 7" reel rm-8 jgz ad628-eval evaluation board 1 z = pb-free part.
ad628 rev. f | page 20 of 20 t notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c02992-0-3/06(f) ttt


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