16-bit transceivers cy74fct16245t cy74fct162245t cy74fct162h245t sccs026b - july 1994 - revised september 2001 data sheet acquired from cypress semiconductor corporation. data sheet modi?d to remove devices not offered. copyright 2001, texas instruments incorporated 1cy74fct16445t/2 h245t features i off supports partial-power-down mode operation edge-rate control circuitry for signi?antly improved noise characteristics typical output skew < 250 ps esd > 2000v tssop (19.6-mil pitch) and ssop (25-mil pitch) packages industrial temperature range of ?0?c to +85?c v cc = 5v 10% cy74fct16245t features: 64 ma sink current, 32 ma source current typical v olp (ground bounce)<1.0v at v cc = 5v, t a = 25?c cy74fct162245t features: balanced output drivers: 24 ma reduced system switching noise typical v olp (ground bounce) <0.6v at v cc = 5v, t a = 25?c cy74fct162h245t features: bus hold on data inputs eliminates the need for external pull-up or pull-down resistors functional description these 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. with the exception of the cy74fct16245t, these devices can be operated either as two independent octals or a single 16-bit transceiver. direction of data ?w is controlled by (dir), the output enable ( oe) transfers data when low and isolates the buses when high. this device is fully speci?d for partial-power-down applications using i off . the i off circuitry disables the outputs, preventing damaging current back?w through the device when it is powered down. the cy74fct16245t is ideally suited for driving high-capacitance loads and low-impedance backplanes. the cy74fct162245t has 24-ma balanced output drivers with current limiting resistors in the outputs. this reduces the need for external terminating resistors and provides for mini- mal undershoot and reduced ground bounce. the cy74fct162245t is ideal for driving transmission lines. the cy74fct162h245t is a 24-ma balanced output part that has bus hold on the data inputs. the device retains the input s last state whenever the input goes to high impedance. this eliminates the need for pull-up/down resistors and prevents ?ating inputs. gnd logic block diagrams cy74fct16245t,cy74fct162245t, cy74fct162h245t pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 33 32 31 30 29 25 26 27 28 36 35 1 dir 34 ssop/tssop top view 13 14 15 16 17 18 19 20 21 22 23 24 45 44 43 42 41 37 38 39 40 48 47 46 1 b 1 1 b 2 1 b 3 1 b 4 1 a 1 1 a 2 1 a 3 1 a 4 1 oe gnd gnd v cc 1 b 7 1 b 8 1 b 5 1 b 6 1 a 5 1 a 6 1 a 7 1 a 8 v cc gnd gnd 2 b 3 2 b 4 2 b 1 2 b 2 2 a 1 2 a 2 2 a 3 2 a 4 gnd gnd v cc 2 b 7 2 b 8 2 b 5 2 b 6 2 a 5 2 a 6 2 a 7 2 a 8 v cc gnd 2 dir 2 oe fct16245? 1 a 1 1 a 2 1 a 3 1 a 4 1 a 5 1 a 6 1 a 7 1 oe 1 b 1 1 b 2 1 b 3 1 b 4 1 b 5 1 b 6 1 b 7 1 dir 1 a 8 1 b 8 fct16245? 2 a 1 2 a 2 2 a 3 2 a 4 2 a 5 2 a 6 2 a 7 2 oe 2 b 1 2 b 2 2 b 3 2 b 4 2 b 5 2 b 6 2 b 7 2 dir 2 a 8 2 b 8 fct16245? 16245t 162245t 162h245t
cy74fct16245 t cy74fct162245 t cy74fct162h245 t 2 maximum ratings [3, 4] (above which the useful life may be impaired. for user guidelines, not tested.) storage temperature ........................com? -55 c to +125 c ambient temperature with power applied....................................com? -55 c to +125 c dc input voltage ........................................... ?.5v to +7.0v dc output voltage......................................... ?.5v to +7.0v dc output current (maximum sink current/pin) ........................?0 to +120 ma power dissipation .......................................................... 1.0w static discharge voltage............................................>2001v (per mil-std-883, method 3015) notes: 1. on cy74fct162h245t these pins have bus hold. 2. h = high voltage level. l = low voltage level. x = don? care. z = high impedance. 3. operation beyond the limits set forth may impair the useful life of the device. unless otherwise noted, these limits are over the operating free-air temperature range. 4. unused inputs must always be connected to an appropriate logic voltage level, preferably either v cc or ground. pin description name description oe three-state output enable inputs (active low) dir direction control a inputs or three-state outputs [1] b inputs or three-state outputs [1] function table [2] inputs outputs oe dir l l bus b data to bus a l h bus a data to bus b h x high z state operating range range ambient temperature v cc industrial ?0 c to +85 c 5v 10% electrical characteristics over the operating range parameter description test conditions min. typ. [5] max. unit v ih input high voltage 2.0 v v il input low voltage 0.8 v v h input hysteresis [6] 100 mv v ik input clamp diode voltage v cc =min., i in =?8 ma ?.7 ?.2 v i ih input high current standard v cc =max., v i =v cc 1 a bus hold 100 i il input low current standard v cc =max., v i =gnd 1 a bus hold 100 a i bbh i bbl bus hold sustain current on bus hold input [7] v cc =min. v i =2.0v ?0 a v i =0.8v +50 i bhho i bhlo bus hold overdrive current on bus hold input [7] v cc =max., v i =1.5v tbd ma i ozh high impedance output current (three-state output pins) v cc =max., v out =2.7v 1 a i ozl high impedance output current (three-state output pins) v cc =max., v out =0.5v 1 a i os short circuit current [8] v cc =max., v out =gnd ?0 ?40 ?00 ma i o output drive current [8] v cc =max., v out =2.5v ?0 ?80 ma i off power-off disable v cc =0v, v out 4.5v [9] 1 a
cy74fct16245 t cy74fct162245 t cy74fct162h245 t 3 output drive characteristics for cy74fct16245t parameter description test conditions min. typ. [5] max. unit v oh output high voltage v cc =min., i oh =? ma 2.5 3.5 v v cc =min., i oh =?5 ma 2.4 3.5 v v cc =min., i oh =?2 ma 2.0 3.0 v v ol output low voltage v cc =min., i ol =64 ma 0.2 0.55 v output drive characteristics for cy74fct162245t, cy74fct162h245t parameter description test conditions min. typ. [5] max. unit i odl output low current [8] v cc =5v, v in =v ih or v il , v out =1.5v 60 115 150 ma i odh output high current [8] v cc =5v, v in =v ih or v il , v out =1.5v ?0 ?15 ?50 ma v oh output high voltage v cc =min., i oh =?4 ma 2.4 3.3 v v ol output low voltage v cc =min., i ol =24 ma 0.3 0.55 v notes: 5. typical values are at v cc =5.0v, t a =+25?c ambient. 6. this parameter is speci?d but not tested. 7. pins with bus hold are described in pin description. 8. not more than one output should be shorted at a time. duration of short should not exceed one second. the use of high-speed test apparatus and/or sampl e and hold techniques are preferable in order to minimize internal chip heating and more accurately re?ct operational values. otherwise prolonged sh orting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. in any sequence of parameter tests, i os tests should be performed last. 9. tested at +25?c. capacitance [6] (t a = +25?c, f = 1.0 mhz) parameter description test conditions typ. [5] max. unit c in input capacitance v in = 0v 4.5 6.0 pf c out output capacitance v out = 0v 5.5 8.0 pf
cy74fct16245 t cy74fct162245 t cy74fct162h245 t 4 power supply characteristics parameter description test conditions typ. [5] max. unit i cc quiescent power supply current v cc =max. v in <0.2v, v in >v cc -0.2v 5 500 a ? i cc quiescent power supply current (ttl inputs high) v cc =max. v in =3.4v [10] 0.5 1.5 ma i ccd dynamic power supply current [11] v cc =max., one input toggling, 50% duty cycle, outputs open, oe=dir=gnd v in =v cc or v in =gnd 60 100 a/mhz i c total power supply current [12] v cc =max., f 1 =10 mhz, 50% duty cycle, outputs open, one bit toggling, oe=dir=gnd v in =v cc or v in =gnd 0.6 1.5 ma v in =3.4v or v in =gnd 0.9 2.3 ma v cc =max., f 1 =2.5 mhz, 50% duty cycle, outputs open, sixteen bits toggling, oe=dir=gnd v in =v cc or v in =gnd 2.4 4.5 [13] ma v in =3.4v or v in =gnd 6.4 16.5 [13] ma notes: 10. per ttl driven input (v in =3.4v); all other inputs at v cc or gnd. 11. this parameter is not directly testable, but is derived for use in total power supply calculations. 12. i c =i quiescent + i inputs + i dynamic i c =i cc + ? i cc d h n t +i ccd (f 0 /2 + f 1 n 1 ) i cc = quiescent current with cmos input levels ? i cc = power supply current for a ttl high input (v in =3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f 0 = clock frequency for registered devices, otherwise zero f 1 = input signal frequency n 1 = number of inputs changing at f 1 all currents are in milliamps and all frequencies are in megahertz. 13. values for these conditions are examples of the i cc formula. these limits are speci?d but not tested.
cy74fct16245 t cy74fct162245 t cy74fct162h245 t 5 ] switching characteristics over the operating range [14] description 74fct16245t 74fct162245t 74fct16245at 74fct162245at 74fct162h245at fig. no. [15] parameter min. max. min. max. unit t plh t phl propagation delay data to output a to b, b to a 1.5 7.0 1.5 4.5 ns 1, 3 t pzh t pzl output enable time oe to a or b 1.5 9.5 1.5 6.2 ns 1, 7, 8 t phz t plz output disable time oe to a or b 1.5 7.5 1.5 5.0 ns 1, 7, 8 t pzh t pzl output enable time dir to a or b 1.5 9.5 1.5 6.2 ns 1, 7, 8 t phz t plz output disable time dir to a or b 1.5 7.5 1.5 5.0 ns 1, 7, 8 t sk(o) output skew [16] 0.5 0.5 ns description 74fct16245ct 74fct162245ct 74fct162h245ct fig. no. [15] parameter min. max. unit t plh t phl propagation delay data to output a to b, b to a 1.5 4.1 ns 1, 3 t pzh t pzl output enable time oe to a or b 1.5 5.8 ns 1, 7, 8 t phz t plz output disable time oe to a or b 1.5 4.8 ns 1, 7, 8 t pzh t pzl output enable time dir to a or b 1.5 5.8 ns 1, 7, 8 t phz t plz output disable time dir to a or b 1.5 4.8 ns 1, 7, 8 t sk(o) output skew [16] 0.5 ns note: 14. minimum limits are speci?d but not tested on propagation delays. 15. see ?arameter measurement information?in the general information section. 16. skew between any two outputs of the same package switching in the same direction. this parameter is ensured by design. ordering information cy74fct16245 speed (ns) ordering code package name package type operating range 4.1 CY74FCT16245CTPACT z48 48-lead (240-mil) tssop industrial cy74fct16245ctpvc/pvct o48 48-lead (300-mil) ssop 4.5 cy74fct16245atpact z48 48-lead (240-mil) tssop industrial cy74fct16245atpvc/pvct o48 48-lead (300-mil) ssop 7.0 cy74fct16245tpact z48 48-lead (240-mil) tssop industrial cy74fct16245tpvc/pvct o48 48-lead (300-mil) ssop
cy74fct16245 t cy74fct162245 t cy74fct162h245 t 6 ordering information cy74fct162245 speed (ns) ordering code package name package type operating range 4.1 cy74fct162245ctpact z48 48-lead (240-mil) tssop industrial cy74fct162245ctpvc o48 48-lead (300-mil) ssop 74fct162245ctpvct o48 48-lead (300-mil) ssop 4.5 74fct162245atpact z48 48-lead (240-mil) tssop industrial cy74fct162245atpvc o48 48-lead (300-mil) ssop 74fct162245atpvct o48 48-lead (300-mil) ssop 7.0 cy74fct162245tpact z48 48-lead (240-mil) tssop industrial cy74fct162245tpvc/pvct o48 48-lead (300-mil) ssop ordering information cy74fct162h245 speed (ns) ordering code package name package type operating range 4.1 74fct162h245ctpact z48 48-lead (240-mil) tssop industrial cy74fct162h245ctpvc o48 48-lead (300-mil) ssop 74fct162h245ctpvct o48 48-lead (300-mil) ssop 4.5 74fct162h245atpact z48 48-lead (240-mil) tssop industrial cy74fct162h245atpvc o48 48-lead (300-mil) ssop 74fct162h245atpvct o48 48-lead (300-mil) ssop
cy74fct16245t/2245t cy74fct16445t/2h245t 7 package diagrams 48-lead shrunk small outline package o48
cy74fct16245 t cy74fct162245 t cy74fct162h245 t 8 package diagrams 48-lead thin shrunk small outline package z48
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