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  SN54BCT374, sn74bct374 octal edge-triggered d-type latches with 3-state outputs scbs019c ? september 1988 ? revised march 2003 1 post office box 655303 ? dallas, texas 75265 operating voltage range of 4.5 v to 5.5 v state-of-the-art bicmos design significantly reduces i ccz full parallel access for loading buffered control inputs 3-state outputs drive bus lines or buffer memory address registers esd protection exceeds jesd 22 ? 2000-v human-body model (a114-a) SN54BCT374 ...fk p ackage (top view) SN54BCT374 ...j or w p ackage sn74bct374 ... dw, n, or ns p ackage (top view) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 oe 1q 1d 2d 2q 3q 3d 4d 4q gnd v cc 8q 8d 7d 7q 6q 6d 5d 5q clk 3 2 1 20 19 910111213 4 5 6 7 8 18 17 16 15 14 8d 7d 7q 6q 6d 2d 2q 3q 3d 4d 1d 1q oe 5q 5d 8q 4q gnd clk v cc description/ordering information these 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. they are particularly suitable for implementing buffer registers, i/o ports, bidirectional bus drivers, and working registers. the eight flip-flops of the ?bct374 devices are edge-triggered d-type flip-flops. on the positive transition of the clock (clk) input, the q outputs are set to the logic levels that were set up at the data (d) inputs. a buffered output-enable (oe ) input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. in the high-impedance state, the outputs neither load nor drive the bus lines significantly. the high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. the output-enable (oe ) input does not affect internal operations of the flip-flop. old data can be retained or new data can be entered while the outputs are in the high-impedance state. ordering information t a package ? orderable part number top-side marking pdip ? n tube sn74bct374n sn74bct374n 0 cto70 c soic dw tube sn74bct374dw bct374 0 c to 70 c soic ? dw tape and reel sn74bct374dwr bct374 sop ? ns tape and reel sn74bct374nsr bct374 cdip ? j tube snj54bct374j snj54bct374j ?55 c to 125 c cfp ? w tube snj54bct374w snj54bct374w lccc ? fk tube snj54bct374fk snj54bct374fk ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. copyright ? 2003, texas instruments incorporated please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. on products compliant to mil-prf-38535, all parameters are tested unless otherwise noted. on all other products, production processing does not necessarily include testing of all parameters.
SN54BCT374, sn74bct374 octal edge-triggered d-type latches with 3-state outputs scbs019c ? september 1988 ? revised march 2003 2 post office box 655303 ? dallas, texas 75265 description/ordering information (continued) to ensure the high-impedance state during power up or power down, oe should be tied to v cc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. function table (each flip-flop) inputs output oe clk d q l h h l ll l h or l x q 0 h x x z logic diagram (positive logic) 1d clk 1q 2 11 3 1 1d oe c1 to seven other channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage range applied to any output in the disabled or power-off state, v o ? 0.5 v to 5.5 v . . . . . . . . . . . . . . . . voltage range applied to any output in the high state, v o ? 0.5 v to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik ? 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . current into any output in the low state: SN54BCT374 96 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sn74bct374 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 2): dw package 58 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n package 69 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ns package 60 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the package thermal impedance is calculated in accordance with jesd 51-7.
SN54BCT374, sn74bct374 octal edge-triggered d-type latches with 3-state outputs scbs019c ? september 1988 ? revised march 2003 3 post office box 655303 ? dallas, texas 75265 recommended operating conditions (see note 3) SN54BCT374 sn74bct374 unit min nom max min nom max unit v cc supply voltage 4.5 5 5.5 4.5 5 5.5 v v ih high-level input voltage 2 2 v v il low-level input voltage 0.8 0.8 v i ik input clamp current ? 18 ? 18 ma i oh high-level output current ? 2 ? 15 ma i ol low-level output current 48 64 ma t a operating free-air temperature ? 55 125 0 70 c note 3: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions SN54BCT374 sn74bct374 unit parameter test conditions min typ ? max min typ ? max unit v ik v cc = 4.5 v, i i = ? 18 ma ? 1.2 ? 1.2 v i oh = ? 3 ma 2.4 3.3 2.4 3.3 v oh v cc = 4.5 v i oh = ? 12 ma 2 3.2 v i oh = ? 15 ma 2 3.1 v ol v cc =45v i ol = 48 ma 0.38 0.55 v v ol v cc = 4 . 5 v i ol = 64 ma 0.42 0.55 v i i v cc = 5.5 v, v i = 5.5 v 0.4 0.4 ma i ih v cc = 5.5 v, v i = 2.7 v 20 20 a i il v cc = 5.5 v, v i = 0.5 v ? 0.6 ? 0.6 ma i os ? v cc = 5.5 v, v o = 0 ? 100 ? 225 ? 100 ? 225 ma i ozh v cc = 5.5 v, v o = 2.7 v 50 50 a i ozl v cc = 5.5 v, v o = 0.5 v ? 50 ? 50 a i ccl v cc = 5.5 v 37 60 37 60 ma i cch v cc = 5.5 v 2 5 2 5 ma i ccz v cc = 5.5 v 5 8 5 8 ma c i v cc = 5 v, v i = 2.5 v or 0.5 v 6 6 pf c o v cc = 5 v, v o = 2.5 v or 0.5 v 10 10 pf ? all typical values are at v cc = 5 v, t a = 25 c. ? not more than one output should be tested at a time, and the duration of the test should not exceed one second.
SN54BCT374, sn74bct374 octal edge-triggered d-type latches with 3-state outputs scbs019c ? september 1988 ? revised march 2003 4 post office box 655303 ? dallas, texas 75265 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) v cc = 5 v, t a = 25 c SN54BCT374 sn74bct374 unit min max min max min max f clock clock frequency 70 70 70 mhz t w pulse duration clk high 7 8 7 ns t su setup time before clk data high or low 6.5 6.5 6.5 ns t h hold time after clk data high or low 0 0 0 ns switching characteristics (see figure 1) parameter from (input) to (output) v cc = 5 v, c l = 50 pf, r1 = 500 ? , r2 = 500 ? , t a = 25 c v cc = 4.5 v to 5.5 v, c l = 50 pf, r1 = 500 ? , r2 = 500 ? , t a = min to max ? unit ? bct374 SN54BCT374 sn74bct374 min typ max min max min max f max 70 70 70 mhz t plh clk q 2 7.2 9.1 2 11.6 2 10.6 ns t phl clk q 2 7.1 8.8 2 10.6 2 10 ns t pzh oe q 1 8.3 10.1 1 12.7 1 12.3 ns t pzl oe q 1 8.6 10.6 1 13 1 12.7 ns t phz oe q 1 4.7 6.3 1 7.1 1 6.8 ns t plz oe q 1 4.8 6.3 1 7.5 1 6.8 ns ? for conditions shown as min or max, use the appropriate value specified under recommended operating conditions.
SN54BCT374, sn74bct374 octal edge-triggered d-type latches with 3-state outputs scbs019c ? september 1988 ? revised march 2003 5 post office box 655303 ? dallas, texas 75265 parameter measurement information notes: a. c l includes probe and jig capacitance. b. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, t r = t f 2.5 ns, duty cycle = 50%. c. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. d. the outputs are measured one at a time with one transition per measurement. e. when measuring propagation delay times of 3-state outputs, switch s1 is open. f. all parameters and waveforms are not applicable to all devices. from output under test test point r1 c l (see note a) load circuit for totem-pole outputs load circuit for 3-state and open-collector outputs r1 s1 7 v (t pzl , t plz , o.c.) open (all others) from output under test test point r2 c l (see note a) r l = r1 = r2 1.5 v 1.5 v 1.5 v 3 v 3 v 0 v 0 v t h t su voltage waveforms setup and hold times timing input (see note b) data input (see note b) 1.5 v 1.5 v 3 v 3 v 0 v 0 v high-level pulse (see note b) low-level pulse t w voltage waveforms pulse duration 1.5 v 1.5 v t phl t plh t plh t phl input (see note b) out-of-phase output (see note d) 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 3 v 0 v v ol v oh v oh v ol in-phase output (see note d) voltage waveforms propagation delay times (see note d) t phz t plz 0.3 v t pzl t pzh 1.5 v 1.5 v 1.5 v 1.5 v 3 v 0 v output control (low-level enable) waveform 1 (see notes c and d) waveform 2 (see notes c and d) 0 v v oh v ol 3.5 v 0.3 v voltage waveforms enable and disable times, 3-state outputs figure 1. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9051601m2a active lccc fk 20 1 tbd post-plate n / a for pkg type 5962-9051601mra active cdip j 20 1 tbd call ti n / a for pkg type 5962-9051601msa active cfp w 20 1 tbd a42 n / a for pkg type sn74bct374dble obsolete ssop db 20 tbd call ti call ti sn74bct374dbr obsolete ssop db 20 tbd call ti call ti sn74bct374dw active soic dw 20 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374dwe4 active soic dw 20 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374dwg4 active soic dw 20 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374dwr active soic dw 20 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374dwrg4 active soic dw 20 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374n active pdip n 20 20 pb-free (rohs) cu nipdau n / a for pkg type sn74bct374ne4 active pdip n 20 20 pb-free (rohs) cu nipdau n / a for pkg type sn74bct374nsr active so ns 20 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374nsre4 active so ns 20 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74bct374nsrg4 active so ns 20 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim snj54bct374fk active lccc fk 20 1 tbd post-plate n / a for pkg type snj54bct374j active cdip j 20 1 tbd call ti n / a for pkg type snj54bct374w active cfp w 20 1 tbd a42 n / a for pkg type (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. package option addendum www.ti.com 17-aug-2007 addendum-page 1
important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 17-aug-2007 addendum-page 2
tape and reel information package materials information www.ti.com 19-may-2007 pack materials-page 1
device package pins site reel diameter (mm) reel width (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74bct374dwr dw 20 mla 330 24 10.8 13.0 2.7 12 24 q1 sn74bct374nsr ns 20 mla 330 24 8.2 13.0 2.5 12 24 q1 tape and reel box information device package pins site length (mm) width (mm) height (mm) sn74bct374dwr dw 20 mla 333.2 333.2 31.75 sn74bct374nsr ns 20 mla 333.2 333.2 31.75 package materials information www.ti.com 19-may-2007 pack materials-page 2


mechanical data mlcc006b october 1996 post office box 655303 ? dallas, texas 75265 fk (s-cqcc-n**) leadless ceramic chip carrier 4040140 / d 10/96 28 terminal shown b 0.358 (9,09) max (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) a no. of min max 0.358 0.660 0.761 0.458 0.342 (8,69) min (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32) (18,78) ** 20 28 52 44 68 84 0.020 (0,51) terminals 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 12 13 14 15 16 18 17 11 10 8 9 7 5 4 3 2 0.020 (0,51) 0.010 (0,25) 6 1 28 26 27 19 21 b sq a sq 22 23 24 25 20 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a metal lid. d. the terminals are gold plated. e. falls within jedec ms-004



mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ?  8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. ti products are not authorized for use in safety-critical applications (such as life support) where a failure of the ti product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of ti products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by ti. further, buyers must fully indemnify ti and its representatives against any damages arising out of the use of ti products in such safety-critical applications. ti products are neither designed nor intended for use in military/aerospace applications or environments unless the ti products are specifically designated by ti as military-grade or "enhanced plastic." only products designated by ti as military-grade meet military specifications. buyers acknowledge and agree that any such use of ti products which ti has not designated as military-grade is solely at the buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security rfid www.ti-rfid.com telephony www.ti.com/telephony low power www.ti.com/lpw video & imaging www.ti.com/video wireless wireless www.ti.com/wireless mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2007, texas instruments incorporated


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