pi74lpt16543 16-bit latched transceivers 1 ps2072a 01/16/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 212345678901 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 212345678901 pi74lpt16543 fast cmos 16-bit latched transceivers product description pericom semiconductor?s pi74lpt series of logic circuits are produced using the company?s advanced 0.6 micron cmos technology, achieving industry leading speed grades. the pi74lpt16543 is 16-bit latched transceivers organized with two sets of eight d-type latches with separate input and output controls for each set. for data flow from a to b, for example, the a-to-b enable (xceab) input must be low in order to enter data from xax or to take data from xbx, as indicated in the truth table. with xceab low, a low signal makes the a-to-b latches transparent; a subsequent low-to-high transition of the xleab signal puts the a latches in the storage mode and their outputs no longer change the a inputs. with xceab and xoeab both low, the 3-state b output buffers are active and reflect the data present at the output of the a latches. control of data from b to a is similar, but uses the xceab, xleab, and xoeab inputs. the pi74lpt16543 can be driven from either 3.3v or 5.0v devices allowing this device to be used as a translator in a mixed 3.3/5.0v system. product features ? compatible with lcx? and lvt? families of products ? supports 5v tolerant mixed signal mode operation ? input can be 3v or 5v ? output can be 3v or connected to 5v bus ? advanced low power cmos operation ? excellent output drive capability: balanced drives (24 ma sink and source) ? pin compatible with industry standard double-density pinouts ? low ground bounce outputs ? hysteresis on all inputs ? industrial operating temperature range: ?40c to +85c ? multiple center pins and distributed vcc/gnd pins minimize switching noise ? packages available: ? 56-pin 240 mil wide plastic tssop (a) ? 56-pin 300 mil wide plastic ssop (v) 1 b 0 d c 1 a 0 to 7 other channels d c 1 leab 1 ceab 1 oeab 1 leba 1 ceba 1 oeba 2 b 0 d c 2 a 0 to 7 other channels d c 2 leab 2 ceab 2 oeab 2 leba 2 ceba 2 oeba logic block diagram
pi74lpt16543 16-bit latched transceivers 2 ps2072a 01/16/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 product pin description pin name description xoeab a-to-b output enable input (active low) xoeba b-to-a output enable input (active low) xceab a-to-b enable input (active low) xceba b-to-a enable input (active low) xleab a-to-b latch enable input (active low) xleba b-to-a latch enable input (active low) xax a-to-b data inputs or b-to-a 3-state outputs xbx b-to-a data inputs or b-to-a 3-state outputs gnd ground v cc power latch output inputs status buffers x ceab x leab x oeab x a x to x b xx b x h x x storing high z x h x storing x x x h x high z l l l transparent current a inputs l h l storing previous* a inputs product pin configuration truth table (1) notes: 1. *before xleab low-to-high transistion h = high voltage level l = low voltage level x = don't care or irrelevant z = high impedance 2. a-to-b data flow shown. b-to-a flow control is the same, except using xceba, xleba, and xoeba. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 25 26 27 28 32 31 30 29 1oeab 1leab 1ceab gnd 1a0 1a1 vcc 1a2 1a3 1a4 gnd 1a5 1a6 1a7 2a0 2a1 2a2 gnd 2a3 2a4 2a5 vcc 2a6 2a7 gnd 2ceab 2leab 2oeab 1oeba 1leba 1ceba gnd 1b0 1b1 vcc 1b2 1b3 1b4 gnd 1b5 1b6 1b7 2b0 2b1 2b2 gnd 2b3 2b4 2b5 vcc 2b6 2b7 gnd 2ceba 2leba 2oeba 56-pin a, v
pi74lpt16543 16-bit latched transceivers 3 ps2072a 01/16/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 2.7v to 3.6v) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage (input pins) guaranteed logic high level 2.2 ? 5.5 v input high voltage (i/o pins) 2.0 ? 5.5 v v il input low voltage guaranteed logic low level ?0.5 ? 0.8 v (input and i/o pins) i ih input high current (input pins) v cc = max. v in = 5.5v ? ? 1 a input high current (i/o pins) v cc = max. v in = v cc ??1a i il input low current (input pins) v cc = max. v in = gnd ? ? 1 a input low current (i/o pins) v cc = max. v in = gnd ? ? 1 a i ozh high impedance output current v cc = max. v out = 5.5v ? ? 1 a i ozl (3-state output pins) v cc = max. v out = gnd ? ? 1 a v ik clamp diode voltage v cc = min., i in = ?18 ma ? ?0.7 ?1.2 v i odh output high current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) ?36 ?60 ?110 ma i odl output low current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) 50 90 200 ma v oh output high voltage v cc = min. i oh = ?0.1 ma vcc-0.2 ? ? v v in = v ih or v il i oh = ?3 ma 2.4 3.0 ? v v cc = 3.0v, i oh = ?8 ma 2.4 (5) 3.0 ? v v in = v ih or v il i oh = ?24 ma 2.0 ? ? v ol output low voltage v cc = min. i ol = 0.1 ma ? ? 0.2 v v in = v ih or v il i ol = 16 ma ? 0.2 0.4 v i ol = 24 ma ? 0.3 0.5 v i os short circuit current (4) v cc = max. (3) , v out = gnd ?60 ?85 ?240 ma i off power down disable v cc = 0v, v in or v out 4.5v ? ? 100 a v h input hysteresis ? 150 ? mv maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) note: stresses greater than those listed under maximum ratings may cause permanent damage to the de- vice. this is a stress rating only and functional opera- tion of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type . 2. typical values are at vcc = 3.3v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. v oh = v cc ? 0.6v at rated current. storage temperature ............................................................. ?55c to +125c ambient temperature with power applied ............................ ?40c to +85c supply voltage to ground potential (inputs & vcc only) ...... ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) .. ?0.5v to +7.0v dc input voltage .................................................................... ?0.5v to +7.0v dc output current .............................................................................. 120 ma power dissipation .................................................................................... 1.0w
pi74lpt16543 16-bit latched transceivers 4 ps2072a 01/16/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power supply current v cc = max. v in = gnd or v cc 0.1 10 a d i cc quiescent power supply current v cc = max. v in = v cc ? 0.6v (3) 2.0 30 a ttl inputs high i ccd dynamic power supply (4) v cc = max., v in = v cc 50 75 a/ outputs open v in = gnd mhz x oe = gnd one bit toggling 50% duty cycle i c total power supply v cc = max., v in = v cc ? 0.6v 0.6 2.3 ma current (6) outputs open v in = gnd f i = 10 mh z 50% duty cycle x oe = gnd one bit toggling v cc = max., v in = v cc ? 0.6v 2.1 4.7 (5) outputs open v in = gnd f i = 2.5 mh z 50% duty cycle x oe = gnd 16 bits toggling notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 3.3v, +25c ambient. 3. per ttl driven input; all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current (i ccl , i cch and i ccz ) d i cc = power supply current for a ttl high input d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
pi74lpt16543 16-bit latched transceivers 5 ps2072a 01/16/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 switching characteristics over operating range (1) lpt16543 lpt16543a lpt16543c com. com. com. parameters description conditions (2) min (3) max min (3) max min (3) max unit t plh propagation delay c l = 50 pf 2.5 8.5 2.5 6.5 2.5 5.3 ns t phl transparent mode r l = 500 w xax to xbx or xbx to xax t plh propagation delay 2.5 12.5 2.5 8.0 2.5 7.0 ns t phl xleba to xax, xleab to xbx t pzh output enable time 2.0 12.0 2.0 9.0 2.0 8.0 ns t pzl xoeba or xoeab to xax or xbx t phz output disable time (4) 2.0 9.0 2.0 7.5 2.0 6.5 ns t plz xoeba or xoeab to xax or xbx t su setup time high or low 3.0 ? 2.0 ? 2.0 ? ns xax or xbx to xleab or xleba t h hold time high or low 2.0 ? 2.0 ? 2.0 ? ns xax or xbx to xleab or xleba t w xleab or xleba pulse width 5.0 ? 5.0 ? 5.0 ? ns low t sk (o) output skew (5) ? 0.5 ? 0.5 ? 0.5 ns notes: 1. propagation delays and enable/disable times are with vcc = 3.3v 0.3v, normal range. for vcc = 2.7v, extended range, all propagation delays and enable/disable times should be degraded by 20%. 2. see test circuit and wave forms. 3. minimum limits are guaranteed but not tested on propagation delays. 4. this parameter is guaranteed but not production tested. 5. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. note: 1. this parameter is determined by device characterization but is not production tested. capacitance (t a = 25c, f = 1 mhz) parameters (1) description test conditions typ max. units c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 5.5 8 pf pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com
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