one technology way, p.o. box 9106, norwood. ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a high speed, +5 v, 0.1 m f cmos rs-232 drivers/receivers features 200 kb/s transmission rate small (0.1 m f) charge pump capacitors single 5 v power supply meets all eia-232-e and v.28 specifications two drivers and two receivers on-board dc-dc converters 9 v output swing with +5 v supply 30 v receiver input levels pin compatible with max222/max232a/max242 applications computers peripherals modems printers instruments ordering guide model temperature range package option ADM222An C40 c to +85 c n-18 ADM222Ar C40 c to +85 c r-18w adm232aan C40 c to +85 c n-16 adm232aarn C40 c to +85 c r-16n adm232aarw C40 c to +85 c r-16w adm242an C40 c to +85 c n-18 adm242ar C40 c to +85 c r-18w * internal 400k w pull-up resistor on each ttl/mos input ** internal 5k w pull-down resistor on each rs-232 input v cc +5v to +10v voltage doubler +5v to ?0v voltage inverter c1+ c1 v+ v c2+ c2 t1 adm2xx t2 r1 r2 0.1 f 0.1 f 0.1 f gnd ttl/cmos outputs r1 out r2 out t1 out t2 out r1 in r2 in t1 in t2 in ttl/cmos inputs * rs-232 outputs rs-232 inputs ** 0.1 f +5v input 0.1 f en shdn (adm242) (adm222, adm242) adm222/adm232a/adm242* functional block diagram general description the adm222, adm232a, adm242 are a family of high speed rs-232 line drivers/receivers offering transmission rates up to 200 kb/s. operating from a single +5 v power supply, a highly efficient on-chip charge pump using small (0.1 m f) external capacitors allows rs-232 bipolar levels to be developed. two rs-232 drivers and two rs-232 receivers are provided on each device. the devices are fabricated on bicmos, an advanced mixed technology process which combines low power cmos with high speed bipolar circuitry. this allows for transmission rates up to 200 kb/s yet minimizes the quiescent power supply current to under 5 ma. the adm232a is a pin-compatible, high speed upgrade for the ad232 and for the adm232l. it is available in 16-pin dip and in both narrow and wide surface mount (soic) packages. the adm222 contains an additional shutdown ( shdn ) func- tion which may be used to disable the device thereby reducing the supply current to 0.1 m a. during shutdown, all transmit/ receive functions are disabled. the adm222 is available in 18-pin dip and in a wide surface mount (soic) package. the adm242 combines both shutdown ( shdn ) and enable ( en ) functions. the shutdown function reduces the supply curent to 0.1 ma. during shutdown, the transmitters are disabled but the receivers continue to operate normally. the enable function allows the receiver outputs to be disabled thereby facilitating sharing a common bus. the adm242 is available in 18-pin dip and in a wide surface mount (soic) package. * protected by u.s. patent no. 5,237,209.
rev. 0 C2C parameter min typ max units test conditions/comments rs-232 transmitters output voltage swing 5 9 v all transmitter outputs loaded with 3 k w to ground input logic threshold low, v inl 1.4 0.8 v t in input logic threshold high, v inh 2.0 1.4 v t in logic pullup current 5 40 m at in = 0 v data rate 200 kb/s output resistance 300 w v cc = v+ = vC = 0 v, v out = 2 v output short circuit current (instantaneous) 7 22 ma rs-232 receivers rs-232 input voltage range C30 +30 v rs-232 input threshold low 0.8 1.3 v rs-232 input threshold high 1.8 2.4 v rs-232 input hysteresis 0.2 0.5 1.0 v v cc = 5 v rs-232 input resistance 357k w ttl/cmos output voltage low, v ol 0.2 0.4 v i out = 3.2 ma ttl/cmos output voltage high, v oh 3.5 v i out = C1.0 ma ttl/cmos output short-circuit current C2 C10 ma source current (v out = gnd) ttl/cmos output short-circuit current 10 30 ma sink current (v out = v cc ) ttl/cmos output leakage current 0.05 10 m a shdn = gnd/ en = v cc 0 v v out v cc en input threshold low, v inl 1.4 0.8 v en input threshold high, v inh 2.0 1.4 v power supply power supply current 4 8 ma no load 15 ma 3 k w load on both outputs shutdown power supply current 0.1 10 m a shdn input leakage current 1 m a shdn input threshold low, v inl 1.4 0.8 v shdn input threshold high, v inh 2.0 1.4 v ac characteristics transition region slew rate 6 12 30 v/ m sc l = 50 pf to 2500 pf, r l = 3 k w to 7 k w measured from +3 v to C3 v or C3 v to +3 v transmitter propagation delay ttl to rs-232 0.7 3.5 m st phlt 0.7 3.5 m st plht receiver propagation delay rs-232 to ttl 0.2 0.5 m st phlr 0.3 0.5 m st plhr receiver output enable time 125 500 ns t er receiver output disable time 160 500 ns t dr transmitter output enable time 250 m s shdn goes high transmitter output disable time 3.5 m s shdn goes low transmitter + to C propagation delay difference 300 ns receiver + to C propagation delay difference 100 ns specifications subject to change without notice. adm222/adm232a/adm242Cspecifications (v cc = +5 v 10%, c1Cc4 = 0.1 m f; all spec- ifications t min to t max unless otherwise noted.)
adm222/adm232a/adm242 rev. 0 C3C absolute maximum ratings * ( t a = +25?c unless otherwise noted) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 v v+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (v cc C 0.3 v) to +13 v vC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to C13 v input voltages t in . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 v output voltages t out . . . . . . . . . . . . . . . . . . . . (v+, +0.3 v) to (vC, C0.3 v) r out . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous power dissipation n-16 . . . . . . . . . . . . . . . . . . . . . . . 400 mw (derate 7.5 mw/ c above +70 c) q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . . 80 c/w power dissipation r-16n . . . . . . . . . . . . . . . . . . . . . 400 mw (derate 7 mw/ c above +70 c) q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . . 80 c/w power dissipation r-16w . . . . . . . . . . . . . . . . . . . . . 400 mw (derate 7 mw/ c above +70 c) q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . . 80 c/w power dissipation n-18 . . . . . . . . . . . . . . . . . . . . . . . 400 mw (derate 7 mw/ c above +70 c) q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . . 80 c/w power dissipation r-18w . . . . . . . . . . . . . . . . . . . . . 400 mw (derate 7 mw/ c above +70 c) q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . . 80 c/w operating temperature range industrial (a version) . . . . . . . . . . . . . . . . C40 c to +85 c storage temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature (soldering, 10 sec) . . . . . . . . . . . . . +300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c *this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specifica- tion is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. test circuits figure 1. transmitter propagation delay timing v v+ 0v v out t phlt t plht +3v v in figure 3. receiver propagation delay timing figure 4. receiver disable timing figure 2. receiver enable timing t dr v oh ?.5v receiver output en input v ol + 0.5v v oh v ol 0v 3v +0.8v +3v t er +3.5v receiver output en input 0v gnd v cc 50% v in v out t plhr t phlr +3v 0v
adm222/adm232a/adm242 rev. 0 C4C pin function description mnemonic function v cc power supply input , + 5 v 10%. v+ internally generated positive supply (+10 v nominal). vC internally generated negative supply (C10 v nominal). gnd ground pin. must be connected to 0 v. c1+ external capacitor 1, (+ terminal) is connected to this pin. c1C external capacitor 1, (C terminal) is connected to this pin. c2+ external capacitor 2, (+ terminal) is connected to this pin. c2C external capacitor 2, (C terminal) is connected to this pin. t in transmitter (driver) inputs. these inputs accept ttl/cmos levels. an internal 400 k w pull-up resistor to v cc is connected on each input. t out transmitter (driver) outputs. these are rs-232 levels (typically 9 v). r in receiver inputs. these inputs accept rs-232 signal levels. an internal 5 k w pull-down resistor to gnd is connected on each of these inputs. r out receiver outputs. these are ttl/cmos levels. nc no connect. no connections are required to this pin. en (adm242 only) active low digital input. may be used to enable or disable (three-state) both receiver outputs. shdn (adm222 & adm242) active low digital input. may be used to disable the device so that the power consumption is minimized. on the adm222 all drivers and receivers are disabled. on the adm242 the drivers are disabled but the receivers remain enabled. figure 8. adm222 dip & soic pin configurations figure 7. adm222 typical operating circuit figure 5. shutdown test circuit t dt + 5v transmitter output shdn input ?5v v+ 0v 3v v figure 6. transmitter shutdown disable timing nc = no connect nc c1+ v cc c2+ c2 v r1 out t1 in v+ c1 gnd t2 out t2 in r2 in r2 out r1 in t1 out 1 2 18 17 5 6 7 14 13 12 3 4 16 15 8 11 9 10 top view (not to scale) adm222 shdn v in v out 50pf 3k w shdn * internal 400k w pull-up resistor on each ttl/mos input ** internal 5k w pull-down resistor on each rs-232 input v cc +5v to +10v voltage doubler +5v to ?0v voltage inverter c1+ c1 v+ v c2+ c2 t1 adm222 t2 r1 r2 c1 0.1 f c2 0.1 f c3 0.1 f gnd ttl/cmos outputs r1 out r2 out t1 out t2 out r1 in r2 in t1 in t2 in ttl/cmos inputs * rs-232 outputs rs-232 inputs ** 2 4 6 5 12 11 13 10 3 7 15 8 14 9 c4 0.1 f +5v input c5 0.1 f 6.3v 17 16 18 shdn
adm222/adm232a/adm242 rev. 0 C5C figure 9. adm232a dip/soic pin configuration figure 11. adm242 dip/soic pin configuration figure 12. adm242 typical operating circuit figure 10. adm232a typical operating circuit t2 out c1+ shdn v cc c2+ c2 v r1 out t1 in v+ c1 gnd t2 in r2 in r2 out r1 in t1 out 1 2 18 17 5 6 7 14 13 12 3 4 16 15 8 11 9 10 top view (not to scale) adm242 en c1+ v+ v cc gnd c2 v t2 out r1 out t1 in t2 in c1 c2+ t1 out r1 in r2 in r2 out 1 2 16 15 5 6 7 12 11 10 3 4 14 13 8 9 top view (not to scale) adm232a v cc +5v to +10v voltage doubler +5v to ?0v voltage inverter c1+ c1 v+ v c2+ c2 t1 adm242 t2 r1 r2 c1 0.1 f c2 0.1 f c3 0.1 f gnd r1 out r2 out t1 out t2 out r1 in r2 in t1 in t2 in ttl/cmos inputs * rs-232 outputs rs-232 inputs ** 2 4 6 5 12 11 13 10 3 7 15 14 9 c4 0.1 f +5v input c5 0.1 f 6.3v 16 * internal 400k w pull-up resistor on each ttl/mos input ** internal 5k w pull-down resistor on each rs-232 input 18 shdn 17 en 1 8 ttl/cmos outputs * ttl/cmos outputs v cc +5v to +10v voltage doubler +5v to ?0v voltage inverter c1+ c1 v+ v c2+ c2 t1 adm232a t2 r1 r2 c1 0.1 f c2 0.1 f c3 0.1 f gnd r1 out r2 out t1 out t2 out r1 in r2 in t1 in t2 in ttl/cmos inputs * rs-232 outputs rs-232 inputs ** 1 3 5 4 11 10 12 9 2 6 14 7 13 8 c4 0.1 f +5v input c5 0.1 f 6.3v 15 * internal 400k w pull-up resistor on each ttl/mos input ** internal 5k w pull-down resistor on each rs-232 input
rev. 0 C6C adm222/adm232a/adm242Ctypical performance characteristics figure 16. transmitter output voltage vs. current figure 13. charge pump v+, vC vs. current figure 14. transmitter baud rate vs. load capacitance figure 17. charge pump v+, vC exiting shutdown figure 18. transmitter fully loaded slew rate figure 15. transmitter unloaded slew rate 9 2 4000 5 3 4 0 8 6 7 3000 2000 1000 20kb 60kb 120kb 200kb 400kb 500kb load capacitance ?pf transmitter output voltage ?v v cc = +5v t a = +25? tx1 = +5v; tx2 = 0v ?5v square wave both tx outputs loaded with 3k//cl 12 0 15 2 0 6 4 8 10 10 5 v cc = 5v t a = +25? v+ i+, ( | i | ) ?ma v+, ( | v | ) ?v aa aa | v | 12 0 14 2 0 6 4 8 10 10 6 i out ?ma t out ?v 4 2812 v cc = 5v t a = +25? t out high aaa | t out low | 10 90 100 0% 1 s 2.4v a2 5v 5v 10 90 100 0% 0.010v 100 s a4 5v 5v 10 90 100 0% ?.6 v 1 s 5v a1 5v
adm222/adm232a/adm242 rev. 0 C7C general information the adm222/adm232a/adm242 are high speed rs-232 drivers/receivers requiring a single digital +5 v supply. the rs- 232 standard requires transmitters that will deliver 5 v minimum on the transmission channel and receivers that can accept signal levels down to 3 v. the parts achieve this by integrating step up voltage converters and level shifting trans- mitters and receivers onto the same chip. cmos technology is used to keep the power dissipation to an absolute minimum. all devices contains an internal charge pump voltage doubler and a voltage inverter that generates 10 v from the +5 v input. four external 0.1 m f capacitors are required for the internal charge pump voltage converter. the adm222/adm232a/adm242 is a modification, enhance- ment and improvement to the ad230-ad241 family and derivatives thereof. it is essentially plug-in compatible and does not have materially different applications. circuit description the internal circuitry consists of four main sections. these are: a charge pump voltage converter ttl/cmos to rs-232 transmitters rs-232 to ttl/cmos receivers enable and shutdown functions. charge pump dc-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 10 v supply from the input 5 v level. this is done in two stages using a switched capacitor technique. the 5 v input supply is doubled to 10 v using capacitor c1 as the charge storage element. the C10 v level is also generated from the input 5 v supply using c1 and c2 as the storage elements. capacitors c3 and c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the charge pump capacitors c1 and c2 may also be reduced at the expense of higher output impedance on the v+ and vC supplies. the v+ and vC supplies may also be used to power external circuitry if the current requirements are small. please refer to the typical performance characteristics which shows the v+, vC output voltage vs. current. in the shutdown mode the charge pump is disabled and v+ decays to v cc while vC decays to 0 v. transmitter (driver) section the drivers convert ttl/cmos input levels into rs-232 output levels. with v cc = +5 v and driving a typical rs-232 load, the output voltage swing is 9 v. even under worst case conditions the drivers are guaranteed to meet the 5 v rs-232 minimum requirement. the input threshold levels are both ttl and cmos compat- ible with the switching threshold set at v cc /4. with a nominal v cc = 5 v the switching threshold is 1.25 v typical. unused inputs may be left unconnected, as an internal 400 k w pull- up resistor pulls them high forcing the outputs into a low state. as required by the rs-232 standard, the slew rate is limited to less than 30 v/ m s without the need for an external slew limiting capacitor, and the output impedance in the power-off state is greater than 300 w . receiver section the receivers are inverting level shifters which accept rs-232 input levels ( 3 v to 15 v) and translate them into 5 v ttl/ cmos levels. the inputs have internal 5 k w pull-down resistors to ground and are also protected against overvoltages of up to 30 v. the guaranteed switching thresholds are 0.8 v mini- mum and 2.4 v maximum which are well within the 3 v rs- 232 requirement. the low level threshold is deliberately positive as it ensures that an unconnected input will be interpreted as a low level. the receivers have schmitt trigger input with a hysteresis level of 0.5 v. this ensures error free-reception for both noisy inputs and for inputs with slow transition times enable and shutdown functions on the adm222, both receivers are fully disabled during shutdown. on the adm242, both receivers continue to operate normally. this function is useful for monitoring activity so that when it occurs, the device can be taken out of the shutdown mode. the adm242 also contains a receiver enable function ( en ) which can be used to fully disable the receivers, independent of shdn . applications information a selection of typical operating circuits is shown in figures 13 to 19. figure 19. transmitter output disable timing 10 90 100 0% 5v a1 5 s 2.0v 5v
adm222/adm232a/adm242 rev. 0 C8C printed in u.s.a. c1877C7.5C1/94 16-pin plastic dip (n-16) 16-lead wide soic (r-16w) 18-lead wide soic (r-18w) 16-lead narrow soic (r-16n) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 9 16 1 8 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) 0.070 (1.77) 0.045 (1.15) 0.840 (21.33) 0.745 (18.93) 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 8 9 16 1 0.0098 (0.25) 0.0040 (0.10) 0.3937 (10.00) 0.3859 (9.80) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0 ?8 0.0196 (0.50) 0.0099 (0.25) 0.019 (0.49) 0.05 (1.27) ref 0.104 (2.65) 0.012 (0.3) 0.413 (10.50) 0.419 (10.65) 0.042 (1.07) 0.013 (0.32) 0.030 (0.75) 0.299 (7.60) 1 8 9 16 0.1043 (2.65) 0.0926 (2.35) pin 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 1 18 10 9 0.4625 (11.75) 0.4469 (11.35) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0118 (0.30) 0.0040 (0.10) 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 8 0 0.0291 (0.74) 0.0098 (0.25) x 45 18-pin plastic dip (n-18) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 18 1 9 10 0.210 (5.33) max 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc 0.070 (1.77) 0.045 (1.15) seating plane 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) min 0.925 (23.49) 0.845 (21.47) outline dimensions dimensions shown in inches and (mm).
adm222/adm232a/adm242 rev. 0 C9C ordering guide model temperature range package option* ADM222An C40 c to +85 c n-18 ADM222Ar C40 c to +85 c r-18w adm232aan C40 c to +85 c n-16 adm232aarn C40 c to +85 c r-16n adm232aarw C40 c to +85 c r-16w adm242an C40 c to +85 c n-18 adm242ar C40 c to +85 c r-18w *for outline information see package information section.
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