www.fairchildsemi.com rev. 1.0.1 1/24/02 features powers intel imvp-ii cpu core 0.600v to 1.750v output voltage range ?% reference precision over temperature dynamic vid code change supported 5v to 24v input voltage range special controls for battery mode and deeper sleep mode meets imvp-ii load lines high ef?iency at all load currents active droop provides correct load lines true differential remote voltage sense current sense uses mosfets power good, over-current, ov, uvlo space-saving qsop24 applications notebook cpus internet appliances description the fan5242 provides the power, control and protection for the cpu in intel imvp-ii notebook pc applications. the ic integrates a pwm controller as well as monitoring and protection circuitry into a single 24 lead qsop package. it provides high ef?iency pwm at maximum load and hysteretic conversion at minimum load, and generates intel speci?d load lines in both performance and battery mode. the fan5242 includes an intel speci?d 5-input dac that adjusts the core pwm output voltage from 600mv to 1.750v in 25mv steps. the dac setting may be changed during operation, transition occurring in <100?ec. a precision reference, true differential remote sense, and a proprietary architecture with active droop provide excellent static and dynamic core voltage regulation. the fan5242 includes over-voltage, and over-current protection, and an enable. it is available in a qsop 24. typical application vin = 5?4v vid lines vcore gmuxsel dpslp dprslpvr + 13 1 5 7 6 24 15 12 11 10 9 8 18 19 20 21 23 fan5242 22 pgood en ss +5vin 16 17 3 4 14 2 fan5242 voltage regulator for imvp-ii notebook processors
2 rev. 1.0.1 1/24/02 fan5242 product specifications pin assignments pin description pin number pin name pin function description 1 agnd analog ground. return path for low power analog circuitry. this pin should be connected to a low impedance system ground plane to minimize ground loops. 2 vcc vcc. internal ic supply. connect to system 5v supply, and decouple with a 0.1? ceramic capacitor. 3 pwrgd power good flag. an open collector output that will be logic low if the output voltage is not within ?0% of the nominal output voltage setpoint. 4 enable output enable. a logic low on this pin will disable the output. an internal current source allows for open collector control. 5 fpwm forced pwm. a logic high on this pin forces the converter to remain in pwm mode. 6 slp sleep input. a resistor to ground on this pin overrides the vid settings. 7 freq frequency set. grounding this pin sets the switching frequency to 300khz. attaching it to vcc sets the frequency to 600khz. 8-12 vid0-4 voltage identification code inputs. these open collector/ttl compatible inputs will program the output voltage over the range specified in table 2. pull-ups are internal to the controller. 13 vbatt battery voltage input. connect to the main power source. 14 ss soft start. 15 ilim current limit. a resistor from this pin to ground sets the over current trip level. 16-17 vcore, vcore voltage feedback. connect these pins to the desired regulation point at the processor for true differential feedback. 18 boot bootstrap. input supply for high-side mosfet. 19 hdrv high side fet driver. connect this pin to the gate of an n-channel mosfet. the trace from this pin to the mosfet gate should be <0.5". 20 sw high side driver source and low side driver drain switching node. gate drive return for high side mosfet, and negative input for low-side mosfet current sense. 21 isns current sense. connect this pin to the sw node through a resistor to sense output current. 22 pgnd power ground. return pin for high currents flowing in low-side mosfet. connect directly to low-side mosfet source. 23 ldrv low side fet driver. connect this pin to the gate of an n-channel mosfet for synchronous operation. the trace from this pin to the mosfet gate should be <0.5". 24 pvcc power vcc. provides power to drive low-side mosfet. agnd vcc pwrgd enbl fpwm slp freq vid4 vid3 vid2 vid1 vid0 pvcc ldrv pgnd isns sw hdrv boot vcore vcore ilim ss vbatt 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 13 14 15
product specifications fan5242 rev. 1.0.1 1/24/02 3 absolute maximum ratings absolute maximum ratings are the values beyond which the device may be damaged or have its useful life impaired. functional operation under these conditions is not implied . recommended operating conditions parameter min. typ. max. units vcc supply voltage: 6.5 v vbatt 27 v boot, sw, hdrv pins 33 v boot to sw 6.5 v all other pins 0.3 vcc+0.3 v junction temperature (t j ) 10 150 c storage temperature 65 150 c lead soldering temperature, 10 seconds 300 c parameter conditions min. typ. max. units supply voltage vcc 4.75 5 5.25 v supply voltage vbatt 5 24 v ambient temperature (t a ) 10 85 c electrical speci?ations (vcc = 5v, vbatt = 5v 24v, and t a = recommended operating ambient temperature range using circuit of figure 1 unless otherwise noted.) parameter conditions min. typ. max. units power supplies vcc current operating, c l = 10pf 2.7 3.2 ma shut-down (enable=0) 6 30 a vbatt current operating 12 20 a shut-down (enable=0) 1 a uvlo threshold rising vcc 4.3 4.65 4.75 v falling 4.1 4.35 4.45 v regulator / control functions output voltage per table 1. output voltage vid 0.6 1.75 v initial accuracy 1 1 % vid static load regulation 2 2 % vid error amplifier gain 86 db error amplifier gbw 2.7 mhz error amplifier slew rate 1 v/ s ilim voltage r ilim = 30k ? 0.89 0.91 v over-voltage threshold 1.9 1.95 2.0 v over-voltage protection delay 1.6 3.2 s under-voltage shutdown disabled during vid code change 72 75 78 % vid under-voltage delay 1.2 1.6 s enable, input threshold logic low 1.2 v logic high 2 v
4 rev. 1.0.1 1/24/02 fan5242 product specifications output drivers hdrv output resistance sourcing 3.8 5 ? sinking 1.6 3 ? ldrv output resistance sourcing 3.8 5 ? sinking 0.8 1.5 ? oscillator frequency freq = high 255 300 345 khz freq = low 510 600 690 khz ramp amplitude, pk pk vbatt = 16v 2 v ramp offset 0.5 v ramp gain 125 mv/v reference, dac and soft-start vid input threshold logic low 1.21 v logic high 1.62 v vid pull-up current to internal 2.5v reference 12 a dac output accuracy 11% soft start current (i ss ) at start-up, v ss .< 0.5 20 26 32 a at start-up, 1.75 > v ss .> 0.5 350 500 650 a slp current source 9.5 10 10.5 a slp to vid mode threshold 1.71 1.75 1.78 v pwrgd vcore upper threshold 123 127 % vid vcore lower threshold falling edge 77 81 % vid rising edge 87 94 % vid pwrgd output low i pwrgd = 4ma 0.5 v leakage current v pullup = 5v 1 a electrical speci?ations(continued) (vcc = 5v, vbatt = 5v 24v, and t a = recommended operating ambient temperature range using circuit of figure 1 unless otherwise noted.) parameter conditions min. typ. max. units ramp amplitude vin -------------------------------------------
product specifications fan5242 rev. 1.0.1 1/24/02 5 table 1. output voltage programming codes 1 - logic high or open, 0 = logic low vid4 vid3 vid2 vid1 vid0 v out to cpu 11111 0.600 11110 0.625 11101 0.650 11100 0.675 11011 0.700 11010 0.725 11001 0.750 11000 0.775 10111 0.800 10110 0.825 10101 0.850 10100 0.875 10011 0.900 10010 0.925 10001 0.950 10000 0.975 01111 1.000 01110 1.050 01101 1.100 01100 1.150 01011 1.200 01010 1.250 01001 1.300 01000 1.350 00111 1.400 00110 1.450 00101 1.500 00100 1.550 00011 1.600 00010 1.650 00001 1.700 00000 1.750
6 rev. 1.0.1 1/24/02 fan5242 product specifications application circuit figure 1. fan5242 imvp-ii application circuit table 2. fan5242 application bill of materials reference manufacturer, part # quantity description comments c1-2 avx tpsv686*025#0150 2 68f, 25v tantalum c3, c9 any 2 1f ceramic c4, c8 any 2 220nf, ceramic c5-7 panasonic eefue0d271r 3 270f, polymer r1, r6 any 2 10k ? r2 any 1 117.3k ? , 1% r3 any 1 698 ? , 1% r4 any 1 2.74k ? , 1% r5 any 1 5.62k ? , 1% r7 any 1 10 ? , 1% r8 any 1 1.69k ? , 1% r9 any 1 tbd k ? , 1% d1 fairchild mbrd0520 1 0.5a, 20v schottky l1 coiltronics dr127-1r0 1 1.0h, 16a inductor r < 2.5m ? q1-3, q8 fairchild fdv301n 4 n mosfet sot-23 q4 fairchild fds6690a 1 30v n mosfet r = 17m ? q5-6 fairchild fds6680s 2 30v n mosfet w/ schottky r = 17m ? q7 fairchild fdv302p 1 p mosfet sot-23 u1 fairchild fan5242 1 cpu controller vin = 5 24v vid lines processor @ 17.6a gmuxsel dpslp dprslpvr + 13 1 5 7 6 24 15 12 11 10 r4 r3 r2 q2 r1 q1 q3 +5vin c9 c8 en pgood c5-7 +3.3v 9 8 18 19 20 21 23 u1 fan5242 22 +5vin 16 17 3 4 14 2 + c1-2 r6 r8 r7 r5 q4 q5 q6 q7 r9 q8 l1 c4 d1 c3 +5vin
product specifications fan5242 rev. 1.0.1 1/24/02 7 applications information overview the fan5242 is a high ef?iency and high precision dc/dc controller for imvp-ii powered notebooks and other portable applications. it provides the voltage necessary for portable applications processor core. the core voltage is programmed with a 5-bit vid. utilization of both input and output voltage feedback, and summing-mode compensation, allows for fast loop response over a wide range of input and output variations. this scheme has a superior range of output current operation and is free of the light load instabilities typical of current mode. the ic design allows for a mini- mum size design of magnetics and discrete transistors for minimum cost and space at maximum performance. active droop on the cpu output also minimizes the number of out- put capacitors required. also included are a number of addi- tional features to make design straightforward, including a pin to set the core voltage during deep sleep and deeper sleep. power architecture the power output of the fan5242 is generated from the unregulated input voltage using synchronous buck convert- ers. both the high-side and the low-side mosfet are n-channels to maximize ef?iency. the power output has a pin for setting output overcurrent; two pins for remote voltage-sense feedback; a pin that gener- ates a softstart; and an enable pin that can be used to shut- down the converter. loop description the control loop of the fan5242 uses summing-mode con- trol, and requires no external compensation. the control loop measures the current differentially across its low-side mos- fet, subtracting it from the ground voltage, and subtracts the sum from the reference voltage. in addition, it uses volt- age feed-forward to guarantee loop rejection of input voltage variation: the ramp amplitude is varied as a function of the input voltage. compensation of the control loop amounts to merely select- ing suitable output capacitors. most selections of common tantalum capacitors will result in a stable loop with adequate phase margin, as will oscons or polycaps. current limit the converter senses the voltage across the low-side n-chan- nel mosfet (from the sw pin to ground) and compares it to the voltage across a resistor from sw to the isns pins; it can also use a discrete resistor in series with the low-side mosfet for precision. if the voltage drop exceeds the set- point, the softstart capacitor is discharged, forcing the con- verter to re-softstart. selection of a current-limit resistor must include the toler- ance of the current-limit trip point, the mosfet r ds,on tolerance and temperature coef?ient, and the ripple current, in addition to the maximum output current. example: maximum dc output current is 18a, and the inductor is 1.0? at this current. the mosfets have a cumulative r ds,on = 8.5m ? at v gs = 4.5v, and will be running at 100?, at which its resistance is 30% higher than at 25?. peak current is dc output current plus peak ripple current: where t is the maximum period, v o is output voltage, and l is the inductance. the voltage across the mosfet at this current is the current source driving the external resistor is 100? minimum, so we must use softstart timing softstart of the converter is accomplished by attaching a capacitor to the ss pin. example: to get approximately a 1msec softstart, select a capacitor. light load mode because the converter is a synchronous buck, it can operate in two quadrants, which means that the ripple current is a constant independent of the load current. at light loads, this ripple current translates into poor ef?iency, since it causes circulating current losses in the mosfets. to optimize the ef?iency at light loads, then, the fan5242 switches from normal operation to a special light load when the current is low. light load occurs when the on-state drain-source volt- age is less than about 17mv. in light load mode, the fan5242 switches from pwm (pulse width modulation) to pfm (pulse frequency modulation), which reduces the gate drive current. it also turns off the low side drive completely, which further saves on gate current; in i p k i dc tv o 2l ---------- +18a 4 sec 1.25v 21 h ----------------------------------- - +21a == = vi pk r ds,on tc 21a 8.5m ? 1.3 == 230mv = r v i --- - 230mv 100 a ------------------ 2.39k ? == c it v --- - 10 a 1msec 1v ------------------------------------ 1 0 n f == =
fan5242 product specifications 8 rev. 1.0.1 1/24/02 this mode, the converter operates non-synchronously, using the output schottky. the switch to this mode of operation can be avoided by pulling the fpwm pin to vcc. setting the switching frequency connecting the freq pin to ground sets the switching fre- quency to 300khz. connecting the freq pin to vcc sets the switching frequency to 600khz. setting the voltage with slp deep sleep and deeper sleep voltages can be set with the slp pin. when the slp pin is open, the output voltage of the converter is set by the vid pins. when the slp pin has a resistor to ground, the output voltage of the converter will be equal to 10? ? r. thus, the deepsleep voltage of 1.173v can be obtained by turning on a switch with a 117.3k ? resistor to ground, and the deepersleep voltage of 700mv can be obtained by turning on a switch with a 698 ? resistor to ground. setting the load line with isns the load line can be set with a resistor between the switching node of the power mosfets and the isns pin, and further adjusted with a resistor from the isns pin to ground. the schematic of figure 3 shows how to obtain the nominal per- formance mode load line of 4mv/a, and how to use a switch connected to the gmuxsel signal to obtain the battery mode load line of 3mv/a. the isns pin can be quite sensitive to stray capacitance, and so it is important to use a low capacitance switch for the resistor to ground, such as the fairchild fdv301n shown in the figure. overvoltage protection when the output voltage of the converter exceeds approxi- mately 120% of nominal, it enters into over-voltage protec- tion, with the goal of protecting the load from damage. in over-voltage protection, the high-side mosfet is turned off and the low-side mosfet is turned on, crowbarring the out- put. once over-voltage protection is triggered, it remains on until power is recycled. power good power good is asserted when the output is within its speci- ?d tolerance. enable the enbl pin does the on/off control. pulling this pin low turns off the converter. thermal shutdown if the die temperature of the fan5242 exceeds safe limits, the ic shuts itself off. uvlo if the input voltages falls below the uvlo threshold, the fan5242 turns itself off.
product specifications fan5242 rev. 1.0.1 1/24/02 9 mechanical dimensions 24 lead qsop a 0.0668 1.75 symbol inches min. max. min. max. millimeters notes a1 0.0040 0.1 0.062 1.57 0.0532 1.35 0.0098 0.25 a2 0.054 1.37 b 0.008 0.012 0.20 0.30 d 0.337 0.344 8.55 8.74 h 0.150 0.157 3.81 3.99 0.016 0.050 0.40 1.27 e 0.025 bsc 0.635 bsc e l 0.228 0.244 5.79 6.20 0 8 0 8 3 6 5 5 2, 4 2 n24 24 ccc .004 0.10 c 0.0075 0.0098 0.19 0.25 notes: 1. 2. 3. 4. 5. 6. dimensioning and tolerancing per ansi y14.5m-1982. "d" and "e" do not include mold flash. mold flash or protrusions shall not exceed .006 inch (0.15mm). "l" is the length of terminal for soldering to a substrate. terminal numbers are shown for reference only. "b" and "c" dimensions include solder finish thickness. symbol "n" is the maximum number of terminals. h e a a2 d e b a1 c ccc c lead coplanarity seating plane l c
fan5242 product specifications life support policy fairchild s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. 1/24/02 0.0m 001 stock#ds30005242 ? 2001 fairchild semiconductor corporation ordering information part number temperature range package packing fan5242qsc 0 c to 85 c qsop-24 rails FAN5242QSCX 0 c to 85 c qsop-24 tape and reel
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