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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs 19-5651; rev 0; 12/10 general description the MAX5214/max5216 are pin-compatible, 14-bit and 16-bit digital-to-analog converters (dacs). the MAX5214/max5216 are single-channel, low-power, buff - ered voltage-output dacs. the devices use a precision external reference applied through the high resistance input for rail-to-rail operation and low system power consumption. the MAX5214/max5216 accept a wide 2.7v to 5.25v supply voltage range. power consump - tion is extremely low to accommodate most low-power and low-voltage applications. these devices feature a 3-wire spi k -/qspi k -/microwire k -/dsp-compatible serial interface to save board space and to reduce the complexity in isolated applications. the MAX5214/ max5216 minimize the digital noise feedthrough from input to output with sclk and din input buffers pow - ered down after completion of each serial input frame. on power-up, the MAX5214/max5216 reset the dac output to zero, providing additional safety for applica - tions that drive valves or other transducers that need to be off on power-up. the dac output is buffered resulting in a low supply current of 80 f a (max) and a low offset error of q 0.25mv. a zero level applied to the clr pin asynchronously clears the contents of the input and dac registers and sets the dac output to zero independent of the serial interface. the MAX5214/ max5216 are available in an ultra-small (3mm x 3mm), 8-pin f max ? package and are specified over the -40 n c to +105 n c extended industrial temperature range. applications 2-wire sensors communication systems automatic tuning gain and offset adjustment power amplifier control process control and servo loops portable instrumentation programmable voltage and current sources automatic test equipment features s low-power consumption (80a max) s 14-/16-bit resolution in a 3mm x 3mm, 8-pin max package s relative accuracy 0.25 lsb inl (MAX5214, 14-bit) 1.0 lsb inl (max5216, 16-bit) s guaranteed monotonic over all operating ranges s low gain and offset error s wide 2.7v to 5.25v supply range s rail-to-rail buffered output operation s safe power-on reset (por) to zero dac output s fast 50mhz, 3-wire, spi/qspi/microwire- compatible serial interface s schmitt-trigger inputs for direct optocoupler interface s asynchronous clr clears dac output to code 0 s high reference input resistance for power reduction s buffered voltage output directly drives 10k i loads note: all devices are specified over the -40c to +105c operating temperature range. +denotes a lead(pb)-free/rohs-compliant package. ordering information spi/qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. max is a registered trademark of maxim integrated products, inc. functional diagram part pin-package resolution (bits) MAX5214 gua+ 8 f max 14 max5216 gua+ 8 f max 16 se ri al-t o- par allel co n ve rter input register dac register clr por 14 -/16-bit dac buffer cs sc lk din gnd out MAX5214 max5216 v dd ref
2 ______________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ............................................................. -0.3v to +6v ref, out, clr to gnd .............................. -0.3v to the lower of (v dd + 0.3v) and +6v sclk, din, cs to gnd ........................................... -0.3v to +6v continuous power dissipation (t a = +70 n c) f max (derate at 4.8mw/ n c above +70 n c) ................. 387mw maximum current into any input or output .................... q 50ma operating temperature range ........................ -40 n c to +105 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c electrical characteristics (v dd = 5v, v ref = 5v, c l = 100pf, r l = 10k i , t a = -40 n c to +105 n c, unless otherwise noted. typical values are at t a = +25 n c.) absolute maximum ratings package thermal characteristics (note 1) f max junction-to-ambient thermal resistance ( b ja ) ........ 206 n c/w junction-to-case thermal resistance ( b jc ) ............... 42 n c/w note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . parameter symbol conditions min typ max units static accuracy (note 2) resolution n MAX5214 14 bits max5216 16 integral nonlinearity inl MAX5214 (14-bit) (note 3) -1 q 0.25 +1 lsb max5216 (16-bit) (note 3) -3 q 1 +3 differential nonlinearity dnl MAX5214 (14-bit) (note 3) -1 q 0.1 +1 lsb max5216 (16-bit) (note 3) -1 q 0.1 +1 offset error oe (note 4) -1.25 q 0.25 +1.25 mv offset-error drift q 0.5 f v/ n c gain error ge (note 4) -0.06 -0.04 0 %fs gain temperature coefficient q 2 ppmfs/ n c reference input reference-input voltage range v ref 2 v dd v reference-input impedance r ref 200 256 k i dac output output voltage range no load (typical) v dd v 10k i load 0.2 v dd - 0.2 dc output impedance 0.1 i capacitive load (note 5) c l series resistance = 0 i 0.1 nf series resistance = 1k i 15 f f resistive load (note 5) r l 5 k i short-circuit current v dd = 5.25v -10 q 5 +10 ma power-up time from power-down mode 25 f s
_______________________________________________________________________________________ 3 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs electrical characteristics (continued) (v dd = 5v, v ref = 5v, c l = 100pf, r l = 10k i , t a = -40 n c to +105 n c, unless otherwise noted. typical values are at t a = +25 n c.) note 2: static accuracy tested without load. note 3: linearity is tested within 20mv of gnd and v dd . note 4: gain and offset is tested within 100mv of gnd and v dd . note 5: guaranteed by design; not production tested. note 6: all timing specifications measured with v il = v gnd , v ih = v dd . parameter symbol conditions min typ max units digital inputs (sclk, din, cs , clr ) input high voltage v ih 0.7 x v dd v input low voltage v il 0.3 x v dd v input leakage current i in v in = 0v or v dd q 0.1 q 1 f a input capacitance c in 10 pf hysteresis voltage v hys 0.15 v dynamic performance (note 5) voltage-output slew rate sr positive and negative 0.5 v/ f s voltage-output settling time 1/4 scale to 3/4 scale, to p 0.5 lsb, 14-bit 14 f s reference -3db bandwidth bw hex code = 2000 (MAX5214), hex code = 8000 (max5216) 100 khz digital feedthrough code = 0, all digital inputs from 0v to v dd , sclk < 50mhz 0.5 nvs dac glitch impulse major code transition 2 nvs output noise 10khz 70 nv/ hz integrated output noise 0.1hz to 10hz 1.5 f v p-p power requirements supply voltage v dd 2.7 5.25 v supply current i dd no load; all digital inputs at 0v or v dd , supply current only; excludes reference input current, midscale 70 80 f a power-down supply current no load, all digital inputs at 0v or v dd 0.4 2 f a timing characteristics (notes 5 and 6) (figures 1 and 2) serial clock frequency f sclk 0 50 mhz sclk pulse-width high t ch 8 ns sclk pulse-width low t cl 8 ns cs fall to sclk fall setup time t css0 8 ns cs fall to sclk fall hold time t csh0 0 ns cs rise to sclk fall hold time t csh1 0 ns cs rise to sclk fall t csa 12 ns sclk fall to cs fall t csf 100 ns din to sclk fall setup time t ds 5 ns din to sclk fall hold time t dh 4.5 ns cs pulse-width high t cspw 20 ns clr pulse-width low t clpw 20 ns clr rise to cs fall t csc 20 ns
4 ______________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs figure 1. 16-bit serial-interface timing diagram (MAX5214) figure 2. 24-bit serial-interface timing diagram (max5216) din15 1 2 3 4 5 1 6 7 8 14 15 16 din14 din13 t ds t dh t cp din12 din11 din10 din9 din8 din2 din1 din0 din15 din sclk cs t cs h0 t ch t cl t cs s0 t csa t clpw t csc t csf t cspw clr t ch1 din23 din22 din21 din20 din19 din18 din17 din16 din2 din1 din0 din23 1 2 3 4 5 6 7 8 22 23 24 1 din sclk cs t ch1 t csa t csf t clpw t csc t cspw clr t ds t dh t cp t ch t cl t cs h0 t cs s0
_______________________________________________________________________________________ 5 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating characteristics (t a = +25c, unless otherwise noted.) integral nonlinearity vs. digital input code MAX5214 toc01a digital input code (lsb) inl (lsb) 12,288 8192 4096 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 MAX5214 v dd = 5v -1.0 0 16,384 integral nonlinearity vs. digital input code MAX5214 toc01b digital input code (lsb) inl (lsb) 49,152 32,768 16,384 -2.0 -1.0 0 1.0 2.0 3.0 -3.0 0 65,536 max5216 v dd = 5v integral nonlinearity vs. supply voltage MAX5214 toc02a supply voltage (v) inl (lsb) 4.7 4.2 3.2 3.7 -0.75 -0.50 -0.25 0 0.50 max min 0.25 0.75 1.00 -1.00 2.7 5.2 MAX5214 supply voltage (v) inl (lsb) 4.7 4.2 3.7 3.2 -2 -1 0 1 2 3 -3 2.7 5.2 integral nonlinearity vs. supply voltage MAX5214 toc02b max5216 max min differential nonlinearity vs. digital input code MAX5214 toc04a digital input code (lsb) inl (lsb) 12,288 16,384 8192 4096 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 MAX5214 v dd = 5v integral nonlinearity vs. temperature MAX5214 toc03a temperature (c) inl (lsb) 80 60 -20 0 20 40 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 -1.00 -40 100 MAX5214 v dd = 5v max min differential nonlinearity vs. digital input code MAX5214 toc04b digital input code (lsb) inl (lsb) 49,152 65,536 32,768 16,384 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 max5216 v dd = 5v integral nonlinearity vs. temperature MAX5214 toc03b temperature (c) inl (lsb) 80 60 40 20 0 -20 -2 -1 0 1 2 3 -3 -40 100 max min max5216 v dd = 5v differential nonlinearity vs. supply voltage MAX5214 toc05a supply voltage (v) inl (lsb) 4.7 4.2 3.7 3.2 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 2.7 5.2 MAX5214 max min
6 ______________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) differential nonlinearity vs. supply voltage MAX5214 toc05b supply voltage (v) inl (lsb) 4.7 4.2 3.7 3.2 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 2.7 5.2 max5216 max min differential nonlinearity vs. temperature MAX5214 toc06a temperature (c) max min inl (lsb) 100 80 40 60 0 20 -20 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 -40 MAX5214 v dd = 5v differential nonlinearity vs. temperature MAX5214 toc06b temperature (c) max min inl (lsb) 100 80 40 60 0 20 -20 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 -40 max5216 v dd = 5v offset error vs. supply voltage MAX5214 toc07a supply voltage (v) offset error (mv) 5.2 4.7 4.2 3.7 3.2 0.25 0.50 0.75 1.00 1.25 0 2.7 MAX5214 offset error vs. temperature MAX5214 toc08b temperature (c) offset error (mv) 0.40 0.60 0.80 1.00 1.20 0 0.20 100 80 40 60 0 2 0 -20 -40 max5216 v dd = 5v offset error vs. supply voltage MAX5214 toc07b supply voltage (v) offset error (mv) 5.2 4.7 4.2 3.7 3.2 0.25 0.50 0.75 1.00 1.25 0 2.7 max5216 full-scale output vs. supply voltage MAX5214 toc09a supply voltage (v) 4.7 4.2 3.7 3.2 2.4987 2.4989 2.4991 2.4993 2.4995 2.4985 2.7 MAX5214 v ref = 2.5v output voltage (v) offset error vs. temperature MAX5214 toc08a temperature (c) offset error (mv) 0.25 0.50 0.75 1.00 1.25 0 100 80 40 60 0 2 0 -20 -40 MAX5214 v dd = 5v full-scale output vs. supply voltage MAX5214 toc09b supply voltage (v) output voltage (v) 4.7 5.2 4.2 3.7 3.2 2.4987 2.4989 2.4991 2.4993 2.4995 2.4985 2.7 max5216 v ref = 2.5v
_______________________________________________________________________________________ 7 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) supply current vs. temperature MAX5214 toc11a temperature (c) supply current (a) 80 60 20 40 0 -20 62 64 66 68 70 72 74 76 78 80 60 -40 100 MAX5214 no load v dd = v ref v out = midscale v dd = 4v v dd = 2.7v v dd = 5.25v v dd = 5v MAX5214 toc11c supply current (a) 45 50 55 60 65 70 75 80 40 supply current vs. temperature temperature (c) 80 60 20 40 0 -20 -40 100 v dd = 4v MAX5214 no load v dd = v ref v out = zeroscale v dd = 5v v dd = 5.25v v dd = 2.7v supply current vs. temperature MAX5214 toc11b temperature (c) supply current (a) 80 60 20 40 0 -20 62 64 66 68 70 72 74 76 78 80 60 -40 100 max5216 no load v dd = v ref v out = midscale v dd = 4v v dd = 2.7v v dd = 5.25v v dd = 5v MAX5214 toc11d supply current (a) 45 50 55 60 65 70 75 80 40 supply current vs. temperature temperature (c) 80 60 20 40 0 -20 -40 100 v dd = 4v max5216 no load v dd = v ref v out = zeroscale v dd = 5v v dd = 5.25v v dd = 2.7v full-scale output vs. temperature MAX5214 toc10b temperature (c) output voltage (v) 2.4907 2.4909 2.4911 2.4913 2.4915 2.4905 100 80 40 60 0 2 0 -20 -40 max5216 v dd = 5v full-scale output vs. temperature MAX5214 toc10a temperature (c) output voltage (v) 2.4982 2.4984 2.4986 2.4988 2.4990 2.4980 100 80 40 60 0 2 0 -20 -40 MAX5214 v dd = 5v
8 ______________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) major code transition (0x8000 to 0x7fff) MAX5214 toc15a out = midscale ac-coupled 1mv /div 4s /div max5216 v dd = 5v no load ref = 5v MAX5214 toc12a supply current (a) supply current vs. supply voltage supply voltage (v) 4.7 4.2 3.2 3.7 2.7 5.2 62 64 66 68 70 72 74 76 78 80 60 max5216 MAX5214 no load v dd = v ref v out = midscale supply current vs. supply voltage (power-down mode) MAX5214 toc13 supply voltage (v) supply current (a) 4.7 4.2 3.7 3.2 0.20 0.40 0.60 0.80 1.00 1.20 1.40 0 2.7 5.2 no load t a = +85c t a = 0c t a = +105c t a = +25c t a = -40c supply current vs. supply voltage supply voltage (v) 4.7 4.2 3.2 3.7 2.7 5.2 MAX5214 toc12b supply current (a) 45 50 55 60 65 70 75 80 40 max5216 MAX5214 no load v dd = v ref v out = zeroscale v out vs. time (exiting power-down mode) MAX5214 toc14a out = midscale 1 v/ div 0v 10s / div max5216 r l = 10ki v dd = 5v v ref = 5v v out vs. time (exiting power-down mode) MAX5214 toc14b out = midscale 1 v/ div 10s / div MAX5214 r l = 10ki v dd = 5v v ref = 5v 0v
_______________________________________________________________________________________ 9 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) major code transition (0x2000 to 0x1fff) MAX5214 toc15c 1mv/div out = midscale ac-coupled 4s/div MAX5214 v dd = 5v ref = 5v no load major code transition (0x3fff to 0x8000) MAX5214 toc15b 1mv/div out = midscale ac-coupled 4s/div max5216 v dd = 5v ref = 5v no load major code transition (0x1fff to 0x2000) MAX5214 toc15d 1mv/div out = midscale ac-coupled 4s/div MAX5214 v dd = 5v ref = 5v no load settling time high MAX5214 toc16a 3.75v 1.25v 2s/div max5216 v dd = 5v ref = 5v settling time low MAX5214 toc16b 3.75v 1.25v 2s/div max5216 v dd = 5v ref = 5v settling time high MAX5214 toc16c 3.75v 1.25v 2s/div MAX5214 v dd = 5v ref = 5v
10 _____________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) digital feedthrough MAX5214 toc17 v out ac-coupled 1m v/ div v sclk 5v /d iv 40ns/ div settling time low MAX5214 toc16d 3.75v 1.25v 2s/div MAX5214 v dd = 5v ref = 5v output voltage vs. output current MAX5214 toc18 output current (ma) output voltage (v) 5 4 3 2 1 2.30 2.35 2.40 2.45 2.50 2.55 2.25 0 6 v dd = 5v v ref = 5v supply current vs. digital input voltage MAX5214 toc19 digital input voltage (v) digital supply current (a) 500 1000 1500 2000 2500 3000 3500 0 0 1 2 3 4 5 v ddi = 2.7v high t0 low v ddi = 2.7v low t0 high v dd = 5v low t0 high v ddi = 5v high t0 low reference input bandwidth vs. frequency MAX5214 toc20 input frequency (khz) attenuation (db) 100 10 -15 -10 -5 0 5 -20 1 1000
______________________________________________________________________________________ 11 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs pin description pin configuration detailed description the MAX5214/max5216 are pin-compatible and soft - ware-compatible 14-bit and 16-bit dacs. the MAX5214/ max5216 are single-channel, low-power, high-refer - ence input resistance, and buffered voltage-output dacs. the MAX5214/max5216 minimize the digital noise feedthrough from their inputs to their outputs by powering down the sclk and din input buffers after completion of each data frame. the data frames are 16-bit for the MAX5214 and 24-bit for the max5216. on power-up, the MAX5214/max5216 reset the dac output to zero, providing additional safety for applications that drive valves or other transducers which need to be off on power-up. the MAX5214/max5216 contain a segmented resistor string-type dac, a serial-in/parallel-out shift reg - ister, a dac register, power-on-reset (por) circuit, clr to asynchronously clear the device independent of the serial interface, and control logic. on the falling edge of the clock (sclk) pulse, the serial input (din) data is shifted into the device, msb first. output amplifier (out) the MAX5214/max5216 include an internal buffer on the dac output. the internal buffer provides improved load regulation and transition glitch suppression for the dac output. the output buffer slews at 0.5v/ f s and drives up to 10k i in parallel with 100pf. the analog supply voltage (v dd ) determines the maximum output voltage range of the device as v dd powers the output buffer. dac reference (ref) the external reference input features a typical input impedance of 256k i and accepts an input voltage from +2v to v dd . connect an external voltage supply between ref and gnd to apply an external reference. visit www.maxim-ic.com/products/references for a list of available voltage-reference devices. ou t cl r di n 1 2 8 7 gn d v dd cs sc lk re f m ax top view 3 4 6 5 MAX5214 max5216 pin name function 1 ref reference voltage input. bypass ref with a 0.1 f f capacitor to gnd. 2 cs active-low chip-select input 3 sclk serial-clock input 4 din data in 5 clr active-low asynchronous digital-clear input. drive clr low to clear the contents of the input and dac registers and set the dac output to zero. 6 out buffered dac output 7 v dd supply voltage. bypass v dd with a 0.1 f f capacitor to gnd. 8 gnd ground
12 _____________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs table 1. operating mode truth table (MAX5214) serial interface the MAX5214/max5216 3-wire serial interface is com - patible with microwire, spi, qspi, and dsp. the interface provides three inputs: sclk, cs , and din. the chip-select input ( cs ) frames the serial data loading at din. following a chip-select input high-to-low transition, the data is shifted synchronously and latched into the input register on each falling edge of the serial-clock input (sclk). each serial word is 16-bit for the MAX5214 and 24-bit for the max5216. the first 2 bits are the control bits followed by 14 data bits (msb first) for the MAX5214 and 22 data bits (msb first) for the max5216 as shown in tables 1 and 2. the serial input register transfers its contents to the input registers after loading 16/24 bits of data and updates the dac output immedi - ately after the data is received on the 16-/24-bit falling edge of the clock. to initiate a new data transfer, drive cs high and keep cs high for a minimum of 20ns before the next write sequence. the sclk can be either high or low between cs write pulses. figures 1 and 2 show the timing diagram for the complete 3-wire serial interface transmission. the max5216 dac code is unipolar binary with v out = (code/65,535) x v ref . the MAX5214 dac code is unipolar binary with v out = (code/16,383) x v ref . see tables 1 and 2. table 2. operating mode truth table (max5216) 16-bit word function control bits data bits msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 x x x x x x x x x x x x x x no operation 1 0 0 x a1 a0 x x x x x x x x x x power-down (see table 3) 0 1 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 write through 1 1 reserved, do not use 24-bit word function control bits data bits msb lsb d23 d22 d21 d20 d19 d18 d17 d16 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5C d0 0 0 x x x x x x x x x x x x x x x x x no operation 1 0 0 x a1 a0 x x x x x x x x x x x x x power-down (see table 3) 0 1 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 x write through 1 1 reserved, do not use
______________________________________________________________________________________ 13 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs writing to the devices 1) drive cs low, enabling the shift register. 2) clock 16/24 bits of data into din (msb first and lsb last), observing the specified setup and hold times. 3) after clocking in the last data bit, drive cs high. cs must remain high for 20ns before the next transmis - sion is started. figure 1 shows a write operation for the transmission of 16 bits. if cs is driven high at any point prior to receiving 16 bits, the transmission is discarded. figure 2 shows a write operation for the transmission of 24 bits. if cs is driven high at any point prior to receiving 24 bits, the transmission is discarded. clear ( clr ) the MAX5214/max5216 feature an asynchronous active- low clr logic input that sets the dac output to zero. driving clr low clears the contents of both the input and dac registers and also aborts the on-going spi com - mand. to allow a new spi command, drive clr high. power-down mode the MAX5214/max5216 feature a software-controlled power-down mode. in power-down, the output discon - nects from the buffer and is grounded with one of the three selectable internal resistors. see table 3 for the selectable internal resistor values in power-down mode. the selected mode takes effect on the 16th sclk falling edge of the MAX5214 and 24th sclk falling edge of the max5216. the serial interface remains active in power- down mode. in order to abort the power-down mode selection, pull cs high prior to the 16th (MAX5214) or 24th (max5216) sclk falling edge. the contents of the dac register remain valid while in power-down mode, allowing for the dac to return to previous code by writing 0x8000 for the MAX5214 or 0x800000 for the max5216 (table 3). a write to the write-through register causes the device to immediately exit power-down mode and transi - tion to the requested code (see tables 1 and 2). table 3. power-down modes table 4. max5216 input code vs. output voltage table 5. MAX5214 input code vs. output voltage a1 a0 description dac operation condition 0 0 dac powers up and returns to its previous code setting. normal operation 0 1 dac powers down; out is high impedance. power-down 1 0 dac powers down; out connects to ground through an internal 100k i resistor. 1 1 dac powers down; out connects to ground through an internal 1k i resistor. dac latch contents analog output (v out ) msb g lsb 1111 1111 1111 11xx v ref x (16,383/16,383) 1000 0000 0000 00xx v ref x (8,192/16,383) = 1/2 v ref 0000 0000 0000 01xx v ref x (1/16,383) 0000 0000 0000 00xx 0v dac latch contents analog output (v out ) msb g lsb 1111 1111 1111 1111 v ref x (65,535/65,535) 1000 0000 0000 0000 v ref x (32,768/65,535) = 1/2 v ref 0000 0000 0000 0001 v ref x (1/65,535) 0000 0000 0000 0000 0v
14 _____________________________________________________________________________________ MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs applications information power-on reset (por) when first power is applied to v dd , the input registers are set to zero so the dac output is set to code zero. to optimize dac linearity, wait until the supplies have settled. the MAX5214/max5216 output voltage range is 0 to v ref . power supplies and bypassing considerations bypass v dd with high-quality 0.1f ceramic capacitors to a low-impedance ground as close as possible to the device. minimize lead lengths to reduce lead inductance. connect the gnd to the analog ground plane. layout considerations digital and ac transient signals on gnd can create noise at the output. connect gnd to the star ground for the dac system. refer the remote dac loads to this system ground for the best possible performance. use proper grounding techniques, such as a multilayer board with a low-inductance ground plane, or star connect all ground return paths back to the MAX5214/max5216 gnd. carefully lay out the traces between channels to reduce ac cross-coupling. do not use wire-wrapped boards and sockets. use shielding to improve noise immunity. do not run analog and digital signals parallel to one another, especially clock signals. avoid routing digital lines underneath the MAX5214/max5216 package. definitions integral nonlinearity (inl) inl is the deviation of the measured transfer function from a straight line drawn between two codes once offset and gain errors have been nullified. differential nonlinearity (dnl) dnl is the difference between an actual step height and the ideal value of 1 lsb. if the magnitude of the dnl is greater than -1 lsb, the dac guarantees no missing codes and is monotonic. offset error offset error indicates how well the actual transfer func - tion matches the ideal transfer function at a single point. typically, the point at which the offset error is specified is at or near the zero-scale point of the transfer function. gain error gain error is the difference between the ideal and the actual full-scale output voltage on the transfer curve, after nullifying the offset error. this error alters the slope of the transfer function and corresponds to the same percentage error in each step. settling time the settling time is the amount of time required from the start of a transition, until the dac output settles to the new output value within the converters specified accuracy. digital feedthrough digital feedthrough is the amount of noise that appears on the dac output when the dac digital control lines are toggled. digital-to-analog glitch impulse a major carry transition occurs at the midscale point where the msb changes from low to high and all other bits change from high to low, or where the msb changes from high to low and all other bits change from low to high. the duration of the magnitude of the switching glitch during a major carry transition is referred to as the digital-to-analog glitch impulse. digital-to-analog power-up glitch impulse the digital-to-analog power-up glitch is the duration of the magnitude of the switching glitch that occurs as the device exits power-down mode.
______________________________________________________________________________________ 15 MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs typical operating circuit chip information process: bicmos package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. c cs clr out output ref sc lk din max6029 100nf v dd gnd dac power supply 4.7f in out 100pf MAX5214 max5216 package type package code outline no. land pattern no. 8 f max u8+3 21-0036 90-0092
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. MAX5214/max5216 14-/16-bit, low-power, high-performance, buffered single dacs revision history revision number revision date description pages changed 0 12/10 initial release

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