february 1997 ML6599 hot-insertable active scsi terminator general description the ML6599 bicmos 9 line scsi terminator provides active termination in scsi systems using single ended drivers and receivers. active scsi termination helps to effectively control analog transmission line effects such as ringing, noise, crosstalk, and ground bounce. in addition, the ML6599 provides support for hot-insertability on the scsi bus. the ML6599 provides a v-i characteristic optimized to minimize transmission line effects during both signal negation and assertion using a mosfet-based architecture. the desired v-i characteristic is achieved by trimming one resistor in the control block. internal clamping controls signal assertion transients and provides current sink capability to handle active negation driver overshoots above 2.85v. it provides a 2.85v reference through an internal low dropout (1v) linear regulator. the ML6599 also provides a disconnect function which effectively removes the terminator from the scsi bus. the disconnect mode capacitance is typically less than 5pf per line. current limiting and thermal shutdown protection are also included. block diagram nclamp = negative clamp termpwr linear regulator 1v dropout 2.85v discnkt control block v ref r trim mosfets with i max = 24ma nclamp 9 termination lines . . . . . . . . . nclamp nclamp . . . . . . gnd l2 l9 l1 v ref 2.85v features n fully monolithic ic solution providing active termination for 9 lines of the scsi bus n provides on board support for hot-insertability on the scsi bus n low dropout voltage (1v) linear regulator, trimmed for accurate termination current n output capacitance typically < 5pf n disconnect mode logic pin to disconnect terminator from the scsi bus, <100a n current sinking can sink current in excess of 10ma per line to handle active negation driver overshoots above 2.85v n negative clamping on all lines to handle signal assertion transients n regulator can source 200ma and sink 100ma while maintaining regulation n current limit & thermal shutdown protection rev. 1.0 10/25/2000
ML6599 2 rev. 1.0 10/25/2000 pin configuration 20-pin tssop 16-pin soic termpwr nc nc gnd discnkt nc l1 l2 l9 l8 l7 v ref l6 l5 l4 l3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 termpwr hs nc gnd nc discnkt nc hs l1 l2 l9 l8 hs l7 v ref l6 l5 l4 hs l3 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 note : the discnkt line has a 200ky internal pullup resistor connected to the supply. this pin should be left floating for normal operation and should be connected to ground to enable the function. pin description name desc ription termpwr t ermination power. should be connected to the scsi termpwr line. a 10f tantalum local bypass capacitor is recommended per system, as shown in the application diagram l1 signal termination 1. scsi bus line 1 l2 signal termination 2. scsi bus line 2 l3 signal termination 3. scsi bus line 3 l4 signal termination 4. scsi bus line 4 l5 signal termination 5. scsi bus line 5 l6 signal termination 6. scsi bus line 6 l7 signal termination 7. scsi bus line 7 l8 signal termination 8. scsi bus line 8 l9 signal termination 9. scsi bus line 9 name desc ription v ref 2.85v ref output. external decoupling with a 10f tantalum in parallel with a 0.1f ceramic capacitor is recommended, as shown in the application diagram. discnkt disconnect terminator. logic input to disconnect the terminator from the bus when the scsi device no longer needs termination due to not being the last device on the bus or otherwise. active low input. gnd ground. signal ground (0v) hs heat sink ground. should be connected to gnd.
ML6599 rev. 1.0 10/25/2000 3 absolute maximum ratings signal line voltage ................. C0.3 to termpwr + 0.3v regulator output current ......................... C100 to 300ma termpwr voltage ........................................... C0.3 to 7v storage temperature ................................. C65c to 150c soldering temperature ................................. 260c for 10s thermal impedance ( q ja ) soic ................................................................ 95c/w tssop ............................................................ 110c/w operating conditions termpwr voltage ........................................ 4v to 5.25v operating temperature .................................. 0c to 70c electrical characteristics unless otherwise stated, these specifications apply for 4v - termpwr - 5.25v, and t a = 0c to 70c (note 1) parameter conditions min typ max units supply termpwr supply current l1Cl9 = open, discnkt = open 4.5 5.5 ma l1Cl9 = 0.2 v, discnkt = open 225 250 ma disconnect mode current discnkt = 0 (active) 75 100 a discnkt input low voltage 1.0 v input high voltage termpwr C 1.0 v output output high voltage measuring each signal line 2.8 2.85 2.9 v while other eight are high output current v out = 0.2v, measuring each signal 20 24 ma (normal mode) line while the other eight are high hot insertion peak current termpwr = 0v, v ref = 0v 1 2 a any signal line (l1Cl9) at 2.85v output clamp level i out = C30ma (note 2) C0.15 0 0.15 v sinking current (per line) v out = 3.3v (per line) 10 12 ma output capacitance l1 thru l9, discnkt = 0 4 5 pf (micro linear method) 2v p-p 100khz square wave applied biased at 1v d.c. output capacitance l1 thru l9, discnkt = 0 6 7 pf (x3t9.2/855d method) 0.4v p-p , 1mhz square wave applied biased at 0.5v d.c. regulator output voltage sourcing 0-200ma 2.8 2.85 2.9 v sinking 0-100ma 2.8 2.85 2.9 v sinking current v = 3.5v 125 150 ma short circuit current v ref = 0v 150 ma v ref = 5v 300 ma dropout voltage l1Cl9 = 0.2v 1.0 1.2 v thermal shutdown 170 c note 1: limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
ML6599 4 rev. 1.0 10/25/2000 functional description scsi terminators are used to decrease the transmission line effects of scsi cable. termination must be provided at the beginning and end of the scsi bus to ensure that data errors due to reflections on the bus are eliminated. with the increasing use of higher data rates and cable lengths in scsi subsystems, active termination has become necessary. active termination also minimizes power dissipation and can be activated or deactivated under software control, thus eliminating the need for end user intervention. the v-i characteristics of popular scsi termination schemes are shown in figure 1. theoretically, the desired v-i characteristics are the boulay type for signal assertion (high to low) and the ideal type for signal negation (low to high). the ML6599 with its mosfet- based nonlinear termination element provides the most optimum v-i characteristics for both signal assertion and negation. ideal ML6599 boulay 220/330 2.85v 2.7v 2.5v 0.2v terminator (source) driver (sink) 20ma 40ma 24ma 48ma v i figure 1. v-1 characteristics of various scsi termination schemes the ML6599 provides active termination for 9 signal lines, thus accommodating basic scsi which requires 9 lines to be terminated. when used with the ML6599, wide scsi, which requires 27, 36 or 45 lines to be terminated, can also be accommodated. the ML6599 integrates an accurate voltage reference (1v dropout voltage) and 9 mosfet-based termination lines. a single internal resistor is trimmed to tune the v-i characteristic of the mosfets. the voltage reference circuit produces a precise 2.85v level and is capable of sourcing 24ma into each of the nine terminating lines when low (active). when the signal line is negated (driver turns off), the terminator pulls the signal line back to 2.85v. the regulator will source 200ma and sink 100ma while maintaining regulation of 2.85v. the ML6599 scsi terminator provides an active low control signal ( discnkt ) which has an internal 200ky pull-up resistor. the discnkt input isolates the ML6599 from the signal lines and effectively removes the terminator from the scsi bus with a disconnect mode current of less than 100a when pulled low. in addition, the ML6599 provides for negative clamping of signal transients and also supports current sink capability in excess of 10ma per signal line to handle active negation driver overshoot above 2.85v, a common occurrence with scsi transceivers. disconnect mode capacitance is a very critical parameter in scsi systems. the ML6599 provides a capacitance contribution of only 5pf. hot-insertability hot insertion of a scsi device refers to the act of plugging a scsi device which is initially unpowered into a powered scsi bus. the scsi device subsequently draws power from the termpwr line during its startup routine and thereafter. hot removal refers to the act of removing a powered scsi device from a powered scsi bus. a device which performs both tasks with no physical damage to itself or other devices on the bus, nor which alters the existing state of the bus by drawing excessive currents, is termed hot-swappable. the ML6599 hot-insertable scsi terminator typically draws 1a from any given output line (l1Cl9) during a hot-insertion/removal procedure, thereby protecting itself and preserving the state of the bus. the low insertion current is achieved by effectively shorting the gate to drain of the output pmos device until the 2.85v reference (v ref ) has powered up. a second pmos in series with a schottky diode is used as the shorting bypass device. after v ref reaches a sufficient level, the bypass device is turned off and the part operates normally. figure 2 gives an application diagram showing a typical scsi bus configuration. to ensure proper operation, the termpwr pin must be connected to the scsi termpower line. as outlined in annex g of the ansi scsi-3 parallel interface specification (x3t9.2/855d), the scsi bus termination shall be external to the device being inserted or removed. in other words, any terminator
ML6599 rev. 1.0 10/25/2000 5 connected to a device being hot-inserted/removed should be inactive (accomplished by grounding the discnkt pin in the case of the ML6599). if the terminator being inserted/removed were in the active state, at some point in time the bus would be terminated by either 1 or 3 terminators. in either case, data integrity on the bus will be compromised. figure 2 gives an application diagram showing a typical scsi bus configuration. to ensure proper operation, the termpwr pin must be connected to the scsi termpower line. each ML6599 requires parallel 0.1f and 10f capacitors connected between the v ref and gnd pins and the termpower line needs a 10f bypass capacitor at each node in the system. in an 8-bit wide scsi bus arrangement (a cable), two ML6599s would be needed at each end of the scsi cable in order to terminate the 9 active signal lines. 16-bit wide scsi would use three ML6599s, while 32-bit wide scsi bus would require five ML6599s. in a typical scsi subsystem, the open collector driver in figure 2. application diagram showing typical scsi bus configuration with the ML6599 the scsi transceiver pulls low when asserted. the termination resistance serves as the pull-up when negated. figure 2 also shows a typical cable response to a pulse. the receiving end of the cable will exhibit a single time delay. when negated, the initial step will reach an intermediate level (v step ). with higher scsi data rates, sampling could occur during this step portion. in order to get the most noise margin, the step needs to be as high as possible to prevent false triggering. for this reason the regulator voltage and the resistor defining the mosfet characteristic are trimmed to ensure that the i o is as close as possible to the scsi maximum current specification. v step is defined as: v step = v ol + (i o z o ) where v ol is the driver output low voltage, i o is the current from the receiving terminator, and z o is the characteristic impedance of the cable. this is a very important characteristic that the terminator helps to overcome by increasing the noise margin and boosting the step as high as possible. termpwr line ML6599 termpwr v ref gnd l9 l2 l1 discnkt 0.1f 10f termpwr v ref gnd l9 l1 l2 ML6599 discnkt scsi xcvr scsi xcvr scsi xcvr v reg v step v reg t d t d line asserted line negated 0.1f 10f . . . . . . . . . . . . v ol scsi cable
ML6599 6 rev. 1.0 10/25/2000 transient response (actual) (approximately 110 w , 10 feet long, ribbon cable stock) 2 2.0v 0.8v v1(2) = 796.9mv v2(2) = 2.0v d v(2) = 1.203v
ML6599 rev. 1.0 10/25/2000 7 physical dimensions inches (millimeters) seating plane 0.169 - 0.177 (4.29 - 4.50) 0.246 - 0.258 (6.25 - 6.55) 0.251 - 0.262 (6.38 - 6.65) 0.008 - 0.012 (0.20 - 0.30) 0.026 bsc (0.65 bsc) 0.020 - 0.028 (0.51 - 0.71) 0.043 max (1.10 max) 0.002 - 0.006 (0.05 - 0.15) 0.033 - 0.037 (0.84 - 0.94) 0.004 - 0.008 (0.10 - 0.20) 0o - 8o pin 1 id 20 1 package: t20 20-pin tssop seating plane 0.291 - 0.301 (7.39 - 7.65) pin 1 id 0.398 - 0.412 (10.11 - 10.47) 0.400 - 0.414 (10.16 - 10.52) 0.012 - 0.020 (0.30 - 0.51) 0.050 bsc (1.27 bsc) 0.022 - 0.042 (0.56 - 1.07) 0.095 - 0.107 (2.41 - 2.72) 0.005 - 0.013 (0.13 - 0.33) 0.090 - 0.094 (2.28 - 2.39) 16 0.009 - 0.013 (0.22 - 0.33) 0o - 8o 1 0.024 - 0.034 (0.61 - 0.86) (4 places) package: s16w 16-pin wide soic
ML6599 8 rev. 1.0 10/25/2000 ordering information part number temperature range package ML6599cs 0c to 70c 16-pin soic (s16w) ML6599ct 0c to 70c 20-pin tssop (t20) life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com ?2000 fairchild semiconductor corporation disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.
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