features 3 v silicon mmic l-band frequency down converter ? broadband operation: rf input: 800 - 2000 mhz if output: 100 - 300 mhz ? input ip 3 : -7 dbm ? low voltage operation: 2.7~3.3 v ? low current consumption: 8.5 ma ? power save function ? super small t06 package ? tape and reel packaging option available internal block diagram upc8112t the upc8112t is a silicon monolithic microwave integrated circuit which is manufactured using the nesat iii process. the nesat iii process produces transistors with f t approach- ing 20 ghz. this device consists of a double balance mixer, an if amplifier, and a lo buffer amplifier. the device was de- signed to be used as the first down converter for gps and wireless communications such as cellular, pcs, and 900 mhz cordless phones. operating on a 3 volt supply, this ic is ideally suited for hand held portable designs. nec's stringent quality assurance and test procedures as- sure the highest reliability and performance. description electrical characteristics (t a = 25 c, v cc = v ps = 3.0 v, p loin = -10 dbm, z l = z s = 50 w unless otherwise specified ) part number upc8112t package outline t06 symbols parameters and conditions units min typ max i cc circuit current (no input signal) ma 4.9 8.5 11.7 i cc (ps) circuit current at power save mode, v cc = 3.0 v, v ps = 0.5 v m a 0.1 f rfin rf frequency response ghz 0.8 1.9 2.0 f ifout if frequency response 1 mhz 100 250 300 cg conversion gain f rfin = 900 mhz, f loin = 1000 mhz db 11.5 15 17.5 f rfin = 1.5 ghz, f loin = 1.6 ghz db 13 f rfin = 1.9 ghz, f loin = 1.66 ghz db 9.5 13 15.5 nf single side band noise figure (ssb) f rfin = 900 mhz, f loin = 1000 mhz db 9.0 11 f rfin = 1.5 ghz, f loin = 1.6 ghz db 11 f rfin = 1.9 ghz, f loin = 1.66 ghz db 11.2 13.2 p 1db output power at 1 db gain compression, f rfin = 1.9 ghz f loin = 1.66 ghz dbm -5 p sat saturated output power f rfin = 900 mhz, f loin = 1000 mhz dbm -6.5 -2.5 f rfin = 1.9 ghz, f loin = 1.66 ghz dbm -7 -3 (p rfin = -10 dbm) iip 3 input 3rd order intercept point, f rfin = 900 mhz, f loin = 1000 mhz dbm -10 f rfin = 1.5 ghz, f loin = 1.6 ghz dbm -9 f rfin = 1.9 ghz, f loin = 1.66 ghz dbm -7 lo rf lo leakage at rf pin, f rf in = 900 mhz, f lo in = 1000 mhz dbm -45 f rfin = 1.5 ghz, f loin = 1.6 ghz dbm -46 f rf in = 1.9 ghz, f lo in = 1.66 ghz dbm -45 lo if lo leakage at if pin, f rf in = 900 mhz, f lo in = 1000 mhz dbm -32 f rfin = 1.5 ghz, f loin = 1.6 ghz dbm -33 f rf in = 1.9 ghz, f lo in = 1.66 ghz dbm -30 rf lo rf leakage at lo pin f rf in = 900 mhz, f lo in = 1000 mhz 2 dbm -80 f rfin = 1.5 ghz, f loin = 1.6 ghz 2 dbm -57 f rf in = 1.9 ghz, f lo in = 1.66 ghz 2 dbm -55 notes: 1. external matching required. 2. p rfin = -30 dbm california eastern laboratories rf input if output lo input v cc gnd power save
pin no. symbol pin voltage description internal equivalent circuit 5v cc same as v cc voltage 6if out through external inductor 1rf iin 1.2 2 gnd 0 3lo in 1.4 4psv cc or gnd upc8112t absolute maximum ratings 1 (t a = 25 c) symbols parameters units ratings v cc supply voltage v 3.6 i cc circuit current ma 77.7 p d power dissipation 2 mw 280 t op operating temperature c -40 to +85 t stg storage temperature c -55 to +150 symbols parameters units min typ ma x v cc supply voltage v 2.7 3.0 3.3 t op operating temperature c -40 +25 +85 p loin lo input level dbm -15 -10 0 f rfin rf input frequency ghz 0.8 1.9 2.0 f ifout if output frequency mhz 100 250 300 recommended operating conditions notes: 1. operation in excess of any one of these parameters may result in permanent damage. 2. mounted on a 50 x 50 x 1.6 mm epoxy glass pwb (t a = +85 c). pin functions 2.7 ~ 3.3 rf input pin to mixer. mixer is a double balanced gilbert cell type. input rf signal to the pin with a 50 w source impedance through a coupling capacitor. supply voltage pin. connect a bypass capacitor (e.g., 1000 pf) to minimize ground impedance. ground pin. must be connected to the system ground with minimum inductance. ground pattern on the board should be formed as wide as possible to minimize ground impedance. } to mixer lo input pin to a differential buffer amplifier. input lo signal through a coupling capacitor. recom- mended input level: -15 to 0 dbm. power-save control pin. voltage on this pin controls on/off operation as follows: operation vps on ? 2.5 v off 0-0.5 v if output pin is an open collector with high impedance. external lc matching circuit is required. 5 6 1 2 from lo amp 5 3 2 4 5 2
upc8112t typical application example test circuit pcs or digital cellular note: 1. c1, c2, c3 are 1,000 pf capacitors. 2. l1 and c4 are matching elements. l1 = 100nh and c4 = 2.7 pf for f if = 240 mhz rx sw vco m pc8112t n pll . . pa pll tx i q q i demod 90 ? 50 w 50 w 50 w 3 4 2 1 5 6 lo in ps v cc gnd rf in if out (top view) 3 v power save c 1 c 2 c 4 c 3 l 1
upc8112t outline dimensions (units in mm) package outline t06 1. rf in 2. gnd 3. lo in 4. ps 5. v cc 6. if out (bottom view) (top view) lead connections recommended p.c.b. layout (units in mm) note: all dimensions are typical unless otherwise specified. part number qty UPC8112T-E3 3k/reel ordering information 3.10 3 2 1 1.0 min 1.0 min 6 5 4 0.95 0.5 min 3 2 1 4 5 6 3 2 1 4 5 6 c2k +0.2 -0.3 2.8 1.5 +0.2 -0.1 1 2 3 4 5 6 1.9 0.2 -0.05 +0.10 0.3 0.13 0.1 1.1 +0.2 -0.1 0 to 0.1 0.95 0.95 0.8 2.9 0.2 exclusive north american agent for rf, microwave & optoelectronic semiconductors california eastern laboratories ?headquarters ?4590 patrick henry drive ?santa clara, ca 95054-1817 ?(408) 988-3500 ?telex 34-6393 ?fax (408) 988-0279 24-hour fax-on-demand: 800-390-3232 (u.s. and canada only) ?internet: http://www.cel.com printed in usa on recycled paper -11/97 data subject to change without notice
|
