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tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 1 post office box 655303 ? dallas, texas 75265 available in 5-v, 4.85-v, and 3.3-v fixed-output and adjustable versions very low-dropout voltage ...m aximum of 32 mv at i o = 100 ma (tps7150) very low quiescent current ? independent of load . . . 285 a typ extremely low sleep-state current 0.5 a max 2% tolerance over specified conditions for fixed-output versions output current range of 0 ma to 500 ma tssop package option offers reduced component height for space-critical applications power-good (pg) status output description the tps71xx integrated circuits are a family of micropower low-dropout (ldo) voltage regulators. an order of magnitude reduction in dropout voltage and quiescent current over conventional ldo performance is achieved by replacing the typical pnp pass transistor with a pmos device. because the pmos device behaves as a low-value resistor, the dropout voltage is very low (maximum of 32 mv at an output current of 100 ma for the tps7150) and is directly proportional to the output current (see figure 1). additionally, since the pmos pass element is a voltage-driven device, the quiescent current is very low and remains independent of output loading (typically 285 a over the full range of output current, 0 ma to 500 ma). these two key specifications yield a significant improvement in operating life for battery-powered systems. the ldo family also features a sleep mode; applying a ttl high signal to en (enable ) shuts down the regulator, reducing the quiescent current to 0.5 a maximum at t j = 25 c. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 2003, texas instruments incorporated nc ? no internal connection 1 2 3 4 8 7 6 5 gnd en in in pg sense ? /fb ? out out d or p package (top view) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 gnd gnd gnd nc nc en nc in in in pg nc nc fb ? nc sense ? out out nc nc pw package (top view) ? sense ? fixed voltage options only (TPS7133, tps7148, and tps7150) ? fb ? adjustable version only (tps7101)
tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 2 post office box 655303 ? dallas, texas 75265 description (continued) 0.1 0.05 0 0 0.05 0.1 0.15 0.2 0.25 0.3 dropout voltage ? v 0.15 0.2 0.25 0.35 0.4 0.45 0.5 i o ? output current ? a t a = 25 c tps7148 tps7150 TPS7133 figure 1. dropout voltage versus output current power good (pg) reports low output voltage and can be used to implement a power-on reset or a low-battery indicator. the tps71xx is offered in 3.3-v, 4.85-v, and 5-v fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 v to 9.75 v). output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges (3% for adjustable version). the tps71xx family is available in pdip (8 pin), so (8 pin), and tssop (20-pin) packages. the tssop has a maximum height of 1,2 mm. available options t j output voltage (v) packaged devices chip form t j min typ max small outline (d) plastic dip (p) tssop (pw) (y) 4.9 5 5.1 tps7150qd tps7150qp tps7150qpw tps7150y 4.75 4.85 4.95 tps7148qd tps7148qp tps7148qpw tps7148y ? 40 c to 125 c 3.23 3.3 3.37 TPS7133qd TPS7133qp TPS7133qpw TPS7133y adjustable ? 1.2 v to 9.75 v tps7101qd tps7101qp tps7101qpw tps7101y ? the d and pw packages are available taped and reeled. add r suffix to device type (e.g., tps7150qdr). the tps7101q is programmable using an external resistor divider (see application information). the chip form is tested at 25 c. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 3 post office box 655303 ? dallas, texas 75265 ? TPS7133, tps7148, tps7150 (fixed-voltage options) ? capacitor selection is nontrivial. see application information section for details. sense pg out out 9 8 6 10 in in in en gnd 3 2 1 20 15 14 13 v i 0.1 f pg csr v o 10 f + tps71xx ? c o ? figure 2. typical application configuration tps71xx chip information these chips, when properly assembled, display characteristics similar to the tps71xxq. thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. the chips may be mounted with conductive epoxy or a gold-silicon preform. (6) (4) (3) (7) (2) (1) gnd fb ? out pg in en tps71xx 80 92 chip thickness: 15 mils typical bonding pads: 4 4 mils minimum t j max = 150 c tolerances are 10%. all dimensions are in mils. (6) (7) (2) (5) (4) (3) (1) sense ? fixed voltage options only (TPS7133, tps7148, and tps7150) ? fb ? adjustable version only (tps7101) bonding pad assignments sense (5) note a: for most applications, out and sense should be tied together as close as possible to the device; for other implementations, refer to sense-pin connection discussion in the applications information section of this data sheet. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 4 post office box 655303 ? dallas, texas 75265 functional block diagram _ + v ref = 1.178 v out sense ? /fb en in gnd r1 r2 pg _ + tps7101 TPS7133 tps7148 tps7150 device unit r1 r2 0 420 726 756 233 233 233 ? k ? k ? k ? resistor divider options ? switch positions are shown with en low (active). ? for most applications, sense should be externally connected to out as close as possible to the device. for other implementation s, refer to sense-pin connection discussion in applications information section. note a: resistors are nominal values only. 1.12 v ? ?? mos transistors bilpolar transistors diodes capacitors resistors component count 464 41 4 17 76 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) input voltage range ? , v i , pg, sense, en ? 0.3 v to 11 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output current, i o 2 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous total power dissipation see dissipation rating tables 1 and 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating virtual junction temperature range, t j ? 55 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ? all voltage values are with respect to network terminal ground. dissipation rating table 1 ? free-air temperature (see figure 3) # package t a 25 c derating factor t a = 70 c t a = 125 c package a power rating above t a = 25 c a power rating a power rating d 725 mw 5.8 mw/ c 464 mw 145 mw d p || 725 mw 1175 mw 5.8 mw/ c 9.4 mw/ c 464 mw 752 mw 145 mw 235 mw pw || 700 mw 5.6 mw/ c 448 mw 140 mw dissipation rating table 2 ? case temperature (see figure 4) # package t c 25 c derating factor t c = 70 c t c = 125 c package c power rating above t c = 25 c c power rating c power rating d p 2188 mw 2738 mw 17.5 mw/ c 21 9 mw/ c 1400 mw 1752 mw 438 mw 548 mw p pw || 2738 m w 4025 mw 21 . 9 m w/ c 32.2 mw/ c 1752 m w 2576 mw 548 m w 805 mw # dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute maximum temperature of 150 c. for guidelines on maintaining junction temperature within recommended operating range, see the thermal information section. || refer to thermal information section for detailed power dissipation considerations when using the tssop packages. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 5 post office box 655303 ? dallas, texas 75265 figure 3 1200 800 400 0 25 50 75 100 ? maximum continuous dissipation ? mw dissipation derating curve ? vs free-air temperature 125 150 1400 1000 600 200 pw and pwp package r ja = 178 c/w p d t a ? free-air temperature ? c p package r ja = 106 c/w d package r ja = 172 c/w figure 4 2400 1600 800 0 25 50 75 100 ? maximum continuous dissipation ? mw 3200 4000 dissipation derating curve ? vs case temperature 4800 125 150 4400 3600 2800 2000 1200 400 pw package r jc = 31 c/w p d t c ? case temperature ? c d package r jc = 57 c/w p package r jc = 46 c/w ? dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute maximum tempera ture of 150 c. for guidelines on maintaining junction temperature within recommended operating range, see the thermal information section. recommended operating conditions min max unit ? tps7101q 2.5 10 in p ut voltage v i ? TPS7133q 3.77 10 v input voltage , v i ? tps7148q 5.2 10 v tps7150q 5.33 10 high-level input voltage at en , v ih 2 v low-level input voltage at en , v il 0.5 v output current range, i o 0 500 ma operating virtual junction temperature range, t j ? 40 125 c ? minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout volt age at the maximum specified load range. since dropout voltage is a function of output current, the usable range can be extended for light er loads. to calculate the minimum input voltage for your maximum output current, use the following equation: v i(min) = v o(max) + v do(max load) because the tps7101 is programmable, r ds(on) should be used to calculate v do before applying the above equation. the equation for calculating v do from r ds(on) is given in note 2 in the electrical characteristics table. the minimum value of 2.5 v is the absolute lower limit for the recommended input voltage range for the tps7101. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 6 post office box 655303 ? dallas, texas 75265 electrical characteristics at i o = 10 ma, en = 0 v, c o = 4.7 f/csr ? = 1 ? , sense/fb shorted to out (unless otherwise noted) parameter test conditions ? t j tps7101q, TPS7133q tps7148q, tps7150q unit j min typ max ground current (active mode) en 0.5 v , v i = v o + 1 v , 25 c 285 350 a ground current (active mode) en i o 500 ma v i v o + 1 v, ? 40 c to 125 c 460 a in p ut current (standby mode) en v 27v v 10 v 25 c 0.5 a input current (standby mode) en = v i , 2 . 7 v ? 40 c to 125 c 2 a out p ut current limit v o =0 v i =10v 25 c 1.2 2 a output current limit v o = 0 , v i = 10 v ? 40 c to 125 c 2 a pass-element leaka g e current in standb y en v 27v v 10 v 25 c 0.5 a gy mode en = v i , 2 . 7 v ? 40 c to 125 c 1 a pg leakage current normal o p eration v pg =10v 25 c 0.02 0.5 a pg l ea k age curren t normal operation , v pg = 10 v ? 40 c to 125 c 0.5 a output voltage temperature coefficient ? 40 c to 125 c 61 75 ppm/ c thermal shutdown junction temperature 165 c en logic high (standby mode) 2.5 v v i 6 v 40 cto125 c 2 v en l og i c hi g h ( s t an db y mo d e ) 6 v v i 10 v ? 40 c to 125 c 2.7 v en logic low (active mode) 27v v i 10 v 25 c 0.5 v en l og i c l ow ( ac ti ve mo d e ) 2 . 7 v ? 40 c to 125 c 0.5 v en hysteresis voltage 25 c 50 mv en input current 0v v i 10 v 0v v i 10 v 25 c ? 0.5 0.5 a en i npu t curren t 0 v ? 40 c to 125 c ? 0.5 0.5 a minimum v i for active p ass element 25 c 2.05 2.5 v minimum v i for active pass element ? 40 c to 125 c 2.5 v minimum v i for valid pg i pg = 300 a i pg = 300 a 25 c 1.06 1.5 v minimum v i for valid pg i pg = 300 a i pg = 300 a ? 40 c to 125 c 1.9 v ? csr (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (esr) of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 7 post office box 655303 ? dallas, texas 75265 tps7101 electrical characteristics at i o = 10 ma, v i = 3.5 v, en = 0 v, c o = 4.7 f/csr ? = 1 ? , fb shorted to out at device leads (unless otherwise noted) parameter test conditions ? t j tps7101q unit parameter test conditions ? t j min typ max unit reference voltage (measured at fb v i = 3.5 v, i o = 10 ma 25 c 1.178 v reference voltage (measured at fb with out connected to fb) 2.5 v v i 10 v, see note 1 5 ma i o 500 ma, ? 40 c to 125 c 1.143 1.213 v reference voltage temperature coefficient ? 40 c to 125 c 61 75 ppm/ c v i =24v 50 a i o 150 ma 25 c 0.7 1 v i = 2 . 4 v , 50 a ? 40 c to 125 c 1 v i =24v 150 ma i o 500 25 c 0.83 1.3 pass-element series resistance v i = 2 . 4 v , o ma ? 40 c to 125 c 1.3 ? a i o 500 ma 25 c 0.52 0.85 ? a ? 40 c to 125 c 0.85 v i = 3.9 v, 50 a i o 500 ma 25 c 0.32 v i = 5.9 v, 50 a i o 500 ma 25 c 0.23 in p ut regulation v i = 2.5 v to 10 v, 50 i o 500 ma, 25 c 18 mv input regulation i , see note 1 o , ? 40 c to 125 c 25 mv i o = 5 ma to 500 ma, 2.5 v v i 10 v, 25 c 14 mv out p ut regulation o , see note 1 i , ? 40 c to 125 c 25 mv output regulation i o = 50 v i 10 v, 25 c 22 mv o , see note 1 i , ? 40 c to 125 c 54 mv i o =50 a 25 c 48 59 ri pp le rejection f = 120 hz i o = 50 a ? 40 c to 125 c 44 db ripple rejection f = 120 hz i o = 500 ma, 25 c 45 54 db o , see note 1 ? 40 c to 125 c 44 output noise-spectral density f = 120 hz 25 c 2 v/ hz 10 h f 100 kh c o = 4.7 f 25 c 95 output noise voltage 10 hz f 100 khz, csr ? =1 ? f 25 c 89 vrms csr ? = 1 ? f 25 c 74 pg trip-threshold voltage v fb voltage decreasing from above v pg ? 40 c to 125 c 1.101 1.145 v pg hysteresis voltage measured at v fb 25 c 12 mv pg out p ut low voltage i pg = 400 a v i = 2 13 v 25 c 0.1 0.4 v pg ou t pu t l ow vo lt age i pg = 400 a , v i = 2 . 13 v ? 40 c to 125 c 0.4 v fb in p ut current 25 c ? 10 0.1 10 na fb input current ? 40 c to 125 c ? 20 20 na ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. output voltage programmed to 2.5 v with closed-loop configuration (see application information). notes: 1. when v i < 2.9 v and i o > 150 ma simultaneously, pass element r ds(on) increases (see figure 27) to a point such that the resulting dropout voltage prevents the regulator from maintaining the specified tolerance range. 2. to calculate dropout voltage, use equation: v do = i o ? r ds(on) r ds(on) is a function of both output current and input voltage. the parametric table lists r ds(on) for v i = 2.4 v, 2.9 v, 3.9 v, and 5.9 v, which corresponds to dropout conditions for programmed output voltages of 2.5 v, 3 v, 4 v, and 6 v, respectively. for ot her programmed values, refer to figure 26. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 8 post office box 655303 ? dallas, texas 75265 TPS7133 electrical characteristics at i o = 10 ma, v i = 4.3 v, en = 0 v, c o = 4.7 f/csr ? = 1 ? , sense shorted to out (unless otherwise noted) parameter test conditions ? t j TPS7133q unit parameter test conditions ? t j min typ max unit out p ut voltage v i = 4.3 v, i o = 10 ma 25 c 3.3 v output voltage 4.3 v v i 10 v, 5 ma i o 500 ma ? 40 c to 125 c 3.23 3.37 v i o =10ma v i = 3 23 v 25 c 4.5 7 i o = 10 ma , v i = 3 . 23 v ? 40 c to 125 c 8 dropout voltage i o = 100 ma v i = 3 23 v 25 c 47 60 mv d ropou t vo lt age i o = 100 ma , v i = 3 . 23 v ? 40 c to 125 c 80 mv i o = 500 ma v i = 3 23 v 25 c 235 300 i o = 500 ma , v i = 3 . 23 v ? 40 c to 125 c 400 pass element series resistance (3.23 v ? v o )/i o , v i = 3.23 v, 25 c 0.47 0.6 ? ? 40 c to 125 c 0.8 ? a i o 500 ma 25 c 20 mv input regulation v i = 4 . 3 v to 10 v , 50 a ? 40 c to 125 c 27 mv i o =5mato500ma 43v v i 10 v 25 c 21 38 mv out p ut regulation i o = 5 ma to 500 ma , 4 . 3 v ? 40 c to 125 c 75 mv output regulation i o =50 a to 500 ma 43v v i 10 v 25 c 30 60 mv i o = 50 a to 500 ma , 4 . 3 v ? 40 c to 125 c 120 mv i o =50 a 25 c 43 54 ri pp le rejection f = 120 hz i o = 50 a ? 40 c to 125 c 40 db ripple rejection f = 120 hz i o = 500 ma 25 c 39 49 db i o = 500 ma ? 40 c to 125 c 36 output noise-spectral density f = 120 hz 25 c 2 v/ hz 10 h f 100 kh c o = 4.7 f 25 c 274 output noise voltage 10 hz f 100 khz, csr ? = 1 ? f 25 c 228 vrms csr ? = 1 ? f 25 c 159 pg trip-threshold voltage v o voltage decreasing from above v pg ? 40 c to 125 c 2.868 3 v pg hysteresis voltage 25 c 35 mv pg out p ut low voltage i pg =1ma v i =28v 25 c 0.22 0.4 v pg output low voltage i pg = 1 ma , v i = 2 . 8 v ? 40 c to 125 c 0.4 v ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 9 post office box 655303 ? dallas, texas 75265 tps7148 electrical characteristics at i o = 10 ma, v i = 5.85 v, en = 0 v, c o = 4.7 f/csr ? = 1 ? , sense shorted to out (unless otherwise noted) parameter test conditions ? t j tps7148q unit parameter test conditions ? t j min typ max unit out p ut voltage v i = 5.85 v, i o = 10 ma 25 c 4.85 v output voltage 5.85 v v i 10 v, 5 ma i o 500 ma ? 40 c to 125 c 4.75 4.95 v i o =10ma v i = 4 75 v 25 c 2.9 6 i o = 10 ma , v i = 4 . 75 v ? 40 c to 125 c 8 dropout voltage i o = 100 ma v i = 4 75 v 25 c 30 37 mv d ropou t vo lt age i o = 100 ma , v i = 4 . 75 v ? 40 c to 125 c 54 mv i o = 500 ma v i = 4 75 v 25 c 150 180 i o = 500 ma , v i = 4 . 75 v ? 40 c to 125 c 250 pass element series resistance (4.75 v ? v o )/i o , v i = 4.75 v, 25 c 0.32 0.35 ? ? 40 c to 125 c 0.52 ? a i o 500 ma 25 c 27 mv input regulation v i = 5 . 85 v to 10 v , 50 a ? 40 c to 125 c 37 mv i o =5mato500ma 585v v i 10 v 25 c 12 42 mv out p ut regulation i o = 5 ma to 500 ma , 5 . 85 v ? 40 c to 125 c 80 mv output regulation i o =50 a to 500 ma 585v v i 10 v 25 c 42 60 mv i o = 50 a to 500 ma , 5 . 85 v ? 40 c to 125 c 130 mv i o =50 a 25 c 42 53 ri pp le rejection f = 120 hz i o = 50 a ? 40 c to 125 c 39 db ripple rejection f = 120 hz i o = 500 ma 25 c 39 50 db i o = 500 ma ? 40 c to 125 c 35 output noise-spectral density f = 120 hz 25 c 2 v/ hz 10 h f 100 kh c o = 4.7 f 25 c 410 output noise voltage 10 hz f 100 khz, csr ? = 1 ? f 25 c 328 vrms csr ? = 1 ? f 25 c 212 pg trip-threshold voltage v o voltage decreasing from above v pg ? 40 c to 125 c 4.5 4.7 v pg hysteresis voltage 25 c 50 mv pg output low voltage i pg =12ma v i = 4 12 v 25 c 0.2 0.4 v pg ou t pu t l ow vo lt age i pg = 1 . 2 ma , v i = 4 . 12 v ? 40 c to 125 c 0.4 v ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 10 post office box 655303 ? dallas, texas 75265 tps7150 electrical characteristics at i o = 10 ma, v i = 6 v, en = 0 v, c o = 4.7 f/csr ? = 1 ? , sense shorted to out (unless otherwise noted) parameter test conditions ? t j tps7150q unit parameter test conditions ? t j min typ max unit out p ut voltage v i = 6 v, i o = 10 ma 25 c 5 v output voltage 6 v v i 10 v, 5 ma i o 500 ma ? 40 c to 125 c 4.9 5.1 v i o =10ma v i = 4 88 v 25 c 2.9 6 i o = 10 ma , v i = 4 . 88 v ? 40 c to 125 c 8 dropout voltage i o = 100 ma v i = 4 88 v 25 c 27 32 mv d ropou t vo lt age i o = 100 ma , v i = 4 . 88 v ? 40 c to 125 c 47 mv i o = 500 ma v i = 4 88 v 25 c 146 170 i o = 500 ma , v i = 4 . 88 v ? 40 c to 125 c 230 pass element series resistance (4.88 v ? v o )/i o , v i = 4.88 v, 25 c 0.29 0.32 ? ? 40 c to 125 c 0.47 ? a i o 500 ma 25 c 25 mv input regulation v i = 6 v to 10 v , 50 a ? 40 c to 125 c 32 mv i o =5mato500ma 6v v i 10 v 25 c 30 45 mv out p ut regulation i o = 5 ma to 500 ma , 6 v ? 40 c to 125 c 86 mv output regulation i o =50 a to 500 ma 6v v i 10 v 25 c 45 65 mv i o = 50 a to 500 ma , 6 v ? 40 c to 125 c 140 mv i o =50 a 25 c 45 55 ri pp le rejection f = 120 hz i o = 50 a ? 40 c to 125 c 40 db ripple rejection f = 120 hz i o = 500 ma 25 c 42 52 db i o = 500 ma ? 40 c to 125 c 36 output noise-spectral density f = 120 hz 25 c 2 v/ hz 10 h f 100 kh c o = 4.7 f 25 c 430 output noise voltage 10 hz f 100 khz, csr ? = 1 ? f 25 c 345 vrms csr ? = 1 ? f 25 c 220 pg trip-threshold voltage v o voltage decreasing from above v pg ? 40 c to 125 c 4.55 4.75 v pg hysteresis voltage 25 c 53 mv pg out p ut low voltage i pg =12ma v i = 4 25 v 25 c 0.2 0.4 v pg output low voltage i pg = 1 . 2 ma , v i = 4 . 25 v ? 40 c to 125 c 0.4 v ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 11 post office box 655303 ? dallas, texas 75265 electrical characteristics at i o = 10 ma, en = 0 v, c o = 4.7 f/csr ? = 1 ? , t j = 25 c, sense/fb shorted to out (unless otherwise noted) parameter test conditions ? tps7101y, TPS7133y tps7148y, tps7150y unit min typ max ground current (active mode) en 0.5 v, 0 ma i o 500 ma v i = v o + 1 v, 285 a output current limit v o = 0, v i = 10 v 1.2 a pg leakage current normal operation, v pg = 10 v 0.02 a thermal shutdown junction temperature 165 c en hysteresis voltage 50 mv minimum v i for active pass element 2.05 v minimum v i for valid pg i pg = 300 a 1.06 v parameter test conditions ? tps7101y unit parameter test conditions ? min typ max unit reference voltage (measured at fb with out connected to fb) v i = 3.5 v, i o = 10 ma 1.178 v v i = 2.4 v, 50 a i o 150 ma 0.7 v i = 2.4 v, 150 ma i o 500 ma 0.83 pass-element series resistance (see note 2) v i = 2.9 v, 50 a i o 500 ma 0.52 ? v i = 3.9 v, 50 a i o 500 ma 0.32 v i = 5.9 v, 50 a i o 500 ma 0.23 input regulation v i = 2.5 v to 10 v, see note 1 50 a i o 500 ma, 18 mv out p ut regulation 2.5 v v i 10 v, see note 1 i o = 5 ma to 500 ma, 14 mv output regulation 2.5 v v i 10 v, see note 1 i o = 50 a to 500 ma, 22 mv ripple rejection v i = 3.5 v, i o = 50 a f = 120 hz, 59 db output noise-spectral density v i = 3.5 v, f = 120 hz 2 v/ hz v i = 3.5 v, c o = 4.7 f 95 output noise voltage v i = 3 . 5 v , 10 hz f 100 khz, ? c o = 10 f 89 vrms csr ? = 1 ? c o = 100 f 74 pg hysteresis voltage v i = 3.5 v, measured at v fb 12 mv pg output low voltage v i = 2.13 v, i pg = 400 a 0.1 v fb input current v i = 3.5 v v i = 3.5 v 0.1 na ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. output voltage programmed to 2.5 v with closed-loop configuration (see application information). notes: 1. when v i < 2.9 v and i o > 150 ma simultaneously, pass element r ds(on) increases (see figure 27) to a point such that the resulting dropout voltage prevents the regulator from maintaining the specified tolerance range. 2. to calculate dropout voltage, use equation: v do = i o ? r ds(on) r ds(on) is a function of both output current and input voltage. the parametric table lists r ds(on) for v i = 2.4 v, 2.9 v, 3.9 v, and 5.9 v, which corresponds to dropout conditions for programmed output voltages of 2.5 v, 3 v, 4 v, and 6 v, respectively. for ot her programmed values, refer to figure 26. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 12 post office box 655303 ? dallas, texas 75265 electrical characteristics at i o = 10 ma, en = 0 v, c o = 4.7 f/csr ? = 1 ? , t j = 25 c, sense shorted to out (unless otherwise noted) (continued) parameter test conditions ? TPS7133y unit parameter test conditions ? min typ max unit output voltage v i = 4.3 v, i o = 10 ma 3.3 v v i = 3.23 v, i o = 10 ma 0.02 dropout voltage v i = 3.23 v, i o = 100 ma 47 mv v i = 3.23 v, i o = 500 ma 235 pass-element series resistance (3.23 v ? v o )/i o , i o = 500 ma v i = 3.23 v, 0.47 ? out p ut regulation 4.3 v v i 10 v, i o = 5 ma to 500 ma 21 mv output regulation 4.3 v v i 10 v, i o = 50 a to 500 ma 30 mv ri pp le rejection v i = 4.3 v, i o = 50 a 54 db ripple rejection i , f = 120 hz i o = 500 ma 49 db output noise-spectral density v i = 4.3 v, f = 120 hz 2 v/ hz v i = 4.3 v, c o = 4.7 f 274 output noise voltage v i = 4 . 3 v , 10 hz f 100 khz, csr ? c o = 10 f 228 vrms csr ? = 1 ? c o = 100 f 159 pg hysteresis voltage v i = 4.3 v 35 mv pg output low voltage v i = 2.8 v, i pg = 1 ma 0.22 v parameter test conditions ? tps7148y unit parameter test conditions ? min typ max unit output voltage v i = 5.85 v, i o = 10 ma 4.85 v v i = 4.75 v, i o = 10 ma 0.08 dropout voltage v i = 4.75 v, i o = 100 ma 30 mv v i = 4.75 v, i o = 500 ma 150 pass-element series resistance (4.75 v ? v o )/i o , i o = 500 ma v i = 4.75 v, 0.32 ? out p ut regulation 5.85 v v i 10 v, i o = 5 ma to 500 ma 12 mv output regulation 5.85 v v i 10 v, i o = 50 a to 500 ma 42 mv ri pp le rejection v i = 5.85 v, i o = 50 a 53 db ripple rejection i , f = 120 hz i o = 500 ma 50 db output noise-spectral density v i = 5.85 v, f = 120 hz 2 v/ hz v i = 5.85 v, c o = 4.7 f 410 output noise voltage v i = 5 . 85 v , 10 hz f 100 khz, csr ? c o = 10 f 328 vrms csr ? = 1 ? c o = 100 f 212 pg hysteresis voltage v i = 5.85 v 50 mv pg output low voltage v i = 4.12 v, i pg = 1.2 ma 0.2 0.4 v ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 13 post office box 655303 ? dallas, texas 75265 electrical characteristics at i o = 10 ma, en = 0 v, c o = 4.7 f/csr ? = 1 ? , t j = 25 c, sense shorted to out (unless otherwise noted) (continued) parameter test conditions ? tps7150y unit parameter test conditions ? min typ max unit output voltage v i = 6 v, i o = 10 ma 5 v v i = 4.88 v, i o = 10 ma 0.13 dropout voltage v i = 4.88 v, i o = 100 ma 27 mv v i = 4.88 v, i o = 500 a 146 pass-element series resistance (4.88 v ? v o )/i o , i o = 500 ma v i = 4.88 v, 0.29 ? out p ut regulation 6 v v i 10 v, i o = 5 ma to 500 ma 30 mv output regulation 6 v v i 10 v, i o = 50 a to 500 ma 45 mv ri pp le rejection v i = 6 v, i o = 50 a 55 db ripple rejection i , f = 120 hz i o = 500 ma 52 db output noise-spectral density v i = 6 v, f = 120 hz 2 v/ hz v i = 6v, c o = 4.7 f 430 output noise voltage v i = 6 v , 10 hz f 100 khz, csr ? c o = 10 f 345 vrms csr ? = 1 ? c o = 100 f 220 pg hysteresis voltage v i = 6 v 53 mv pg output low voltage v i = 4.25 v, pg = 1.2 ma 0.2 v ? csr refers to the total series resistance, including the esr of the capacitor, any series resistance added externally, and pwb trace resistance to c o . ? pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 14 post office box 655303 ? dallas, texas 75265 typical characteristics table of graphs figure vs output current 5 i q quiescent current vs input voltage 6 vs free-air temperature 7 v do dropout voltage vs output current 8 ? v do change in dropout voltage vs free-air temperature 9 ? v o change in output voltage vs free-air temperature 10 v o output voltage vs input voltage 11 ? v o change in output voltage vs input voltage 12 13 v o out p ut voltage vs out p ut current 14 v o output voltage vs output current 15 16 17 ri pp le rejection vs frequency 18 ripple rejection vs frequency 19 20 21 out p ut s p ectral noise density vs frequency 22 output spectral noise density vs frequency 23 24 r ds(on) pass-element resistance vs input voltage 25 r divider resistance vs free-air temperature 26 i i(sense) sense pin current vs free-air temperature 27 fb leakage current vs free-air temperature 28 v i minimum input voltage for active-pass element vs free-air temperature 29 v i minimum input voltage for valid pg vs free-air temperature 30 i i(en) input current (en ) vs free-air temperature 31 output voltage response from enable (en ) 32 v pg power-good (pg) voltage vs output voltage 33 csr com p ensation series resistance vs out p ut current 34 csr compensation series resistance vs output current 35 csr com p ensation series resistance vs added ceramic ca p acitance 36 csr compensation series resistance vs added ceramic capacitance 37 csr com p ensation series resistance vs out p ut current 38 csr compensation series resistance vs output current 39 csr com p ensation series resistance vs added ceramic ca p acitance 40 csr compensation series resistance vs added ceramic capacitance 41 tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 15 post office box 655303 ? dallas, texas 75265 typical characteristics figure 5 315 295 285 265 0 50 100 150 200 250 300 ? quiescent current ? 325 345 quiescent current vs output current 355 350 400 450 500 335 305 275 a t a = 25 c i o ? output current ? ma tps71xx, v i = 10 v tps7150, v i = 6 v TPS7133, v i = 4.3 v tps7148, v i = 5.85 v i q figure 6 200 150 50 0 0123456 250 350 400 78910 100 300 quiescent current vs input voltage v i ? input voltage ? v TPS7133 tps7150 tps7148 t a = 25 c r l = 10 ? tps7101 with v o programmed to 2.5 v ? quiescent current ? a i q figure 7 300 250 200 150 350 quiescent current vs free-air temperature 400 ? 50 ? 25 0 25 50 75 100 125 v i = v o(nom) + 1 v i o = 10 ma ? quiesent current ? i q a t a ? free-air temperature ? c tps7148q figure 8 0.25 0.2 0.1 0.05 0 0.15 0 50 100 150 200 250 300 0.3 350 400 450 500 dropout voltage vs output current t a = 25 c tps7148 tps7150 dropout voltage ? v i o ? output current ? ma TPS7133 tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 16 post office box 655303 ? dallas, texas 75265 typical characteristics figure 9 change in dropout voltage ? mv change in dropout voltage vs free-air temperature 10 8 6 4 2 0 ? 2 ? 4 ? 6 ? 8 ? 10 ? 50 ? 25 0 25 50 75 100 125 i o = 100 ma t a ? free-air temperature ? c figure 10 0 ? change in output voltage ? mv 10 15 change in output voltage vs free-air temperature 20 5 ? 5 ? 10 ? 20 ? 50 ? 25 0 25 50 75 100 125 v i = v o(nom) + 1 v i o = 10 ma v o ? 15 t a ? free-air temperature ? c ? figure 11 3 2 1 0 0123456 ? output voltage ? v 4 5 output voltage vs input voltage 6 78910 TPS7133 t a = 25 c r l = 10 ? tps7150 tps7148 v o v i ? input voltage ? v tps7101 with v o programmed to 2.5 v figure 12 0 4567 ? change in output voltage ? mv 5 15 change in output voltage vs input voltage 20 8910 10 ? 5 ? 10 ? 15 ? 20 TPS7133 tps7150 tps7148 t a = 25 c r l = 10 ? v i ? input voltage ? v ? v o tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 17 post office box 655303 ? dallas, texas 75265 typical characteristics figure 13 2.5 2.495 2.485 2.48 0 100 200 300 ? output voltage ? v 2.505 2.515 tps7101q output voltage vs output current 2.52 400 500 2.49 2.51 v o i o ? output current ? ma t a = 25 c v o programmed to 2.5 v v i = 3.5 v v i = 10 v figure 14 3.3 3.29 3.27 3.26 0 100 200 300 ? output voltage ? v 3.31 3.33 output voltage vs output current 3.34 400 500 3.28 3.32 TPS7133q t a = 25 c v i = 10 v v i = 4.3 v v o i o ? output current ? ma figure 15 output voltage vs output current tps7148q 4.87 4.85 4.83 4.8 0 100 300 ? output voltage ? v 4.89 4.92 500 4.91 4.9 4.88 4.86 4.84 4.82 4.81 200 400 v o i o ? output current ? ma t a = 25 c v i = 5.85 v v i = 10 v figure 16 output voltage vs output current tps7150q 5.01 4.99 4.97 4.94 0 100 300 ? output voltage ? v 5.03 5.06 400 500 5.05 5.04 5.02 5 4.98 4.96 4.95 200 t a = 25 c v i = 6 v v i = 10 v v o i o ? output current ? ma tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 18 post office box 655303 ? dallas, texas 75265 typical characteristics figure 17 40 30 10 0 ripple rejection ? db 50 60 f ? frequency ? hz tps7101q ripple rejection vs frequency 70 20 10 100 1k 10k 100k 1m 10m r l = 500 ? r l = 10 ? c o = 4.7 f (csr = 1 ? ) no input capacitance v o programmed to 2.5 v r l = 100 k ? t a = 25 c v i = 3.5 v figure 18 10 m 1 m 100 k 10 k 1 k 100 ripple rejection ? db f ? frequency ? hz ripple rejection vs frequency 70 60 50 40 30 20 10 0 ? 10 10 r l = 100 k ? r l = 500 ? r l = 10 ? TPS7133q c o = 4.7 f (csr = 1 ? ) no input capacitance t a = 25 c v i = 3.5 v figure 19 10 m 1 m 100 k 10 k 1 k 100 ripple rejection ? db f ? frequency ? hz ripple rejection vs frequency 70 60 50 40 30 20 10 0 ? 10 10 r l = 100 k ? r l = 500 ? tps7148q r l = 10 ? c o = 4.7 f (csr = 1 ? ) no input capacitance t a = 25 c v i = 3.5 v figure 20 10 m 1 m 100 k 10 k 1 k 100 ripple rejection ? db f ? frequency ? hz ripple rejection vs frequency 70 60 50 40 30 20 10 0 10 r l = 100 k ? r l = 500 ? r l = 10 ? c o = 4.7 f (csr = 1 ? ) no input capacitance tps7150q t a = 25 c v i = 3.5 v tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 19 post office box 655303 ? dallas, texas 75265 typical characteristics figure 21 0.01 0.1 f ? frequency ? hz tps7101q output spectral noise density vs frequency 1 10 10 10 2 10 3 10 4 10 5 c o = 4.7 f (csr = 1 ? ) c o = 100 f (csr = 1 ? ) c o = 10 f (csr = 1 ? ) t a = 25 c no input capacitance v i = 3.5 v v o programmed to 2.5 v output spectral noise density ? v/ hz figure 22 10 f ? frequency ? hz output spectral noise density vs frequency 10 1 0.1 0.01 c o = 10 f (csr = 1 ? ) c o = 100 f (csr = 1 ? ) c o = 4.7 f (csr = 1 ? ) t a = 25 c no input capacitance v i = 4.3 v TPS7133q 10 2 10 3 10 4 10 5 output spectral noise density ? v/ hz figure 23 0.01 10 100 1 k 10 k 100 k 0.1 output spectral noise density vs frequency 1 10 c o = 10 f (csr = 1 ? ) c o = 4.7 f (csr = 1 ? ) c o = 100 f (csr = 1 ? ) f ? frequency ? hz tps7148q t a = 25 c no input capacitance v i = 5.85 v output spectral noise density ? v/ hz figure 24 10 100 1 k 10 k 100 k c o = 10 f (csr = 1 ? ) c o = 4.7 f (csr = 1 ? ) c o = 100 f (csr = 1 ? ) f ? frequency ? hz output spectral noise density vs frequency tps7150q 10 1 0.1 0.01 t a = 25 c no input capacitance v i = 6 v output spectral noise density ? v/ hz tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 20 post office box 655303 ? dallas, texas 75265 typical characteristics figure 25 0.4 0.3 0.2 0.1 245 7 ? pass-element resistance ? 0.5 pass-element resistance vs input voltage 0.6 910 368 t a = 25 c v i(fb) = 1.12 v r ds(on) ? v i ? input voltage ? v 1 0.9 0.8 0.7 1.1 i o = 500 ma i o = 100 ma figure 26 0.8 0.6 0.5 0.4 1 1.1 divider resistance vs free-air temperature 1.2 0.9 0.7 ? 50 ? 25 0 25 50 75 100 125 tps7150 tps7148 TPS7133 v i = v o(nom) + 1 v v i(sense) = v o(nom) ? t a ? free-air temperature ? c r ? divider resistance ? m figure 27 5.2 4.8 4.6 4.4 ? sense pin c u rrent ? 5.6 5.8 fixed-output versions sense pin current vs free-air temperature 6 5.4 5 ? 50 ? 25 0 25 50 75 100 125 v i = v o(nom) + 1 v v i(sense) = v o(nom) i i( sense ) a ? free-air temperature ? c figure 28 0.3 0.2 0.1 0 fb leakage current ? na 0.4 0.5 adjustable version fb leakage current vs free-air temperature 0.6 ? 50 ? 25 0 25 50 75 100 125 v fb = 2.5 v t a ? free-air temperature ? c tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 21 post office box 655303 ? dallas, texas 75265 typical characteristics figure 29 2.03 2.01 2.08 2 ? minimum input voltage ? v 2.06 2.04 2.07 minimum input voltage for active pass element vs free-air temperature 2.1 2.09 2.05 2.02 ? 50 ? 25 0 25 50 75 100 125 v i t a ? free-air temperature ? c r l = 500 ? figure 30 1.08 1.07 1.06 1.05 ? minimum input voltage ? v 1.09 minimum input voltage for valid power good (pg) vs free-air temperature 1.1 ? 50 ? 25 0 25 50 75 100 125 v i t a ? free-air temperature ? c 50 40 20 10 0 90 30 ? input current ? na 70 60 80 en input current vs free-air temperature 100 ? 40 ? 20 0 20 40 60 80 100 120 140 v i = v i(en) = 10 v i i(en) t a ? free-air temperature ? c figure 31 tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 22 post office box 655303 ? dallas, texas 75265 typical characteristics ? output voltage ? v output voltage response from enable (en ) 0 2 4 6 0 20 40 60 80 100 120 140 en voltage ? v v o t a = 25 c r l = 500 ? c o = 4.7 f (esr = 1 ? ) no input capacitance v o(nom) time ? s ? 2 figure 32 power-good (pg) voltage vs output voltage 3 2 1 0 93 94 95 96 ? power-good (pg) voltage ? v 4 6 97 98 t a = 25 c pg pulled up to 5 v with 5 k ? v o ? output voltage (v o as a percent of v o(nom) ) ? % 5 v pg figure 33 tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 23 post office box 655303 ? dallas, texas 75265 typical characteristics figure 34 1 0.1 0 50 100 150 200 250 300 typical regions of stability compensation series resistance vs output current 350 400 450 500 10 100 i o ? output current ? ma region of instability region of instability v i = v o(nom) + 1 v no input capacitance c o = 4.7 f no added ceramic capacitance t a = 25 c compensation series resistance ? ? csr ? figure 35 1 0.1 0 50 100 150 200 250 300 350 400 450 500 10 100 i o ? output current ? ma region of instability region of instability v i = v o(nom) + 1 v no input capacitance c o = 4.7 f + 0.5 f of ceramic capacitance t a = 25 c typical regions of stability compensation series resistance vs output current compensation series resistance ? ? csr ? figure 36 1 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 10 100 ceramic capacitance ? f region of instability region of instability typical regions of stability compensation series resistance vs added ceramic capacitance v i = v o(nom) + 1 v no input capacitance i o = 100 ma c o = 4.7 f t a = 25 c compensation series resistance ? ? csr ? figure 37 1 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 10 100 ceramic capacitance ? f region of instability region of instability typical regions of stability compensation series resistance vs added ceramic capacitance v i = v o(nom) + 1 v no input capacitance i o = 500 ma c o = 4.7 f t a = 25 c compensation series resistance ? ? csr ? tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 24 post office box 655303 ? dallas, texas 75265 typical characteristics figure 38 1 0.1 0 50 100 150 200 250 300 typical regions of stability ? compensation series resistance vs output current 350 400 450 500 10 100 i o ? output current ? ma region of instability v i = v o(nom) + 1 v no input capacitance c o = 10 f no ceramic capacitance t a = 25 c compensation series resistance ? ? csr ? 0.2 figure 39 1 0.1 0 50 100 150 200 250 300 typical regions of stability ? compensation series resistance vs output current 350 400 450 500 10 100 i o ? output current ? ma region of instability v i = v o(nom) + 1 v no input capacitance c o = 10 f + 0.5 f of added ceramic capacitance t a = 25 c compensation series resistance ? ? csr ? 0.2 figure 40 1 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 typical regions of stability ? compensation series resistance vs added ceramic capacitance 0.7 0.8 0.9 1 10 100 ceramic capacitance ? f region of instability v i = v o(nom) + 1 v no input capacitance c o = 10 f i o = 100 ma t a = 25 c compensation series resistance ? ? csr ? 0.2 figure 41 1 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 typical regions of stability ? compensation series resistance vs added ceramic capacitance 0.7 0.8 0.9 1 10 100 ceramic capacitance ? f region of instability v i = v o(nom) + 1 v no input capacitance c o = 10 f i o = 500 ma t a = 25 c compensation series resistance ? ? csr ? 0.2 ? csr values below 0.1 ? are not recommended. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 25 post office box 655303 ? dallas, texas 75265 typical characteristics in en out sense + gnd c o csr c cer ? r l v i ? ceramic capacitor to load figure 42. test circuit for typical regions of stability (figures 34 through 41) tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 26 post office box 655303 ? dallas, texas 75265 application information the tps71xx series of low-dropout (ldo) regulators is designed to overcome many of the shortcomings of earlier-generation ldos, while adding features such as a power-saving shutdown mode and a power-good indicator. the tps71xx family includes three fixed-output voltage regulators: the TPS7133 (3.3 v), the tps7148 (4.85 v), and the tps7150 (5 v). the family also offers an adjustable device, the tps7101 (adjustable from 1.2 v to 9.75 v). device operation the tps71xx, unlike many other ldos, features very low quiescent currents that remain virtually constant even with varying loads. conventional ldo regulators use a pnp-pass element, the base current of which is directly proportional to the load current through the regulator (i b = i c / ). close examination of the data sheets reveals that those devices are typically specified under near no-load conditions; actual operating currents are much higher as evidenced by typical quiescent current versus load current curves. the tps71xx uses a pmos transistor to pass current; because the gate of the pmos element is voltage driven, operating currents are low and invariable over the full load range. the tps71xx specifications reflect actual performance under load. another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. the resulting drop in forces an increase in i b to maintain the load. during power up, this translates to large start-up currents. systems with limited supply current may fail to start up. in battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. the tps71xx quiescent current remains low even when the regulator drops out, eliminating both problems. included in the tps71xx family is a 4.85-v regulator, the tps7148. designed specifically for 5-v cellular systems, its 4.85-v output, regulated to within 2%, allows for operation within the low-end limit of 5-v systems specified to 5% tolerance; therefore, maximum regulated operating lifetime is obtained from a battery pack before the device drops out, adding crucial talk minutes between charges. the tps71xx family also features a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to under 2 a. if the shutdown feature is not used, en should be tied to ground. response to an enable transition is quick; regulated output voltage is reestablished in typically 120 s. minimum load requirements the tps71xx family is stable even at zero load; no minimum load is required for operation. sense-pin connection the sense pin of fixed-output devices must be connected to the regulator output for proper functioning of the regulator. normally, this connection should be as short as possible; however, the connection can be made near a critical circuit (remote sense) to improve performance at that point. internally, sense connects to a high-impedance wide-bandwidth amplifier through a resistor-divider network and noise pickup feeds through to the regulator output. routing the sense connection to minimize/avoid noise pickup is essential. adding an rc network between sense and out to filter noise is not recommended because it can cause the regulator to oscillate. external capacitor requirements an input capacitor is not required; however, a ceramic bypass capacitor (0.047 pf to 0.1 f) improves load transient response and noise rejection if the tps71xx is located more than a few inches from the power supply. a higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 27 post office box 655303 ? dallas, texas 75265 application information external capacitor requirements (continued) as with most ldo regulators, the tps71xx family requires an output capacitor for stability. a 10- f solid-tantalum capacitor connected from the regulator output to ground is sufficient to ensure stability over the full load range (see figure 43). adding high-frequency ceramic or film capacitors (such as power-supply bypass capacitors for digital or analog ics) can cause the regulator to become unstable unless the esr of the tantalum capacitor is less than 1.2 ? over temperature. where component height and/or mounting area is a problem, physically smaller, 10- f devices can be screened for esr. figures 34 through 41 show the stable regions of operation using different values of output capacitance with various values of ceramic load capacitance. in applications with little or no high-frequency bypass capacitance (< 0.2 f), the output capacitance can be reduced to 4.7 f, provided esr is maintained between the values shown in figures 34 through 41. because minimum capacitor esr is seldom if ever specified, it may be necessary to add a 0.5- ? to 1- ? resistor in series with the capacitor and limit esr to 1.5 ? maximum. sense pg out out 9 8 6 10 in in in en gnd 3 2 1 20 15 14 13 v i c1 0.1 f 50 v pg esr v o 10 f + tps71xx ? c o ? TPS7133, tps7148, tps7150 (fixed-voltage options) 250 k ? figure 43. typical application circuit programming the tps7101 adjustable ldo regulator programming the adjustable regulators is accomplished using an external resistor divider as shown in figure 44. the equation governing the output voltage is: v o v ref 1 r1 r2 where v ref = reference voltage, 1.178 v typ tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 28 post office box 655303 ? dallas, texas 75265 application information programming the tps7101 adjustable ldo regulator (continued) resistors r1 and r2 should be chosen for approximately 7- a divider current. a recommended value for r2 is 169 k ? with r1 adjusted for the desired output voltage. smaller resistors can be used, but offer no inherent advantage and consume more power. larger values of r1 and r2 should be avoided as leakage currents at fb introduce an error. solving equation 1 for r1 yields a more useful equation for choosing the appropriate resistance: r1 v o v ref 1 r2 output voltage r1 r2 2.5 v 3.3 v 3.6 v 4 v 5 v 6.4 v unit 191 309 348 402 549 750 169 169 169 169 169 169 k ? k ? k ? k ? k ? k ? output voltage programming guide v o v i pg out fb r1 r2 gnd en in <0.5v >2.7 v tps7101 power-good indicator 0.1 f 250 k ? + figure 44. tps7101 adjustable ldo regulator programming power-good indicator the tps71xx features a power-good (pg) output that can be used to monitor the status of the regulator. the internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the pg output transistor turns on, taking the signal low. the open-drain output requires a pullup resistor. if not used, it can be left floating. pg can be used to drive power-on reset circuitry or as a low-battery indicator. pg does not assert itself when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low, relative to its nominal regulated value. regulator protection the tps71xx pmos-pass transistor has a built-in back diode that safely conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). current is conducted from the output to the input and is not internally limited. when extended reverse voltage is anticipated, external limiting may be appropriate. the tps71xx also features internal current limiting and thermal protection. during normal operation, the tps71xx limits output current to approximately 1 a. when current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. while current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. if the temperature of the device exceeds 165 c, thermal-protection circuitry shuts it down. once the device has cooled, regulator operation resumes. tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 29 post office box 655303 ? dallas, texas 75265 mechanical data d (r-pdso-g**) plastic small-outline package 14 pin shown 4040047 / b 03/95 0.228 (5,80) 0.244 (6,20) 0.069 (1,75) max 0.010 (0,25) 0.004 (0,10) 1 14 0.014 (0,35) 0.020 (0,51) a 0.157 (4,00) 0.150 (3,81) 7 8 0.044 (1,12) 0.016 (0,40) seating plane 0.010 (0,25) pins ** 0.008 (0,20) nom a min a max dim gage plane 0.189 (4,80) (5,00) 0.197 8 (8,55) (8,75) 0.337 14 0.344 (9,80) 16 0.394 (10,00) 0.386 0.004 (0,10) m 0.010 (0,25) 0.050 (1,27) 0 ? 8 notes: b. all linear dimensions are in inches (millimeters). c. this drawing is subject to change without notice. d. body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). e. four center pins are connected to die mount pad. f. falls within jedec ms-012 tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 30 post office box 655303 ? dallas, texas 75265 mechanical data p (r-pdip-t8) plastic dual-in-line package 4040082 / b 03/95 0.310 (7,87) 0.290 (7,37) 0.010 (0,25) nom 0.400 (10,60) 0.355 (9,02) 5 8 4 1 0.020 (0,51) min 0.070 (1,78) max 0.240 (6,10) 0.260 (6,60) 0.200 (5,08) max 0.125 (3,18) min 0.015 (0,38) 0.021 (0,53) seating plane m 0.010 (0,25) 0.100 (2,54) 0 ? 15 notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. falls within jedec ms-001 tps7101q, TPS7133q, tps7148q, tps7150q tps7101y, TPS7133y, tps7148y, tps7150y low-dropout voltage regulators slvs092g ? november 1994 ? revised january 2003 31 post office box 655303 ? dallas, texas 75265 mechanical data pw (r-pdso-g**) plastic small-outline package 4040064 / d 10/95 14 pin shown seating plane 0,10 min 1,20 max 1 a 7 14 0,17 4,50 4,30 8 6,10 6,70 0,32 0,75 0,50 0,25 gage plane 0,15 nom 0,65 m 0,13 0 ? 8 0,10 pins ** a min a max dim 2,90 3,10 8 4,90 5,10 14 6,60 6,40 4,90 5,10 16 7,70 20 7,90 24 9,60 9,80 28 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-153 important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third?party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2003, texas instruments incorporated |
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