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hd74alvc16836 20-bit universal bus driver with 3-state outputs ade-205-209 (z) preliminary 1st. edition january 1998 description this 20-bit universal bus driver is designed for 2.3 v to 3.6 v v cc operation. data flow from a to y is controlled by the output enable ( oe ) input. the device operates in the transparent mode when the latch enable ( le ) input is low. when le is high, the a data is latched if the clock (clk) input is held at a high or low logic level. if le is high, the a data is stored in the latch flip flop on the low to high transition of clk. when oe is high, the outputs are in the high impedance state. to ensure the high impedance state during power up or power down, oe should be tied to v cc through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. features v cc = 2.3 v to 3.6 v typical v ol ground bounce < 0.8 v (@v cc = 3.3 v, ta = 25 c) typical v oh undershoot > 2.0 v (@v cc = 3.3 v, ta = 25 c) high output current 24 ma (@v cc = 3.0 v)
hd74alvc16836 2 function table inputs output y oe le clk a hxxxz llxll llxhh lh - ll lh - hh l hhxy 0 *1 lhlxy 0 *2 h : high level l : low level x : immaterial z : high impedance - : low to high transition notes: 1. output level before the indicated steady state input conditions were established, provided that clk is high before le goes low. 2. output level before the indicated steady state input conditions were established.
hd74alvc16836 3 pin arrangement (top view) 1 2 3 4 5 6 7 8 9 10 v cc v cc y1 y2 gnd y3 y4 y5 y6 y7 gnd y8 y9 y10 y11 y12 y13 gnd y14 y15 y16 y17 y18 oe 11 12 13 14 15 16 17 18 19 20 21 22 23 24 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 a18 gnd 25 32 gnd y19 26 31 a19 y20 27 30 a20 nc 28 29 le a17 a16 a15 a14 a13 gnd a12 a11 a10 a9 a8 gnd a7 a6 a5 a4 a3 a2 clk gnd a1 v cc v cc
hd74alvc16836 4 absolute maximum ratings item symbol ratings unit conditions supply voltage v cc ?.5 to 4.6 v input voltage *1 v i ?.5 to 4.6 v output voltage *1, 2 v o ?.5 to v cc +0.5 v input clamp current i ik ?0 ma v i < 0 output clamp current i ok 50 ma v o < 0 or v o > v cc continuous output current i o 50 ma v o = 0 to v cc v cc , gnd current / pin i cc or i gnd 100 ma maximum power dissipation at ta = 55 c (in still air) *3 p t 1 w tssop storage temperature tstg ?5 to 150 c notes: stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ?ecommended operating conditions?is not implied. exposure to absolute maximum rated conditions for extended periods may affect device reliability. 1. the input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. this value is limited to 4.6 v maximum. 3. the maximum package power dissipation is calculated using a junction temperature of 150 c and a board trace length of 750 mils. recommended operating conditions item symbol min max unit conditions supply voltage v cc 2.3 3.6 v input voltage v i 0v cc v output voltage v o 0v cc v high level output current i oh ?2 ma v cc = 2.3 v ?2 v cc = 2.7 v ?4 v cc = 3.0 v low level output current i ol ?2mav cc = 2.3 v ?2 v cc = 2.7 v ?4 v cc = 3.0 v input transition rise or fall rate d t / d v 0 10 ns / v operating temperature ta ?0 85 c note: unused control inputs must be held high or low to prevent them from floating.
hd74alvc16836 5 logic diagram oe le a1 1 56 29 55 to nineteen other channels clk c1 1d clk 2 y1
hd74alvc16836 6 electrical characteristics (ta = ?0 to 85 c) item symbol v cc (v) min max unit test conditions input voltage v ih 2.3 to 2.7 1.7 v 2.7 to 3.6 2.0 v il 2.3 to 2.7 0.7 2.7 to 3.6 0.8 output voltage v oh 2.3 to 3.6 v cc ?.2 v i oh = ?00 m a 2.3 2.0 i oh = ? ma, v ih = 1.7 v 2.3 1.7 i oh = ?2 ma, v ih = 1.7 v 2.7 2.2 i oh = ?2 ma, v ih = 2.0 v 3.0 2.4 i oh = ?2 ma, v ih = 2.0 v 3.0 2.0 i oh = ?4 ma, v ih = 2.0 v v ol 2.3 to 3.6 0.2 i ol = 100 m a 2.3 0.4 i ol = 6 ma, v il = 0.7 v 2.3 0.7 i ol = 12 ma, v il = 0.7 v 2.7 0.4 i ol = 12 ma, v il = 0.8 v 3.0 0.55 i ol = 24 ma, v il = 0.8 v input current i in 3.6 5 m av in = v cc or gnd off state output current i oz 3.6 10 m av out = v cc or gnd quiescent supply current i cc 3.6 40 m av in = v cc or gnd d i cc 3.0 to 3.6 750 m av in = one input at (v cc ?.6) v, other inputs at v cc or gnd
hd74alvc16836 7 switching characteristics (ta = ?0 to 85 c) item symbol v cc (v) min typ max unit from (input) to (output) maximum clock frequency f max 2.5 0.2 150 mhz 2.7 150 3.3 0.3 150 propagation delay time t plh 2.5 0.2 1.0 4.2 ns a y t phl 2.7 4.2 3.3 0.3 1.0 3.6 2.5 0.2 1.3 5.0 le y 2.7 4.9 3.3 0.3 1.3 4.2 2.5 0.2 1.4 5.5 clk y 2.7 5.2 3.3 0.3 1.4 4.5 output enable time t zh 2.5 0.2 1.4 5.5 ns oe y t zl 2.7 5.6 3.3 0.3 1.1 4.6 output disable time t hz 2.5 0.2 1.0 4.5 ns oe y t lz 2.7 4.3 3.3 0.3 1.3 3.9 input capacitance c in 3.3 3.5 pf control inputs 3.3 6.0 data inputs output capacitance c o 3.3 7.0 pf outputs
hd74alvc16836 8 switching characteristics (ta = ?0 to 85 c) (cont) item symbol v cc (v) min typ max unit from (input) setup time t su 2.5 0.2 1.4 ns data before clk - 2.7 1.7 3.3 0.3 1.5 2.5 0.2 1.2 data before le - 2.7 1.6 clk ? 3.3 0.3 1.3 2.5 0.2 1.4 data before le - 2.7 1.5 clk ? 3.3 0.3 1.2 hold time t h 2.5 0.2 0.9 ns data after clk - 2.7 0.9 3.3 0.3 0.9 2.5 0.2 1.1 data after le - 2.7 1.1 clk ??or ? 3.3 0.3 1.1 pulse width t w 2.5 0.2 3.3 ns le ? 2.7 3.3 3.3 0.3 3.3 2.5 0.2 3.3 clk ??or ? 2.7 3.3 3.3 0.3 3.3
hd74alvc16836 9 test circuit 500 w c = 50 pf l 500 w s1 *1 see under table gnd open load circuit for outputs symbol t / t plh phl open gnd cc 2 v 6.0 v t / t zh hz t / t zl lz t / t / t su h w open gnd vcc=2.7v, 3.3 0.3v vcc=2.5 0.2v note: 1. c l includes probe and jig capacitance.
hd74alvc16836 10 waveforms ?1 t plh t phl v oh v ol gnd v ih v ref v ref v ref v ref input output 10 % 90 % t rf t 10 % 90 % waveforms ?2 t su t h t w gnd v ih gnd v ih gnd v ih timing input data input input 10 % 90 % t r v ref v ref v ref v ref v ref
hd74alvc16836 11 waveforms ?3 v ref1 v ref2 t zl t lz t zh t hz v oh v ol v cc v +0.15 v ol v ?.15 v oh v +0.3 v ol v ?.3 v oh v cc cc waveform - a output control waveform - b gnd v ih test v ih v ref v ref1 v ref2 1/2 v 1.5 v 2.7 v v oh1 v ol1 3.0 v gnd gnd vcc=2.7v, 3.3 0.3v vcc=2.5 0.2v 10 % 10 % 90 % 90 % t r t f v ref v ref v ref v ref ? v oh1 ? v ol1 notes: 1. all input pulses are supplied by generators having the following characteristics : prr 10 mhz, zo = 50 w , t r 2.0 ns, t f 2.0 ns. (v cc = 2.5 0.2 v) prr 10 mhz, zo = 50 w , t r 2.5 ns, t f 2.5 ns. (v cc = 2.7 v, 3.3 0.3 v) 2. waveform ?a is for an output with internal conditions such that the output is low except when disabled by the output control. 3. waveform ?b is for an output with internal conditions such that the output is high except when disabled by the output control. 4. the output are measured one at a time with one transition per measurement.
hd74alvc16836 12 package dimensions unit : mm hitachi code eiaj code jedec code ttp-56d 0.08 m 0.10 0.20 0.15 0.05 8.10 0.3 0.40 max 128 29 56 +0.1 ?.05 +0.3 ?.1 14.00 +0.3 ?.1 6.10 1.20 max 10 max 0.50 0.05 min 0.50 0.1
hd74alvc16836 13 when using this document, keep the following in mind: 1. this document may, wholly or partially, be subject to change without notice. 2. all rights are reserved: no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without hitachi? permission. 3. hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user? unit according to this document. 4. circuitry and other examples described herein are meant merely to indicate the characteristics and performance of hitachi? semiconductor products. hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. no license is granted by implication or otherwise under any patents or other rights of any third party or hitachi, ltd. 6. medical applications: hitachi? products are not authorized for use in medical applications without the written consent of the appropriate officer of hitachi? sales company. such use includes, but is not limited to, use in life support systems. buyers of hitachi? products are requested to notify the relevant hitachi sales offices when planning to use the products in medical applications. hitachi, ltd. semiconductor & ic div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100, japan tel: tokyo (03) 3270-2111 fax: (03) 3270-5109 for further information write to: hitachi america, ltd. semiconductor & ic div. 2000 sierra point parkway brisbane, ca. 94005-1835 u s a tel: 415-589-8300 fax: 415-583-4207 hitachi europe gmbh continental europe dornacher stra? 3 d-85622 feldkirchen m?nchen tel: 089-9 91 80-0 fax: 089-9 29 30-00 hitachi europe ltd. electronic components div. northern europe headquarters whitebrook park lower cookham road maidenhead berkshire sl6 8ya united kingdom tel: 01628-585000 fax: 01628-585160 hitachi asia pte. ltd. 16 collyer quay #20-00 hitachi tower singapore 049318 tel: 535-2100 fax: 535-1533 hitachi asia (hong kong) ltd. unit 706, north tower, world finance centre, harbour city, canton road tsim sha tsui, kowloon hong kong tel: 27359218 fax: 27306071 cop y ri g ht ?hitachi, ltd., 1997. all ri g hts reserved. printed in japan.

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