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  profet ? bts 721 l1 data book 604 01.07.97 smart four channel highside power switch features ? overload protection ? current limitation ? short-circuit protection ? thermal shutdown ? overvoltage protection (including load dump) ? fast demagnetization of inductive loads ? reverse battery protection 1 ) ? undervoltage and overvoltage shutdown with auto-restart and hysteresis ? open drain diagnostic output ? open load detection in on-state ? cmos compatible input ? loss of ground and loss of v bb protection ? e lectro s tatic d ischarge ( esd ) protection application ? c compatible power switch with diagnostic feedback for 12 v and 24 v dc grounded loads ? all types of resistive, inductive and capacitive loads ? replaces electromechanical relays and discrete circuits general description n channel vertical power fet with charge pump, ground referenced cmos compatible input and diagnostic feedback, monolithically integrated in smart sipmos technology. fully protected by embedded protection functions. pin definitions and functions pin symbol function 1,10, 11,12, 15,16, 19,20 v bb positive power supply voltage . design the wiring for the simultaneous max. short circuit currents from channel 1 to 4 and also for low thermal resistance 3in1 input 1 .. 4 , activates channel 1 .. 4 in case of 5 in2 logic high signal 7in3 9in4 18 out1 output 1 .. 4 , protected high-side power output 17 out2 of channel 1 .. 4. design the wiring for the 14 out3 max. short circuit current 13 out4 4st1/2 diagnostic feedback 1/2 of channel 1 and channel 2, open drain, low on failure 8st3/4 diagnostic feedback 3/4 of channel 3 and channel 4, open drain, low on failure 2 gnd1/2 ground 1/2 of chip 1 (channel 1 and channel 2) 6 gnd3/4 ground 3/4 of chip 2 (channel 3 and channel 4) 1 ) with external current limit (e.g. resistor r gnd =150 ? ) in gnd connection, resistor in series with st connection, reverse load current limited by connected load. product summary overvoltage protection v bb(az) 43 v operating voltage v bb(on) 5.0 ... 34 v active channels: one two parallel four parallel on-state resistance r on 100 50 25 m ? nominal load current i l ( nom ) 2.9 4.3 6.3 a current limitation i l(scr) 88 8 a pin configuration (top view) v bb 1 ? 20 v bb gnd1/2 2 19 v bb in1 3 18 out1 st1/2 4 17 out2 in2 5 16 v bb gnd3/4 6 15 v bb in3 7 14 out3 st3/4 8 13 out4 in4 9 12 v bb v bb 10 11 v bb p-dso-20 p dso 20 1 6 7 9 14 1
profet ? bts 721 l1 data book 605 01.07.97 block diagram four channels; open load detection in on state; + v bb in1 st1/2 esd out1 logic voltage senso r voltage source open load detection 1 short to vbb level shifte r temperature sensor 1 rectifier 1 limit fo r unclamped ind. loads 1 gate 1 protection current limit 1 3 4 v logic overvoltage protection out2 open load detection 2 short to vbb level shifte r temperature sensor 2 rectifier 2 limit fo r unclamped ind. loads 2 gate 2 protection current limit 2 in2 5 gnd1/2 rr o1 o2 charge pump 1 charge pump 2 channel 2 channel 1 signal gnd gnd1/2 2 chip 1 chip 1 + v bb in3 st3/4 profet out3 7 8 out4 in4 9 gnd3/4 rr o3 o4 channel 4 channel 3 leadframe connected to pin 1, 10, 11, 12, 15, 1 , 1 , 20 leadframe 18 17 load gnd load leadframe 14 13 load gnd load signal gnd gnd3/4 6 chip 2 chip 2 logic and protection circuit of chip 2 (equivalent to chip 1)
profet ? bts 721 l1 data book 606 01.07.97 maximum ratings at t j = 25 c unless otherwise specified parameter symbol values unit supply voltage (overvoltage protection see page 4) v bb 43 v supply voltage for full short circuit protection t j,start = -40 ...+150 c v bb 34 v load current (short-circuit current, see page 5) i l self-limited a load dump protection 2 ) v loaddump = u a + v s , u a = 13.5 v r i 3 ) = 2 ? , t d = 200 ms; in = low or high, each channel loaded with r l = 4.7 ? , v load dump 4 ) 60 v operating temperature range storage temperature range t j t stg -40 ...+150 -55 ...+150 c power dissipation (dc) 5 t a = 25 c: (all channels active) t a = 85 c: p tot 3.7 1.9 w inductive load switch-off energy dissipation, single pulse v bb = 12v, t j,start = 150 c 5) , i l = 2.9 a, z l = 58 mh, 0 ? one channel: i l = 4.3 a, z l = 58 mh, 0 ? two parallel channels: i l = 6.3 a, z l = 58 mh, 0 ? four parallel channels: see diagrams on page 10 and page 11 e as 0.3 0.65 1.5 j electrostatic discharge capability (esd) (human body model) v esd 1.0 kv input voltage (dc) v in -10 ... +16 v current through input pin (dc) current through status pin (dc) see internal circuit diagram page 9 i in i st 2.0 5.0 ma thermal resistance junction - soldering point 5),6) each channel: r thjs 15 k/w junction - ambient 5) one channel active: all channels active: r thja 41 34 2 ) supply voltages higher than v bb(az) require an external current limit for the gnd and status pins, e.g. with a 150 ? resistor in the gnd connection and a 15 k ? resistor in series with the status pin. a resistor for input protection is integrated. 3) r i = internal resistance of the load dump test pulse generator 4) v load dump is setup without the dut connected to the generator per iso 7637-1 and din 40839 5 ) device on 50mm*50mm*1.5mm epoxy pcb fr4 with 6cm 2 (one layer, 70 m thick) copper area for v bb connection. pcb is vertical without blown air. see page 16 6 ) soldering point: upper side of solder edge of device pin 15. see page 16 608) 611 612 and page 613 859 859 607)
profet ? bts 721 l1 data book 607 01.07.97 parameter and conditions, each of the four channels symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max load switching capabilities and characteristics on-state resistance (v bb to out) i l = 2 a each channel, t j = 25 c: t j = 150 c: two parallel channels, t j = 25 c: four parallel channels, t j = 25 c: r on -- 85 170 43 22 100 200 50 25 m ? nominal load current one channel active: two parallel channels active: four parallel channels active: device on pcb 5) , t a = 85 c, t j 150 c i l(nom) 2.5 3.8 5.9 2.9 4.3 6.3 -- a output current while gnd disconnected or pulled up; v bb = 30 v, v in = 0, see diagram page 10 i l(gndhigh) -- -- 10 ma turn-on time to 90% v out : turn-off time to 10% v out : r l = 12 ? , t j =-40...+150 c t on t off 80 80 200 200 400 400 s slew rate on 10 to 30% v out , r l = 12 ? , t j =-40...+150 c: d v /dt on 0.1 -- 1 v/ s slew rate off 70 to 40% v out , r l = 12 ? , t j =-40...+150 c: -d v /dt off 0.1 -- 1 v/ s operating parameters operating voltage 7 ) t j =-40...+150 c: v bb(on) 5.0 -- 34 v undervoltage shutdown t j =-40...+150 c: v bb(under) 3.5 -- 5.0 v undervoltage restart t j =-40...+25 c: t j =+150 c: v bb(u rst) -- -- 5.0 7.0 v undervolta g e restart of char g e pump see diagram page 15 t j =-40...+150 c: v bb(ucp) -- 5.6 7.0 v undervoltage hysteresis ? v bb(under) = v bb(u rst) - v bb(under) ? v bb(under) -- 0.2 -- v overvoltage shutdown t j =-40...+150 c: v bb(over) 34 -- 43 v overvoltage restart t j =-40...+150 c: v bb(o rst) 33 -- -- v overvoltage hysteresis t j =-40...+150 c: ? v bb(over) -- 0.5 -- v overvoltage protection 8 ) t j =-40...+150 c: i bb = 40 ma v bb(az) 42 47 -- v 7) at supply voltage increase up to v bb = 5.6 v typ without charge pump, v out v bb - 2 v 8) see also v on(cl) in circuit diagram on page 9. 612 617 611.
profet ? bts 721 l1 data book 608 01.07.97 parameter and conditions, each of the four channels symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max standby current, all channels off t j =25 c : v in = 0 t j =150 c: i bb(off) -- -- 28 44 60 70 a leakage output current (included in i bb(off) ) v in = 0 i l(off) -- -- 12 a operating current 9) , v in = 5v, t j =-40...+150 c i gnd = i gnd1/2 + i gnd3/4 , one channel on: four channels on: i gnd -- -- 2 8 3 12 ma protection functions initial peak short circuit current limit, (see timing diagrams, page 13) each channel, t j =-40 c: t j =25 c: t j =+150 c: i l(scp) 11 9 5 18 14 8 25 22 14 a two parallel channels twice the current of one channel four parallel channels four times the current of one channel repetitive short circuit current limit, t j = t jt each channel two parallel channels four parallel channels (see timing diagrams, page 13) i l(scr) -- -- -- 8 8 8 -- -- -- a initial short circuit shutdown time t j,start =-40 c: t j,start = 25 c: (see page 12 and timing diagrams on page 13) t off(sc) -- -- 3.8 3 -- -- ms output clamp (inductive load switch off) 10) at v on(cl) = v bb - v out v on(cl) -- 47 -- v thermal overload trip temperature t jt 150 -- -- c thermal hysteresis ? t jt -- 10 -- k reverse battery reverse battery voltage 11 ) - v bb -- -- 32 v drain-source diode voltage (v out > v bb ) i l = - 2.9 a, t j = +150 c - v on -- 610 -- mv 9 ) add i st , if i st > 0 10 ) if channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest v on(cl) 11 ) requires a 150 ? resistor in gnd connection. the reverse load current through the intrinsic drain-source diode has to be limited by the connected load. note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. the temperature protection is not active during reverse current operation! input and status currents have to be limited (see max. ratings page 3 and circuit page 9). 615) 606 and circuit page 611). 615) 615 and timing diagrams on page 615)
profet ? bts 721 l1 data book 609 01.07.97 parameter and conditions, each of the four channels symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max diagnostic characteristics open load detection current, (on-condition) each channel, t j = -40 c: t j = 25 c: t j = 150 c: i l (ol) 1 20 20 20 -- -- -- 400 300 300 ma two parallel channels twice the current of one channel four parallel channels four times the current of one channel open load detection voltage 12 ) t j =-40..+150 c: v out(ol) 234v internal output pull down (out to gnd), v out = 5 v t j =-40..+150 c: r o 41030 k ? input and status feedback 13 ) input resistance (see circuit page 9) t j =-40..+150 c: r i 2.5 3.5 6 k ? input turn-on threshold voltage t j =-40..+150 c: v in(t+) 1.7 -- 3.5 v input turn-off threshold voltage t j =-40..+150 c: v in(t-) 1.5 -- -- v input threshold hysteresis ? v in(t) -- 0.5 -- v off state input current v in = 0.4 v: t j =-40..+150 c: i in(off) 1--50 a on state input current v in = 5 v: t j =-40..+150 c: i in(on) 20 50 90 a delay time for status with open load after switch off (other channel in off state) (see timing diagrams, page 14 ), t j =-40..+150 c: t d(st ol4) 100 320 800 s delay time for status with open load after switch off (other channel in on state) (see timing diagrams, page 14 ), t j =-40..+150 c: t d(st ol5) -- 5 20 s status invalid after positive input slope (open load) t j =-40..+150 c: t d(st) -- 200 600 s status output (open drain) zener limit voltage t j =-40...+150 c, i st = +1.6 ma: st low voltage t j =-40...+25 c, i st = +1.6 ma: t j = +150 c, i st = +1.6 ma: v st(high) v st(low) 5.4 -- -- 6.1 -- -- -- 0.4 0.6 v 12) external pull up resistor required for open load detection in off state. 13) if ground resistors r gnd are used, add the voltage drop across these resistors. 616), 616), 611)
profet ? bts 721 l1 data book 610 01.07.97 truth table channel 1 and 2 chip 1 in1 in2 out1 out2 st1/2 channel 3 and 4 (equivalent to channel 1 and 2) chip 2 in3 in4 out3 out4 st3/4 bts 721l1 normal operation l l h h l h l h l l h h l h l h h h h h open load channel 1 (3) l l h l h x z z h l h x h(l 14 ) ) h l channel 2 (4) l h x l l h l h x z z h h(l 14 ) ) h l short circuit to v bb channel 1 (3) l l h l h x h h h l h x l 15 ) h h(l 16 ) ) channel 2 (4) l h x l l h l h x h h h l 15) h h(l 16 ) ) overtemperature both channel l x h l h x l l l l l l h l l channel 1 (3) l h x x l l x x h l channel 2 (4) x x l h x x l l h l undervoltage/ overvoltage x x l l h l = "low" level x = don't care z = high impedance, potential depends on external circuit h = "high" level status signal valid after the time delay shown in the timing diagrams parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and outputs in parallel (see truth table). if switching channel 1 to 4 in parallel, the status outputs st1/2 and st3/4 have to be configured as a 'wired or' function with a single pull-up resistor. terms profet in2 st1/2 out2 gnd1/2 v bb v out2 i gnd1/2 v on2 18 2 leadframe 3 4 in1 v out1 v on1 i l1 out1 5 17 v in1 v in2 v st1/2 i bb i in1 i in2 i st1/2 i l2 r gnd1/2 v bb chip 1 profet in4 st3/4 out4 gnd3/4 v bb v out4 i gnd3/4 v on4 14 6 leadframe 7 8 in3 v out3 v on3 i l3 out3 9 13 v in3 v in4 v st3/4 i in3 i in4 i st3/4 i l4 r gnd3/4 chip 2 leadframe (v bb ) is connected to pin 1,10,11,12,15,16,19,20 14 ) with additional external pull up resistor 15) an external short of output to v bb in the off state causes an internal current from output to ground. if r gnd is used, an offset voltage at the gnd and st pins will occur and the v st low signal may be errorious. 16 ) low resistance to v bb may be detected by no-load-detection external r gnd optional; two resistors r gnd1/2 ,r gnd3/4 = 150 ? or a single resistor r gnd = 75 ? for reverse battery protection up to the max. operating voltage.
profet ? bts 721 l1 data book 611 01.07.97 input circuit (esd protection), in1...4 in gnd i r esd-zd i i i esd zener diodes are not to be used as voltage clamp at dc conditions. operation in this mode may result in a drift of the zener voltage (increase of up to 1 v). status output, st1/2 or st3/4 st gnd esd- zd +5v r st(on) esd-zener diode: 6.1 v typ., max 5.0 ma; r st(on) < 380 ? at 1.6 ma, esd zener diodes are not to be used as voltage clamp at dc conditions. operation in this mode may resul t in a drift of the zener voltage (increase of up to 1 v). inductive and overvoltage output clamp, out1...4 +v bb out profet v z v on power gnd v on clamped to v on(cl) = 47 v typ. overvoltage protection of logic part gnd1/2 or gnd3/4 + v bb in st st r gnd gnd r signal gnd logic v z2 in r i v z1 v z1 = 6.1 v typ., v z2 = 47 v typ., r i = 3.5 k ? typ. , r gnd = 150 ? reverse battery protection gnd logic st r in st 5v out l r power gnd gnd r signal gnd power inverse i r v bb - diode r gnd = 150 ?, r i = 3.5 k ? typ , temperature protection is not active during inverse current operation.
profet ? bts 721 l1 data book 612 01.07.97 open-load detection, out1...4 on-state diagnostic condition: v on < r on i l(ol) ; in high open load detection logic unit + v bb out on v on off-state diagnostic condition: v out > 3 v typ.; in low open load detection logic unit v out signal gnd r ext r o off gnd disconnect (channel 1/2 or 3/4) profet v in2 st out2 gnd bb v bb i bb in1 out1 v in1 v in2 v st v gnd any kind of load. in case of in = high is v out v in - v in(t+) . due to v gnd > 0, no v st = low signal available. gnd disconnect with gnd pull up (channel 1/2 or 3/4) profet v in2 st out2 gnd bb v bb in1 out1 v in1 v in2 v st v gnd any kind of load. if v gnd > v in - v in(t+) device stays off due to v gnd > 0, no v st = low signal available. v bb disconnect with energized inductive load profet v in2 st out2 gnd bb v bb in1 out1 high for an inductive load current up to the limit defined by e as (max. ratings see page 3 and diagram on page 11) each switch is protected against loss of v bb . consider at your pcb layout that in the case of vbb dis- connection with energized inductive load the whole load current flows through the gnd connection. 606 613)
profet ? bts 721 l1 data book 613 01.07.97 inductive load switch-off energy dissipation profet v in st out gnd bb = e e e e as bb l r e load r l l { l z energy stored in load inductance: e l = 1 / 2 l i 2 l while demagnetizing load inductance, the energy dissipated in profet is e as = e bb + e l - e r = v on(cl) i l (t) dt, with an approximate solution for r l > 0 ? : e as = i l l 2 r l ( v bb + |v out(cl) |) ln (1+ i l r l |v out(cl) | ) maximum allowable load inductance for a single switch off (one channel) 5) l = f (i l ); t j,start = 150 c, v bb = 12 v, r l = 0 ? l [mh] 1 10 100 1000 10000 12345678 i l [a]
profet ? bts 721 l1 data book 614 01.07.97 typ. on-state resistance r on = f (v bb ,t j ) ; i l = 2 a, in = high r on [mohm] 0 50 100 150 200 250 300 0 10203040 tj = 150c 85c 25c -40c v bb [v] typ. open load detection current i l(ol) = f (v bb ,t j ); in = high i l(ol) [ma] 0 20 40 60 80 100 120 140 160 180 200 220 0 5 10 15 20 25 30 tj = 150c 85c 25c -40c no-load detection not specified for v bb < 6 v v bb [v] typ. standby current i bb(off) = f (t j ) ; v bb = 9...34 v, in 1...4 = low i bb(off) [ a] 0 10 20 30 40 50 60 -50 0 50 100 150 200 t j [ c] typ. initial short circuit shutdown time t off(sc) = f (t j,start ) ; v bb =12 v t off(sc) [msec] 0 0.5 1 1.5 2 2.5 3 3.5 4 -50 0 50 100 150 200 t j,start [ c]
profet ? bts 721 l1 data book 615 01.07.97 figure 1a: v bb turn on: in2 v out1 t v bb st open drain in1 v out2 figure 2a: switching a lamp: in st out l t v i the initial peak current should be limited by the lamp and not by the initial short circuit current i l(scp) = 14 a typ. of the device. figure 2b: switching an inductive load in st l t v i *) out t d(st) i l(ol) *) if the time constant of load is too large, open-load-status may occur figure 3a: turn on into short circuit: shut down by overtemperature, restart by cooling other channel: normal t i st in1 l1 l(scr) i i l(scp) t off(sc) heating up of the chip may require several milliseconds, depending on external conditions (t off(sc) vs. t j,start see page 12) timing diagrams timing diagrams are shown for chip 1 (channel 1/2). for chip 2 (channel 3/4) the diagrams are valid too. the channels 1 and 2, respectively 3 and 4, are symmetric and consequently the diagrams are valid for each channel as well as for permuted channels 614)
profet ? bts 721 l1 data book 616 01.07.97 figure 3b: turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2) t st1/2 in1/2 l1 l2 l(scr) i i l(scp) i + i t off(sc) figure 4a: overtemperature: reset if t j < t jt in st out j t v t figure 5a: open load: detection in on-state, open load occurs in on-state in2 channel 2: normal out1 t v st in1 i l1 t d(st ol1) t d(st ol2) t d(st ol1) t d(st ol2 ) open load open load normal load channel 1: t d(st ol1) = 30 s typ., t d(st ol2) = 20 s typ figure 5b: open load: detection in on-state, turn on/off to open load out1 t v st in1 i l1 t d(st) t d(st ol4) t d(st) t d(st ol5) in2 channel 2: normal operation channel 1: open load the status delay time t d(stol4) allows to distinguish between the failure modes "open load in on-state" and "overtemperature".
profet ? bts 721 l1 data book 617 01.07.97 figure 5c: open load: detection in on- and off-state (with r ext ), turn on/off to open load t v st in1 i l1 t d(st) d(st ol5) channel 1: open t d(st) t out1 in2 channel 2: normal operation t d(st ol5) depends on external circuitry because of high impedance figure 6a: undervoltage: in v out t v bb st open drain v v bb(under) bb(u rst) bb(u cp) v figure 6b: undervoltage restart of charge pump bb(under) v v bb(u rst) v bb(over) v bb(o rst) v bb(u cp) off- state on- state v on(cl) v bb v on off- state in = high, normal load conditions. charge pump starts at v bb(ucp) = 5.6 v typ. figure 7a: overvoltage: in v out t v bb st on(cl) v v bb(over) v bb(o rst)


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