ordering number : enn7131 11502rm (ot) no. 7131-1/9 overview the LA9239T is a cd-rom digital servo rf ic that supports high-speed cd-rom drive replay of up to 48 . it also supports rw disks by featuring an on-chip servo vca and gain switch. functions rf amplifier (with agc) rf gain amplifier (supporting cd-rw disk replay) rf equalizer (7 modes) rf hold function ph/bh detection 3t extraction circuit fe amplifier (built-in balance adjustment vca) te amplifier (built-in balance adjustment vca) servo signal vca circuit apc circuit (with laser power-up function) sleep function features the LA9239T is an ic that features on-chip functions for improved playability and an rf equalizer, resulting in superior performance and a reduced need for external components. package dimensions unit: mm 3253-tssop36 7.6 5.6 (0.5) (1.0) 9.95 0.5 1.0 0.15 1 18 36 19 0.22 0.725 0.8 1.2max sanyo: tssop36 [LA9239T] LA9239T sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan 48 cd-rom digital servo rf ic monolithic linear ic any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft? control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein. parameter symbol conditions ratings unit maximum power supply voltage v cc max 7v allowable power dissipation pd max 300 mw operating temperature topr ?5 to +70 ? storage temperature tstg ?0 to +150 ? specifications maximum ratings at ta = 25?, pins 4 and 31 = gnd parameter symbol conditions ratings unit recommended power supply voltage v cc 5v allowable operating voltage range v cc op 4.5 to 5.5 v operating conditions at ta = 25?
no. 7131- 2 /9 LA9239T parameter symbol conditions ratings unit min typ max current drain i cc no signal 18 30 42 ma current drain (during sleep) i ccs no signal, eqs = 0 v 2 6 10 ma reference voltage vref 2.3 2.5 2.7 v preamplifier offset rfaoost difference with vr in rfa0 ?20 0 +120 mv rf no-signal voltage rfsm fin1, fin2 = vr 1.5 1.8 2.3 v rf gain max rfg1 ghs = 0 v 19 21 23 db rf gain min rfg2 ghs = 0 v 4 6 8 db rf gain up rfgup ghs = 5 v 12.5 14 15.5 db rfsm difference when fin1, 2: 350 mvp-p, rfeq normal rfeqn f = 1 mhz and 350 mvp-p, f = 100 khz, 1.5 3.5 5.5 db eqs = 5 v, bhc = 2.45 v, phc = 2.8 v rfsm difference when fin1, 2: 350 mvp-p, rfeq cav1 rfeq1 f = 2.4 mhz and 350 mvp-p, f = 100 khz, 1 3 5 db eqs = 4.1 v, bhc = 2.45 v, phc = 2.8 v rfsm difference when fin1, 2: 350 mvp-p, rfeq cav2 rfeq2 f = 4.4 mhz and 350 mvp-p, f = 100 khz, 1 3 5 db eqs = 3.4 v, bhc = 2.45 v, phc = 2.8 v rfsm difference when fin1, 2: 350 mvp-p, rfeq cav3 rfeq3 f = 6 mhz and 350 mvp-p, f = 100 khz, 1 3 5 db eqs = 2.8 v, bhc = 2.45 v, phc = 2.8 v rfsm difference when fin1, 2: 350 mvp-p, rfeq cav4 rfeq4 f = 8 mhz and 350 mvp-p, f = 100 khz, 1 3 5 db eqs = 2.2 v, bhc = 2.45 v, phc = 2.8 v rfsm difference when fin1, 2: 350 mvp-p, rfeq cav5 rfeq5 f = 12 mhz and 350 mvp-p, f = 100 khz, 1 3 5 db eqs = 1.6 v, bhc = 2.45 v, phc = 2.8 v rfsm difference when fin1, 2: 350 mvp-p, rfeq cav6 rfeq6 f = 30 mhz and 350 mvp-p, f = 100 khz, 0.5 2.5 4.5 db eqs = 0.9 v, bhc = 2.45 v, phc = 2.8 v rf hold rfhld fin1, 2: 700 mvp-p, f = 100 khz, rhld = 5 v ?3.5 ?1 ?.5 db ph ph rfsm = 1.7 vp-p 2.7 3.3 3.9 v 3t extraction 3ton difference with rfsm for 3ton = 5 v, ph ?0 ?6.5 ?3 db bh bh rfsm = 1.7 vp-p 1.3 1.6 1.9 v bh band switch bhh f = 100 khz, rhh = 5 v 7 9 11 db refl offset reflost difference with vr for refl ?20 0 +120 mv refl gain 1 refl1 fin1 = vin, fin2 = vr, sgc = 2 v 9 11 13 db refl gain 2 refl2 fin1 = vin, fin2 = vr, sgc = 3 v 14.5 16.5 18.5 db fe offset feost difference with vr for fe ?20 0 +120 mv fe gain 1 feg1 fin1 = vin, fin2 = vr, sgc = 2 v, fbal = vr 5 7 9 db fe gain 2 feg2 fin1 = vin, fin2 = vr, sgc = 3 v, fbal = vr 10 12 14 db fe balance 1 fbal1 fin1 = vin, fin2 = vr, sgc = vr, fbal = 2 v 10.5 12.5 14.5 db fe balance 2 fbal2 fin1 = vin, fin2 = vr, sgc = vr, fbal = 3 v 7.5 9.5 11.5 db te offset teost difference with vr for te ?20 0 +120 mv te gain 1 teg1 e = vin, f = vr, sgc = 2 v, tbal = vr 13.5 15.5 17.5 db te gain 2 teg2 e = vin, f = vr, sgc = 3 v, tbal = vr 19 21 23 db te balance 1 tbal1 e = vin, f = vr, sgc = vr, tbal = 2 v 20 22 24 db te balance 2 tbal2 e = vin, f = vr, sgc = vr, tbal = 3 v 16 18 20 db ts offset tsost difference with vr for ts ?20 0 +120 mv ts gain 1 tsg1 ghs = 0 v, tbal = vr 13 15 17 db ts gain 2 tsg2 ghs = 5 v, tbal = vr 25 27 29 db ts band 1 tshl te-te- = 82 p, tsh = 0 v 16 20 24 khz ts band 2 tshh te-te- = 82 p, tsh = 5 v 240 300 360 khz apc reference voltage 1 ldsl lsd voltage for ldd = 3 v, ldon = 0 v 175 190 205 mv apc reference voltage 2 ldsh lsd voltage for ldd = 3 v, ldon = 5 v 215 230 245 mv apc off voltage ldd ldon = vr 4 4.3 5 v operating characteristics at ta = 25 c, v cc (pins 23, 34) = 5 v, gnd (pins 4, 31) = 0 v
no. 7131- 3 /9 LA9239T explanation of operation (1) rf amplifier the rf signal is generated by inputting (a+c) from fin2 (pin 8) and (b+d) from fin1 (pin 7) and adding the two. the efm signal is output from the rfsm (pin 33) via the preamplifier, gain switch, rfagc circuit, and 3t compensation circuit. the rfsum output d range is 1 to 4 v. 3t compensation can be done according to the band through the eqs (pin 18) control pin. the gain switch enables replay of cd and cd-rw disks, and when ghs (pin 16) level is made hi (cd-rw mode), a gain of 14 db can be obtained. in the cd mode, the gain is 0 db. the on-chip agc circuit has a variable range of 6 db. the peak level controls the rfagc level, and the bottom level controls the dc level of rf. the respective frequency response characteristics can be changed with the external capacitors connected to phc (pin 2) and bhc (pin 1). the response frequency is proportional to the capacitance of the phc and bhc capacitors. when a defect is detected in the dsp, agc control can be changed to the hold status (by making rhld (pin 32) hi) to prevent the rf signal from becoming unstable. (2) focus error amplifier the focus error signal is generated by inputting (a+c) to fin2 (pin 8) and (b+d) to fin1 (pin 7), passing these signals through the focus balance adjustment vca, and extracting the difference between the two ((b+d)?a+c)). the fe signal is gain controlled by fe-vca and output to fe (pin 28). the fe signal gain can be set with the resistor connected between fe and fe- (pin 29). the focus balance adjustment vca is controlled by fbal (pin 21), and fe-vca is controlled by sgc (pin 19). a gain of +12 db for the fe signal gain is obtained in the rw mode by making the gs level hi. note: the polarity of the fe output in relation to the fin1 input is common-mode output. (3) tracking error amplifier the tracking error signal is generated through input to e (pin 9) and f (pin 10), passing the signals through the tracking balance adjustment vca, and detecting their difference. the te signal is gain controlled at te-vca and output from te (pin 26). the te signal gain can be set with the resistor connected between te and te- (pin 27). the tracking balance adjustment vca is controlled by tbal (pin 20), and te-vca is controlled by sgc (pin 19). the te signal for the tes comparator is output from ts (pin 23). the ts signal level must meet the tes comparator level in the dsp. setting of this level is performed with the pickup output and the resistor between the e and f inputs. in the rw mode, a gain of +12 db for te and ts signal gain is obtained by making the ghs (pin 16) level hi (same as for rf). an on-chip band switch is also provided to support high-speed seek for the ts signal, which is controlled with tsh (pin 22). the band can be set with the capacitance between tss (pin 25) and ts. note: the polarity of the te output in relation to the e input is inverted output, and the polarity of the ts output in relation to the e input is also inverted output. (4) apc (auto laser power control) the apc controls the pickup laser power. since cd-rw disks are also supported, a laser power-up (+20%) function is also provided. laser on/off and laser power-up control are performed with ldon (pin 15). (5) refl detection (reflected light detection) and focus detection the reflected light amount signal from the disk is added to the fin1 and fin2 inputs (a+b+c+d) and fetched. it is then gain controlled at refl-vca and output from refl (pin 30) to the dsp. this output signal is used to control sgc (pin 19) to secure the d range of the servo signal in relation to disk irregularities. the amount of light is judged by the dsp and sgc control is performed. refl-vca is controlled by sgc. during rw replay, the refl gain is increased by 12 db (ghs = hi). the refl signal is also used as a signal for focus detection. note: the polarity of the refl output in relation to the fin1 input is common-mode output.
no. 7131- 4 /9 LA9239T (6) bh (rf bottom hold signal) the hfl (mirror) detection signal is generated at bh (pin 35), and hfl (mirror) is detected in the dsp. the dsp detects the track jump direction using the phase difference with tes. moreover, this bh circuit has a band switching function that can be controlled with bhh (pin 17). (bhh = hi for wide band) (7) ph (rf peak hold signal) the rf peak hold signal used for defect detection is output from ph. the dsp performs defect detection judgments based on this signal. since the efm signal level is not necessarily stable due to the influence of the disk's reflection factor, consideration must be paid to using as reference the ph signal level measured when there are no scratches, for defect judgment. moreover, the ph circuit performs constant settings during ph demodulation according to the speed. this is controlled along with the rf equalizer by the eqs (pin 18) control pin. the system is designed so that, during focus balance adjustment, the peak and bottom levels of the 3t component are detected and output as the error signal. during focus balance adjustment, 3t is extracted and output from ph and bh by setting 3ton (pin 6) to hi. (8) sleep the sleep status can be selected in order to reduce the current drain of the ic. (sleep is selected with eqs (pin 18) = gnd.) usage note the level of the signals input to fin1 (pin 7), fin2 (pin 8), e (pin 9), and f (pin 10) must be set so that it is higher than the reference voltage (vref). relationships between control pin voltages and operation modes 1. 3ton (pin 6) extracts 3t and performs focus balance adjustment. mode min max extraction frequency 3ton 3.0 v 5.0 v 10 mhz 3toff 0 v 2.0 v 2. ldon (pin 15) laser on and laser power-up (20%) switch control mode min max laser power up puph 3.5 v 5.0 v on hi ldof 2.0 v 3.0 v off low ldon+pupl 0 v 1.5 v on low 3. ghs (pin 16) rf and ts gain-up (+14 db) switch control mode min max gain up rw support 3.0 v 5.0 v hi cd support 0 v 2.0 v low 4. bhh (pin 17) reduces the time constant during bottom hold when the access speed is slow. mode min max band (fc) hi (during normal operation) 3.0 v 5.0 v 450 khz low (when access speed is slow) 0 v 2.0 v 80 khz
no. 7131- 5 /9 LA9239T 5. tsh (pin 22) ts filter setting pin for tes signal tsh min max ts band hi (during seek) 3.0 v 5.0 v 300 khz low (other than seek) 0 v 2.0 v 20 khz (between pins 24 and 25: 80p) 6. eqs (pin 18) rf equalizer, ph detection time constant control (7 modes), and sleep switch control ph time constant switching is done according to the equalizer switch. mode min max +2 db boost frequency 11t frequency normal 4.5 v 5.0 v approx. 1.0 mhz approx. 200 khz cav1 3.9 v 4.3 v approx. 2.4 mhz approx. 2.4 mhz cav2 3.2 v 3.6 v approx. 4.3 mhz approx. 3.5 mhz cav3 2.6 v 3.0 v approx. 6.0 mhz approx. 3.9 mhz cav4 2.0 v 2.4 v approx. 8.0 mhz approx. 4.7 mhz cav5 1.4 v 1.8 v approx. 11 mhz approx. 5.9 mhz cav6 0.8 v 1.2 v approx. 30 mhz approx. 9.4 mhz sleep 0 v 0.5 v 7. rhld (pin 32) rhld min max hi (during defect detection) 3.0 v 5.0 v low (during normal operation) 0 v 2.0 v
no. 7131- 6 /9 LA9239T pin no. pin name description 1 bhc bottom hold capacitor connection pin for rf agc detection 2 phc peak hold capacitor connection pin for rf agc detection 3 rfao rf preamplifier output pin 4 gnd1 rf signal gnd pin 5 rfa rf preamplifier minus input pin 6 3ton 3t extraction circuit control pin 7 fin1 pickup voltage output connection pin. the rf signal and mirror signal are generated by adding fin1 to fin2, and the fe signal is generated by subtracting fin1 from fin2. 8 fin2 pickup voltage output connection pin 9 e pickup voltage output connection pin. the te signal is generated by subtracting e from f. 10 f pickup voltage output connection pin 11 refi reference voltage bus capacitor connection pin 12 vref reference voltage output pin 13 ldd apc circuit output pin 14 lds apc circuit input pin 15 ldon laser on/off, laser power-up control pin 16 ghs rf, ts signal gain switch pin (0 db/+14 db) 17 bhh bh response switch pin 18 eqs rf equalizer, ph detection control pin 19 sgc servo gain control pin (fe, te, refl signals) 20 tbal te balance adjustment pin 21 fbal fe balance adjustment pin 22 tsh ts signal band control pin 23 vcc2 servo signal vcc pin 24 ts ts signal (tes signal source) output pin ( ? dsp) 25 tss ts signal band setting pin 26 te te signal output pin ( ? dsp) 27 te te signal gain setting pin 28 fe fe signal output pin ( ? dsp) 29 fe servo signal gnd pin 30 refl reflection signal output pin ( ? dsp) 31 gnd2 servo signal gnd pin 32 rhld rf hold control pin 33 rfsm efm signal output pin ( ? dsp) 34 vcc1 rf signal vcc pin 35 bh rf bottom hold signal output pin ( ? dsp) 36 ph rf peak hold signal output pin ( ? dsp) pin description
no. 7131- 7 /9 LA9239T block diagram apc ref v cc 1 v cc 5v fe fe- - refl rhld rfsm bh ph gnd2 - - + 1 2 3 4 5 6 8 9 10 11 12 13 14 15 16 17 18 34 33 31 30 29 28 25 24 23 22 bhc phc ref ref ref rf a0 rf a- - 3t on gnd1 ref rf a gc rf a gc - - + - - + eqs bhh ghs ldon lds v cc ldd vref refi pick-up f dsp e fin2 fin1 bal +gup 20 sgc tbal fbal tsh 7 21 v cc v cc 2 ts ts amp tss te te- - 5v - - + 32 - - + ref 26 27 36 35 bal +gup refl-vca f .-vca t .-vca 19 te amp fe amp dsp
no. 7131- 8 /9 LA9239T test circuit 0.1 f v cc 1 v cc 5v + 47 f fe fe- - refl rhld rfsm bh ph gnd2 39k - - + ref ref - - + 1 2 3 4 5 6 8 9 10 11 12 13 14 15 16 17 18 34 33 31 30 29 28 25 24 23 22 19 bhc phc ref ref rf a0 rf a- - 3t on gnd1 0.1 f 0.1 f 0.1 f ref ref 7_mode 7_mode bh ph eq-contr ol ph-contr ol + - - - - + - - + + - - + - - - - + - - + - - + + - - 56k ref + - - eqs bhh ghs ldon lds ldd vref ref i f 0.1 f 56k e 0.1 f 100k fin2 0.1 f 100k fin1 apc 1 f 0.1 f 1 f ref v cc ref ref 20 sgc tbal fbal tsh 0.1 f 82pf 7 21 v cc v cc 2 ts tss te te- - 5v + ref ref - - + ref - - + - - + 32 47 f 33k - - + ref 26 27 ph 3tfil. bh 36 35 v cc
ps no. 7131- 9 /9 LA9239T this catalog provides information as of january, 2002. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer? products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer? products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the ?elivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
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