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august 2006 rev 5 1/23 2 nand256-m NAND512-M, nand01g-m 256/512mb/1gb (x8/x16, 1.8/3v, 528 byte page) nand flash memories + 256/512mb (x 16/x32, 1.8v) lpsdram, mcp features multi-chip packages ? 1 die of 256 mb, 512 mb (x8/ x16) nand flash + 1 die of 256 mb (x16) sdr lpsdram ? 1 die of 256 mb, 512 mb (x8/ x16) nand flash + 2 dice of 256 mb (x16) sdr lpsdrams ? 1 die of 256 mb, 512 mb (x8/ x16) nand flash +1 die of 256 mb (x16) ddr lpsdram ? 1 die of 512 mb (x16) nand flash + 1 die of 256 mb or 512 mb (x16) ddr lpsdram supply voltages ?v ddf = 1.7v to 1.95v or 2.5v to 3.6v ?v ddd = v ddqd = 1.7v to 1.9v electronic signature ecopack ? packages temperature range ? -30 to 85c flash memory nand interface ? x8 or x16 bus width ? multiplexed address/ data page size ? x8 device: (512 + 16 spare) bytes ? x16 device: (256 + 8 spare) words block size ? x8 device: (16k + 512 spare) bytes ? x16 device: (8k + 256 spare) words page read/program ? random access: 15s (max) ? sequential access: 50ns (min) ? page program time: 200s (typ) copy back program mode ? fast page copy without external buffering fast block erase ? block erase time: 2ms (typ) status register data integrity ? 100,000 program/erase cycles ? 10 years data retention lpsdram interface: x16 or x 32 bus width deep power down mode 1.8v lvcmos interface quad internal banks controlled by ba0 and ba1 automatic and controlled precharge auto refresh and self refresh ? 8,192 refresh cycles/64ms ? programmable partial array self refresh ? auto temperature compensated self refresh wrap sequence: sequential/interleave burst termination by burst stop command and precharge command tfbga107 10.5 x 13 x 1.2mm tfbga149 10 x 13.5 x 1.2mm lfbga137 10.5 x 13 x 1.4mm tfbga137 10.5 x 13 x 1.2 mm (1) fbga (1) preliminary specifications. www.st.com
nand256-m, NAND512-M, nand01g-m 2/23 table 1. product list reference part number nand product lpsdram product package nand256-m nand256r3m0 256 mbit (x8), 1.8v 256 mb it sdr, (x16), 1.8v, 104mhz tfbga107 nand256r4m3 256mbit (x16) 1.8v 256 mbit ddr (x16) 1.8v, 133mhz tfbga149 nand256w3m4 256mbit (x16) 3v 256 mbit sdr (x16), 1.8v, 104mhz tfbga149 NAND512-M nand512r3m0 512 mbit (x8), 1.8v 256 mbit sdr (x16), 1.8v, 104mhz tfbga107 nand512r4m3 256 mbit ddr (x16) 1.8v, 133mhz tfbga149 nand512r4m5 512 mbit ddr (x16) 1.8v, 133mhz tfbga149 nand512w3m2 512mbit (x8) 3v 512mbit sdr (2x16) (2x256mbit sdr x16) 1.8v,104mhz lfbga 137 nand01g-m nand01gw3m2 2 x 512mbit nand (x8) 3v 512 mbit sdr (2x16) (2 x 256mbit sdr x16) 1.8v, 104mhz lfbga137 1 gbit nand (x8) 3v 512mbit s dr (x32) 1.8v, 133mhz tfbga137
nand256-m, NAND512-M, nand01g-m contents 3/23 contents 1 summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 nand flash component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 lpsdram component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
list of tables nand256- m, NAND512-M, nand01g-m 4/23 list of tables table 1. product list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 table 2. signal names: nand flash & 1 x sdr lpsdram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. signal names: nand flash & 2 x sdr lpsdrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 4. signal names - nand flash & ddr lpsdram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 5. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 6. tfbga107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, mechanical data. . . . . . 17 table 7. tfbga149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, mechanical data. . . . . . 18 table 8. lfbga137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- mechanical data. . . . . . . 19 table 9. tfbga137 10.5x13mm - 10x13 active ball array, 0.80mm pitch . . . . . . . . . . . . . . . . . . . . 20 table 10. ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 11. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
nand256-m, NAND512-M, nand 01g-m list of figures 5/23 list of figures figure 1. logic diagram: nand flash & 1 x sdr lpsdram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 2. logic diagram: nand flash & 2 x sdr lpsdrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 3. logic diagram: nand flash & ddr lpsdram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 4. tfbga107 connections (top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. tfbga149 connections (top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 6. lfbga137 and tfbga137 connections (top view through package) . . . . . . . . . . . . . . . 15 figure 7. tfbga107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, bottom outline . . . . . . . 17 figure 8. tfbga149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, bottom outline . . . . . . . 18 figure 9. lfbga137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- bottom outline . . . . . . . . 19 figure 10. tfbga137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- bottom outline . . . . . . . . 20
summary description nand2 56-m, NAND512-M, nand01g-m 6/23 1 summary description the nand256-m, NAND512-M and nand01g-m are multi-chip packages which combine up to 512 mbit lpsdram with a 256 mbit, 512 mbit or 1 gbit nand flash memory. this combination of lpsdram and nand flash can result in up to 1 gbit of memory. the nand flash memory and lpsdram components have separate power supplies and grounds. they also have separate control, address and input/output signals, which allows simultaneous access to both devices at any moment. they are distinguished by two chip enable inputs: e f for the nand flash memory and e d for the lpsdram. see figure 1: logic diagram: nand flash & 1 x sdr lpsdram and table 2: signal names: nand flash & 1 x sdr lpsdram for an overview of the signals attached to each component. the nand256-m, NAND512-M and nand01g-m are available with a 1.8 or 3v voltage supply. see table 1: product list for a complete list of the products available. the devices are offered in the following multi-chip packages: tfbga107 (10.5 x 13 x 1.2mm) lfbga137 (10.5 x 13 x 1.4mm) tfbga149 (10 x 13.5 x 1.2mm) tfbga137 (10.5 x 13 x 1.2mm) in order to meet environmental requirements, st offers the nand256-m, NAND512-M and nand01g-m devices in ecopack ? package. ecopack packages are lead-free. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. the memories are supplied with all the nand flash memory bits erased (set to ?1?). this datasheet should be read in conjunction with the nand flash and lpsdram datasheets. nand flash component the nand256-m, NAND512-M and nand01g-m devices contain a 1.8v, 256 mbit or 512 mbit, x8 528 byte page or x16 264 word page, nand flash memory with the chip enable don?t care option. for detailed information on how to use the devices, see the nandxxx-a and nand01gwxa2b-kgd datasheets.
nand256-m, NAND512-M, nand01 g-m summary description 7/23 lpsdram component the nand256-m and NAND512-M devices contain either: one m65ka256al: 256mbit (x16) single data rate (sdr) lpsdram two m65ka256al: 256mbit (x16) single data rate (sdr) lpsdrams (sdr 0 and sdr 1 ) one m65kg256af: 256mbit (x16) do uble data rate (ddr) lpsdram one m65kg512ab: 512mbit (x16) double data rate (ddr) lpsdram one m65kc512ab: 512mbit (x32) single data rate (sdr) lpsdram refer to table 1: product list , for a description of the memories contained in the nand256- m, nand256-m and nand01g-m devices. for detailed information on how to use the sdr lpsdram devices, refer to the m65ka256al and m65kc512ab datasheets which are available from your local stmicroelectronics distributor. for detailed information on how to use the ddr lpsdram device, refer to the m65kg256ab datasheet which is available from your local stmicroelectronics distributor. figure 1. logic diagram: nand flash & 1 x sdr lpsdram ai11024b 13 a0-a12 dq0-dq15 16 k ke w d v ddqd e d cas dqm0 dqm1 v ddf w f v ddd nand256-m NAND512-M nand01g-m e f v ssd wp al cl rb r ras 2 ba0-ba1 8/16 i/o8-i/o15, x16 i/o0-i/o7, x8/x16 v ssqd v ssf
summary description nand2 56-m, NAND512-M, nand01g-m 8/23 table 2. signal names: nand flash & 1 x sdr lpsdram nand flash i/o0-i/o7 data inputs/ou tputs for x8 devices i/o8-i/o15 data inputs/outputs for x16 devices al address latch enable cl command latch enable e f chip enable r read enable rb ready/busy (open-drain output) w f write enable wp write protect v ddf supply voltage v ssf ground sdr lpsdram a0-a12 row address: ra0-ra11 column address: ca0-ca8 auto-precharge flag: a10 ba0-ba1 bank address dq0-dq15 data inputs/outputs k clock input ke clock enable input e d chip select inputs w d write enable input ras row address strobe input cas column address strobe input dqm0 upper dq ma sk enable output dqm1 lower dq mask enable output v ddd supply voltage v ddqd input/output supply voltage v ssd ground v ssqd input/output ground nc not connected internally
nand256-m, NAND512-M, nand01 g-m summary description 9/23 figure 2. logic diagram: nand flash & 2 x sdr lpsdrams ai11022b 13 a0-a12 dq0-dq15 x16 sdr0 v ss k ke w d v ddqd e 0d cas v ddf w f v ddd e f wp al cl rb r ras 2 ba0-ba1 i/o8-i/o15, x16 i/o0-i/o7, x8/x16 dq16-dq31 x16 sdr1 nand256-m NAND512-M nand01g-m dqm0-dqm3 e 1d
summary description nand2 56-m, NAND512-M, nand01g-m 10/23 table 3. signal names: nand flash & 2 x sdr lpsdrams nand flash i/o0-i/o7 data inputs/outputs al address latch enable cl command latch enable e f chip enable r read enable rb ready/busy (open-drain output) w f write enable wp write protect v ddf supply voltage v ssf ground sdr lpsdram a0-a12 row address: ra0-ra11 column address: ca0-ca8 auto-precharge flag: a10 ba0-ba1 bank address dq0-dq15 data inputs/outputs for x16 devices sdr 0 dq16-dq31 data inputs/outputs for x16 devices sdr 1 kclock input ke clock enable input e 0d chip select input for sdr 0 e 1d chip select input for sdr 1 w d write enable input ras row address strobe input cas column address strobe input dqm0 lower dq mask enable output for sdr 0 dqm1 upper dq mask enable output for sdr 0 dqm2 lower dq mask enable output for sdr 1 dqm3 upper dq mask enable output for sdr 1 v ddd supply voltage v ddqd input/output supply voltage v ssd ground v ssqd input/output ground nc not connected internally
nand256-m, NAND512-M, nand01 g-m summary description 11/23 figure 3. logic diagram: nand flash & ddr lpsdram ai11023b 13 a0-a12 dq0-dq15 k ke w d v ddqd e d cas dqm1 dqm0 v ddf w f i/o0-i/o15 v ddd nand256-m NAND512-M nand01g-m e f v ssd wp al cl rb r ras 2 ba0-ba1 k udqs-ldqs 16 v ssqd v ssf
summary description nand2 56-m, NAND512-M, nand01g-m 12/23 table 4. signal names - nand flash & ddr lpsdram nand flash i/o0-i/o15 data inputs/outputs al address latch enable cl command latch enable e f chip enable r read enable rb ready/busy (open-drain output) w f write enable wp write protect v ddf supply voltage v ssf ground ddr lpsdram a0-a12 address inputs a10 determines the precharge mode. ba0-ba1 bank select inputs dq0-dq15 data inputs/outputs udqs-ldqs data strobe inputs/outputs k clock input k clock input ke clock enable input e d chip select inputs w d write enable input ras row address strobe input cas column address strobe input dqm0 dq mask enable input (controls dq0-dq7) dqm1 dq mask enable input (controls dq8-dq15) v ddd supply voltage v ddqd input/output supply voltage v ssd ground v ssqd input/output ground nc not connected internally du do not use
nand256-m, NAND512-M, nand01 g-m summary description 13/23 figure 4. tfbga107 connections (top view through package) ai10143b v ddd a8 dqm1 v ssd ke a12 dqm0 h a9 d r c dq4 a1 b a3 a 8 7 6 5 4 3 2 1 v ssd v ddqd g f e v ddqd du wp a0 ba0 dq6 v ssqd cas a11 nc w f ba1 a10 du v ddd v ssd 9 nc a2 e d m l k j du dq15 nc dq11 i/o6 v ddqd v ssqd nc dq9 i/o5 dq13 v ddd v ssf v ddf a7 i/o4 i/o7 a5 du du v ssqd a4 du p n 10 nc rb dq2 nc nc e f i/o3 v ddf i/o2 nc cl al dq0 v ssf i/o1 v ssf i/o0 k dq1 dq3 dq5 dq7 v ddd dq10 dq12 dq14 v ssd dq8 du du du du a6 w d nc ras v ddf nc nc nc nc nc i/o9 i/o11 i/o13 i/o15 i/o8 i/o10 i/o12 i/o14 du
summary description nand2 56-m, NAND512-M, nand01g-m 14/23 figure 5. tfbga149 connections (top view through package) 1. balls shaded in gray are only present for nand + ddr devices delivered in the tfbga149 package. ai11007b dqm1 ke a11 dqm0 h a9 d r c dq4 a1 b a3 a 8 7 6 5 4 3 2 1 g f e du wp a0 ba0 dq6 cas w f ba1 du v ddd 9 nc a7 e d m l k j du dq15 nc dq13 v ssf i/o0 i/o7 du du v ssqd du p n 12 nc rb dq2 nc nc e f i/o2 nc cl al dq0 v ssd i/o1 k dq1 dq3 dq5 dq7 v ddd dq10 v ssd dq8 du du du du wd nc ras v ddf nc nc nc a10 du a8 du nc du nc v ddqd nc du du du du du du du du du du du du du du 10 11 t r nc du v ssd v ddd du nc i/o6 i/o5 a6 a12 nc nc a2 a5 i/o4 nc nc a4 nc v ddf v ssf nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc i/o3 nc dq11 dq14 dq12 dq9 v ddqd v ssd k udqs i/o9 i/o8 i/o15 i/o14 i/o13 i/o10 i/o12 i/o11 ldqs
nand256-m, NAND512-M, nand01 g-m summary description 15/23 figure 6. lfbga137 and tfbga137 connections (top view through package) ai13146 v ddqd nc dq20 nc v ssqd k dq9 dq15 h nc d r c a7 dq30 b nc v ddd a 8 7 6 5 4 3 2 1 a4 v ssd v ddd a5 g f e a11 du wp dq31 dq29 ke a6 a8 dq26 dqm3 dqm2 dq23 v ssqd v ssd w f dq28 v ssqd du cas nc ras 9 nc v ddqd v ddqd a12 v ddd m l k j v ssd i/o2 v ddqd v ddd i/o4 nc ba0 a3 dq4 v ssd dqm0 ba1 w d a1 a2 i/o1 a10 dq6 dq3 nc v ddd v ssd i/o7 nc nc nc v ssqd nc dq5 v ddqd du nc nc e d v ssqd i/o0 du r p n 10 dq12 dqm1 rb dq27 dq22 dq24 e f v ssf dq8 dq2 i/o5 i/o6 dq10 dq13 nc v ssf dq25 nc dq19 v ddf nc dq7 dq1 i/o3 v ddf dq11 dq21 dq16 al a9 dq18 dq17 cl nc a0 dq0 nc nc dq14 v ssqd v ddqd v ddd nc v ddqd du v ssqd v ssqd v ssqd v ddqd v ssqd v ssqd v ddqd v ddqd nc du du
maximum rating nand256-m, NAND512-M, nand01g-m 16/23 2 maximum rating stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 5. absolute maximum ratings symbol parameter value unit min max t a ambient operating temperature -30 85 c t bias temperature under bias tbd (1) 1. tbd stands for to be defined. tbd (1) c t stg storage temperature -55 125 c v io (2) 2. minimum voltage may undershoot to -2v for less t han 20ns during transitions on input and i/o pins. maximum voltage may overshoot to v dd + 2v for less than 20ns duri ng transitions on i/o pins. nand flash input or output voltage 1.8v device -0.6 2.7 v 3v device -0.6 4.6 v lpsdram input or output voltage 1.8v device -0.5 2.6 v v ddf nand flash supply voltage 1.8v device -0.6 2.7 v 3v device -0.6 4.6 v v ddd , v ddqd lpsdram supply voltage 1.8v device -0.5 2.6 v lpsdram short circuit output current i os 50 ma lpsdram power dissipation pd 1.0 w
nand256-m, NAND512-M, nand 01g-m package mechanical 17/23 3 package mechanical figure 7. tfbga107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, bottom outline 1. drawing not to scale. a2 a1 a bga-z24 ddd d e e b se fd fe e1 e sd d1 ball "b1" table 6. tfbga107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, mechanical data symbol millimeters inches typ min max typ min max a 1.20 0.047 a1 0.25 0.010 a2 0.80 0.031 b 0.45 0.40 0.50 0.018 0.016 0.020 d 10.50 10.40 10.60 0.413 0.409 0.417 d1 7.20 0.283 ddd 0.10 0.004 e 13.00 12.90 13.10 0.512 0.508 0.516 e1 10.40 0.409 e0.80? ?0.031? ? fd 1.65 0.065 fe 1.30 0.051 sd 0.40 0.016 se 0.40 0.016
package mechanical nand256- m, NAND512-M, nand01g-m 18/23 figure 8. tfbga149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, bottom outline a2 a1 a bga-z78 ddd d e e b se fd fe e1 e sd d1 ball "a1" table 7. tfbga149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, mechanical data symbol millimeters inches typ min max typ min max a 1.200 0.0472 a1 0.250 0.0098 a2 0.800 0.0315 b 0.450 0.400 0.500 0.0177 0.0157 0.0197 d 10.000 9.900 10.100 0.3937 0.3898 0.3976 d1 8.800 0.3465 ddd 0.100 0.0039 e 13.500 13.400 13.600 0.5315 0.5276 0.5354 e1 12.000 0.4724 e 0.800 ? ? 0.0315 ? ? fd 0.600 0.0236 fe 0.750 0.0295 sd 0.400 ? ? 0.0157 ? ? se 0.400 ? ? 0.0157 ? ?
nand256-m, NAND512-M, nand 01g-m package mechanical 19/23 figure 9. lfbga137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- bottom outline 1. subject to change without prior notice. e d e b sd a1 a2 a bga-z83 ddd fd d1 e1 e fe ball "b1" table 8. lfbga137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- mechanical data (1) symbol millimeters inches typ min max typ min max a 1.40 0.055 a1 0.25 0.010 a2 1.00 0.039 b 0.45 0.40 0.50 0.018 0.016 0.020 d 10.50 10.40 10.60 0.413 0.409 0.417 d1 7.20 0.283 ddd 0.10 0.004 e 13.00 12.90 13.10 0.512 0.508 0.516 e1 11.20 0.441 e 0.80 ? ? 0.031 ? ? fd 1.65 0.065 fe 0.90 0.035 sd 0.40 0.016 1. subject to change without prior notice.
package mechanical nand256- m, NAND512-M, nand01g-m 20/23 figure 10. tfbga137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- bottom outline 1. subject to change without prior notice. e d e b sd a1 a2 a bga-z83 ddd fd d1 e1 e fe ball "b1" table 9. tfbga137 10.5x13mm - 10x13 active ball array, 0.80mm pitch symbol millimeters inches typ min max typ min max a 1.20 0.047 a1 0.25 0.010 a2 0.80 0.031 b 0.45 0.40 0.50 0.018 0.016 0.020 d 10.50 10.40 10.60 0.413 0.409 0.417 d1 7.20 0.283 e 13.00 12.90 13.10 0.512 0.508 0.516 e1 11.20 0.441 e 0.80 ? ? 0.031 ? ? fd 1.65 0.065 fe 0.90 0.035 sd 0.40 ? ? 0.016 ? ?
nand256-m, NAND512-M, nand01g-m part numbering 21/23 4 part numbering devices are shipped from the factory with the flash memory content bits, in valid blocks, erased to ?1?. for further information on any aspect of this device, please contact your nearest st sales office. table 10. ordering information scheme example: nand256 r 3 m 4 a zb 5 e device type nand flash memory nand flash density 256 = 256mb 512 = 512mb 01g = 1gb operating voltage r = v ddf = 1.7v to 1.95v w = v ddf = 2.5v to 3.6v nand bus width 3 = x8 4 = x16 family identifier m = 528 byte page nand flash + lpsdram device options 0 = 256, x16, 104mhz, sdr, bga107 2 = 2 x 256, 2x16, 104mhz, sdr, bga137 or 512, x32, 133mhz, sdr, bga137 3 = 256, x16, 133mhz, ddr bga149 4 = 256, x16, 104mhz, sdr, bga149 5 = 512, x16, 133mhz, ddr, bga149 product version a b c package zb = tfbga zc = lfbga temperature range 5 = -30c to 85c option e = ecopack package, standard packing f = ecopack package, tape & reel packing
revision history nand256- m, NAND512-M, nand01g-m 22/23 5 revision history table 11. document revision history date version revision details 06-feb-2006 1.0 first issue. 09-feb-2006 2.0 reference m65kg256ad changed to m65kg256ab. 07-apr-2006 3 part numbers nand512r4m3 and nand512r4m5 added, corresponding to 1 die of 512 mb (x16) nand flash + 1 die of 256 mb or 512 mb (x16) ddr lpsdram. 23-may-2006 4 temperature range -25 to 85c removed for 512 mbit lpsdrams. nand512w3m2 part number added in table 1: product list . figure 5: tfbga149 connections (top view through package) updated. lpsdram supply voltage changed to 1.7 to 1.9v. 24-aug-2006 5 1 gbit (x8) 3v nand flash memory and 512mbit sdr (x32) 1.8v, 133mhz lpsdram added for nand01gw3m2. tfbga137 package added.
nand256-m, NAND512-M, nand01g-m 23/23 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2006 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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