ess technology, inc. sam0575-021805 1 ess technology, inc. ES6218A vibratto-s automoti ve dvd processor product brief description the ES6218A vibratto ? s dvd processor is a super high- performance single-chip mpeg video decoding solution that is ideal for automotive dvd applications. the chip integrates cprm and s/pdif input and output support. the ES6218A performs audio/video stream data processing, tv encoding, macrovision ? copy protection, dvd system navigation, system control, and housekeeping functions. the vibratto-s dvd processor is built on the ess proprietary dual cpu programmable multimedia processor (pmp) core consisting of 32-bit risc and 64-bit dsp processors and offers the best dvd feature set. the processing units enable simultaneous parallel execution of system commands and data processing to perform specialized encoding and decoding tasks. the risc processor performs bit stream parsing, control audio data output, transfer video and audio data to the vector engine and service system control and housekeeping functions. the vector engine performs audio and video micro-code processing required by a/v standards, such as dolby ? digital, dts ? surround, mpeg and jpeg imaging. these processing tasks include video motion compensation and estimation, loop filtering, discrete cosine transforms (dct), inverse dct, quantization, and inverse quantization. the vibratto-s dvd processor supports both parallel and serial dvd loader interfaces, industry standard i 2 s audio data input and output, eprom and dram access, and audio/video data buffering. it also supports both letterbox and pan-and-scan displays, sub-picture overlay, and on- screen display (osd). the vibratto-s dvd solution also offers support for karaoke cd+g, hdcd, cd-da, dvd-audio, mp3, and wma. the ES6218A dvd processor is available in a 208-pin low-profile quad flat pack (lqfp) package with lead- free leads. the silicon is qualified for an extended temperature range of ?40 to 85 c for automotive applications. features ? single-chip dvd processor. integrated ntsc/pal encoder with pixel-adaptive de-interlacer and three 10-bit 54 mhz video dacs. dvd-video, dvd-vr, vcd 1.1 and 2.0. media playback with cd-rom, cd-r/rw, dvd-r/rw, dvd+r/rw, and dvd-ram. full dvd-audio support including mlp and linear pcm decoding, cppm and watermark detection. up to 7.1 channel audio outputs. interface for ide devices, a/v dvd loaders and flash. interface for cf, ms, mmc, sd, and sm memory cards. direct interface of 8-/16-bit dram up to 128-mb capacity. direct interface for up to 4 banks of 8-/16-bit eprom or flash eprom for up to 4-mb for each bank. macrovision 7.1 for ntsc/pal interlaced video. composite, s-video and rgb or yuv outputs. ccir 656/601 yuv 4:2:2 input and output. on-screen display controller supports 256 colors in 8 degrees of transparency. subpicture unit (spu) decoder supports karaoke lyric, subtitles, and eia-608 compliant line 21 captioning. jpeg digital photo cd support (kodak picture cd ? and fujifilm fujicolor cd ?). ess music slideshow?. dolby digital (ac-3), dolby pro logic?, and pro logic ii. dts surround. s/pdif digital audio input and output. mpeg aac and multichannel. srs trusurround ? and trusurround xt ? . windows? media audio (wma). extended temperature range ?40 to 85 c ambient for automotive applications. slave mode for control by host processor. lead-free leads using 98%-sn/2%-cu or 98%-sn/2%-bi.
2 sam0575-021805 ess technology, inc. ES6218A product brief ES6218A pinout diagram ES6218A pinout diagram the device pinout for the ES6218A is shown in figure 1. figure 1 ES6218A device pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 lcs1# loe# ld0 vss lcs3# lcs2# i2cdata/aux0 la21 la20 reset# vee tsd3 hiocs16#/camclk/aux3[4]/pixin_clk ha1/aux4[3] vss ha0/aux4[2] hwr#/dci_clk/aux4[5] hrd#/dci_ack#/aux4[6] hd4/dci4/aux1[4] hd5/dci5/aux1[5] hd6/dci6/aux1[6]/vfd_dout hd2/dci2/aux1[2] hd3/dci3/aux1[3] vee vcc db8 vcc db5 db9 dcs0# vcc vss tsd0/sel_pll0 tsd1/sel_pll1 tdmfs tdmclk tdmdr tdmtsc# tws/sel_pll2 vee la4 la5 la6 la7 la8 la9 vss vcc la10 la11 la12 la13 la14 la15 la16 vss vee la17 la18 la19 tdmdx/rsel vss tsd2 sel_pll3/spdif_out spdif_in vss mclk tbck vee vee avss vss dqm rsd rws rbck pixin3/camin3 xin xout avee dsck vss db15 db13 db11 db1 vss dmbs1 dras# doe#/dsck_en vee dma9 dma7 vss dma5 dma3 vee dcs1# db14 db12 db10 db0 vee dmbs0 dwe# dcas# vss dma8 dma6 vee dma4 dma2 vss db7 db6 vss db4 db3 db2 dma11 dma10 dma1 dma0 hcs3fx#/aux3[6] hcs1fx#/aux3[7] vss hiordy/aux3[3] vss hd13/aux2[5]/sp hd12/aux2[4]/c2po hd11/aux2[3]//irq hd10/aux2[2] hd9/aux2[1] hd8/dci_fds#/aux2[0]/vfd_clk vss hirq/dci_err#/aux4[7] hrst#/aux3[5] hrrq#/aux4[0]/camin2/pixin2 hwrq#/dci_req#/aux4[1] hd15/aux2[7]/ir hd14/aux2[6] vcc hd7/dci7/aux1[7]/vfd_din hd1/dci1/aux1[1] hd0/dci0/aux1[0] vcc vss hsync#/camin7/aux3[0]/pixin7 pclk2xscn/camin4/pixin4 yuv7/pixout7 yuv6/pixout6 pclkqscn/camin5/aux3[2]/pixin5 vsync#/camin6/aux3[1]/pixin6 yuv5/ydac/pixout5 advss advee yuv4/rset/pixout4 yuv3/comp/pixout3 yuv2/cdac/pixout2 yuv1/vref/pixout1 yuv0/udac/pixout0 dclk vee aux7 aux6 vee ld1 ld2 la3 ld12 vee ha2 /aux4[4] vee vee ld3 ld5 ld9 ld13 lwrhl# pixin1/camin1 i2c_clk/aux1 aux3/ior# ld4 ld6 ld10 ld14 vss la0 aux2/iow# aux4 vee ld7 ld11 ld15 vee la1 vss aux5 vss ld8 vss lwrll# pixin0/camin0 la2 vss vcc pixout_clk/lcs0# vss ES6218A
ess technology, inc. sam0575-021805 3 ES6218A product brief ES6218A pin description ES6218A pin description table 1 lists the pin descriptions for the ES6218A. table 1 ES6218A pin description name pin numbers i/o definition vee 1,18, 27, 59, 68, 75, 92, 99, 104, 130, 148, 157, 159, 164, 183, 193, 201 p i/o power supply. la[21:0] 2-7, 10-16, 19-23, 204-207 o risc port address bus. vss 8, 17, 26, 34, 43, 60, 67, 76, 84, 91, 98, 103, 120, 129, 138, 147, 156, 163, 171, 177, 184, 192, 200, 208 g ground. vcc 9, 35, 44, 83, 121, 139, 172 p core power supply. reset# 24 i reset input. tdmdx 25 o tdm transmit data output. rsel i lcs3 rom boot data width select. strapped to vcc or ground via 4.7-k ? resistor; read only during reset. tdmdr 28 i tdm receive data input. tdmclk 29 i tdm clock input. tdmfs 30 i tdm frame sync input. tdmtsc# 31 o tdm output enable. tws 32 o audio transmit frame sync output. sel_pll2 i system and dsck output clock frequency selection is made at the rising edge of reset#. the matrix below lists the available clock frequencies and their respective pll bit settings. strapped to vcc or ground via 4.7-k ? resistor; read only during reset. rsel selection 016-bit rom 18-bit rom sel_pll2 sel_pll1 sel_pll0 pll settings 0 0 0 dclk 4 .5 0 0 1 dclk 5.0 010 bypass 0 1 1 dclk 4.0 1 0 0 dclk 4.25 1 0 1 dclk 4.75 1 1 0 dclk 5.5 1 1 1 dclk 6.0
4 sam0575-021805 ess technology, inc. ES6218A product brief ES6218A pin description tsd0 33 o audio transmit serial data output 0. sel_pll0 i refer to the description and matrix for sel_pll2 pin 32. tsd1 36 o audio transmit serial data output 1. sel_pll1 i refer to the description and matrix for sel_pll2 pin 32. tsd2 37 o audio transmit serial data output 2. this pin must be pulled down to vss via a 4.7-k ? resistor for proper operation. tsd3 38 o audio transmit serial data output 3. mclk 39 i/o audio master clock for audio dac. tbck 40 i/o audio transmit bit clock. tbck is an input during reset and subsequently is programmed as an output via the audioxmt register (addr 0x2000d00ch, bit 4). spdif_out 41 o s/pdif output. sel_pll3 i clock source select. strapped to vcc or ground via 4.7-k ? resistor; read only during reset. spdif_in 42 i s/pdif input. rsd 45 i audio receive serial data. rws 46 i audio receive frame sync. rbck 47 i audio receive bit clock. camin3 48 i camera yuv 3. pixin3 i ccir656 input pixel 3. xin 49 i 27-mhz crystal input. xout 50 o 27-mhz crystal output. avee 51 p analog power for pll. avss 52 g analog ground for pll. dma[11:0] 53-58, 61-66 o dram address bus. dcas# 69 o dram column address strobe. doe# 70 o dram output enable. dsck_en o dram clock enable. dwe# 71 o dram write enable. dras# 72 o dram row address strobe. dmbs0 73 o dram bank select 0. dmbs1 74 o dram bank select 1. db[15:0] 77-82, 85-90, 93-96 i/o dram data bus. dcs[1:0]# 97,100 o dram chip select. dqm 101 o data input/output mask. dsck 102 o output clock to dram. table 1 ES6218A pin description (continued) name pin numbers i/o definition sel_pll3 clock source 0 crystal oscillator 1 dclk input
ess technology, inc. sam0575-021805 5 ES6218A product brief ES6218A pin description dclk 105 i clock input to pll. udac 106 o video dac output. y: luma component for yuv and y/c processing. c: chrominance signal for y/c processing. u: chrominance component signal for yuv mode. yuv0 o yuv pixel 0 output data. pixout0 o ccir656 output pixel 0. yuv1 107 o yuv pixel 1 output data. vref i internal voltage reference to video dac. bypass to ground with 0.1- f capacitor. pixout1 o ccir656 output pixel 1. yuv2 108 o yuv pixel 2 output data. cdac o video dac output. refer to description and matrix for udac pin 106. pixout2 o ccir656 output pixel 2. yuv3 109 o yuv pixel 3 output data. comp i compensation input. bypass to advee with 0.1- f capacitor. pixout3 o ccir656 output pixel 3. yuv4 110 o yuv pixel 4 output data. rset i dac current adjustment resistor input. pixout4 o ccir656 output pixel 4. table 1 ES6218A pin description (continued) name pin numbers i/o definition value y dac (pin 113) c dac (pin 108) u dac (pin 106) 0y cn/a 1 y c cvbs2 2y cn/a 3 n/a n/a cvbs2 4 n/a n/a n/a 5 y pb pr 6 y pb pr 7g b r 8 y pb pr 9g b r 10 g r b 11 g r b 12 y pr pb 13 y pr pb 14 g r b
6 sam0575-021805 ess technology, inc. ES6218A product brief ES6218A pin description advee 111 p analog power for video dac. advss 112 g analog ground for video dac. yuv5 113 o yuv pixel 5 output data. ydac o video dac output. refer to description and matrix for udac, pin 106. pixout5 o ccir656 output pixel 5. yuv6 114 o yuv pixel 6 output data. pixout6 o ccir656 output pixel 6. yuv7 115 o yuv pixel 7 output data. pixout7 o ccir656 output pixel 7. pclk2xscn 116 i/o 27-mhz video output pixel clock. camin4 i camera yuv 4. pixin4 i ccir656 input pixel 4. pclkqscn 117 o 13.5-mhz video output pixel clock. camin5 i camera yuv 5. pixin5 i ccir656 input pixel 5. aux3[2] i/o aux3 data i/o. vsync# 118 i/o vertical sync. camin6 i camera yuv 6. pixin6 i ccir656 input pixel 6. aux3[1] i/o aux3 data i/o. hsync# 119 i/o horizontal sync. camin7 i camera yuv 7. pixin7 i ccir656 input pixel 7. aux3[0] i/o aux3 data i/o. hd[5:0] 122-127 i/o host data bus lines 5:0. dci[5:0] i/o dvd channel data i/o. aux1[5:0] i/o aux1 data i/o. hd6 128 i/o host data bus line 6. dci6 i/o dvd channel data i/o. aux1[6] i/o aux1 data i/o. vfd_dout i vfd data output. hd7 131 i/o host data bus line 7. dci7 i/o dvd channel data i/o. aux1[7] i/o aux1 data i/o. vfd_din i vfd data input. table 1 ES6218A pin description (continued) name pin numbers i/o definition
ess technology, inc. sam0575-021805 7 ES6218A product brief ES6218A pin description hd8 132 i/o host data bus line 8. dci_fds# i/o dvd input sector start. aux2[0] i/o aux2 data i/o. vfd_clk i vfd clock input. hd9 133 i/o host data bus line 9. aux2[1] i/o aux2 data i/o. hd10 134 i/o host data bus line 10. aux2[2] i/o aux2 data i/o. hd11 135 i/o host data bus line 11. aux2[3] i/o aux2 data i/o. irq o irq. hd12 136 i/o host data bus line 12. aux2[4] i/o aux2 data i/o. c2po i c2po error correction flag from cd-rom. hd13 137 i/o host data bus line 13. aux2[5] i/o aux2 data i/o. sp i 16550 uart serial port input. hd14 140 i/o host data bus line 14. aux2[6] i/o aux2 data i/o. hd15 141 i/o host data bus line 15. aux2[7] i/o aux2 data i/o. ir i ir remote control input. hwrq# 142 o host write request. dci_req# o dvd control interface request. aux4[1] i/o aux4 data i/o. hrrq# 143 o host read request. aux4[0] i/o aux4 data i/o. camin2 i camera yuv 2. pixin2 i ccir656 input pixel 2. hirq 144 i/o host interrupt request. dci_err# i/o dvd channel data error. aux4[7] i/o aux4 data i/o. hrst# 145 ohost reset. aux3[5] i/o aux3 data i/o. hiordy 146 i host i/o ready. aux3[3] i/o aux3 data i/o. table 1 ES6218A pin description (continued) name pin numbers i/o definition
8 sam0575-021805 ess technology, inc. ES6218A product brief ES6218A pin description hwr# 149 i/o host write. dci_clk i/o dvd channel data clock. aux4[5] i/o aux4 data i/o. hrd# 150 ohost read. dci_ack# o dvd channel data valid. aux4[6] i/o aux4 data i/o. hiocs16# 151 i device 16-bit data transfer. camclk i camera port pixel clock input. pixin_clk i ccir656 input pixel clock. aux3[4] i/o aux3 data i/o. hcs1fx# 152 ohost select 1. aux3[7] i/o aux3 data i/o. hcs3fx# 153 ohost select 3. aux3[6] i/o aux3 data i/o. ha[2:0] 154, 155, 158 i/o host address bus. aux4[4:2] i/o aux4 data i/os. aux0 160 i/o auxiliary port 0 (open collector). i2cdata i/o i 2 c data i/o. aux1 161 i/o auxiliary port 1 (open collector). i2c_clk i/o i 2 c clock i/o. aux2 162 i/o auxiliary port 2. iow# o i/o write strobe (lcs1). aux3 165 i/o auxiliary port 3. ior# o i/o read strobe (lcs1). aux4-7 166-169 i/o auxiliary ports 4-7. loe# 170 o risc port output enable. lcs0# 173 o risc port chip select 0. pixout_clk o ccir656 output pixel clock. lcs[3:1]# 174-176 o risc port chip select [3:1]. ld[15:0] 178-182, 185-191, 194-197 i/o risc port data bus. lwrll# 198 o risc port low-byte write enable. lwrhl# 199 o risc port high-byte write enable. camin0 202 i camera yuv 0. pixin0 i ccir656 input pixel 0. camin1 203 i camera yuv 1. pixin1 i ccir656 input pixel 1. table 1 ES6218A pin description (continued) name pin numbers i/o definition
ess technology, inc. sam0575-021805 9 ES6218A product brief system block diagram system block diagram a sample system block diagram for the ES6218A vibratto-s dvd player board design is shown in figure 2. figure 2 ES6218A vibratto-s system block diagram functional description figure 3 shows the internal block diagram for the ES6218A vibratto-s dvd processor. figure 3 ES6218A vibratto-s block diagram ES6218A sdram (4/16 mb) dvd drive rom/flash vfd driver audio dac digital devices speakers vfd panel digital video (ccir656/601) eeprom a/v receiver vibratto-s ir remote audio adc microphone in s/pdif tv display analog video huffman decoder video processor 32-bit serial audio processor interface risc dram interface dci interface 16 k cache gateway + dma controller dvd ram rom host interface transport descrambler + tdm interface tv-encoder sram/rom interface gpio controller osd display subpicture ccir656/601 output interface ccir656/601 input interface
10 http://www.esstech.com ? 2005 ess technology, inc. sam0575-021805 ES6218A product brief ordering information no part of this publication may be reproduced, stored in a retrieval system, transmitted, or translated in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without the prior written permission of ess technology, inc. ess technology, inc. makes no representations or warranties regarding the content of this document. all specifications are subject to change without prior notice. ess technology, inc. assumes no responsibility for any errors contained herein. u.s. patents pending. mpeg is the moving picture experts group of the iso/iec. references to mpeg in this document refer to the iso/iec jtc1 sc29 committee draft iso 11172 dated january 9, 1992. vibratto, smartbright, smartlogo, smartcolor, and music slideshow are trademarks of ess technology, inc. dolby is a trademark of dolby laboratories, inc. trusurround, trusurround xt, srs, and (o) symbol are trademarks of srs labs., inc. all other trademarks are trademarks of their respective companies and are used for identification purposes only. ess technology, inc. 48401 fremont blvd. fremont, ca 94538 tel: (510) 492-1088 fax: (510) 492-1898 ordering information part number description package es6218saf vibratto-s dvd, progressive scan, dvd-audio, and tv encoder, with lead-free leads 208-pin lqfp the letters s and f at the end of the part number identify the package type lqfp and lead-free leads.
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