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dual, low power, single-supply difference amplifier ? 1998 burr-brown corporation pds-1488a printed in u.s.a. december, 1998 features l designed for low cost l low quiescent current: 160 m a per amplifier l wide power supply range: single supply: 2.7v to 36v dual supplies: 1.35v to 18v l low gain error: 0.05% max l low nonlinearity: 0.001% max l high cmrr: 90db l highly versatile circuit l easy to use l so-14 package ina2132 description the ina2132 is a dual low power, unity-gain differ- ence amplifier offering excellent value at very low cost. each channel consists of a precision op amp with a laser-trimmed precision resistor network, providing accurate gain and high common-mode rejection. ex- cellent tcr tracking of the resistors maintains gain accuracy and common-mode rejection over tempera- ture. the internal op amps common-mode range extends to the negative supplyideal for single-sup- ply applications. the difference amplifier is the foundation of many commonly used circuits. the ina2132 provides this circuit function without using an expensive precision resistor network. the ina2132 is available in the so-14 surface-mount package and is specified for operation over the extended industrial temperature range, C40 c to +85 c. a single version of this product with similar specifi- cations is also available. see the ina132 data sheet for details. applications l differential input amplifier l instrumentation amplifier building block l unity-gain inverting amplifier l g = 1/2 amplifier l g = 2 amplifier l summing amplifier l differential current receiver l volta ge-co ntrolled current source l battery-powered systems l ground loop eliminator international airport industrial park ? mailing address: po box 11400, tucson, az 85734 ? street address: 6730 s. tucson bl vd., tucson, az 85706 ? tel: (520) 746-1111 twx: 910-952-1111 ? internet: http://www.burr-brown.com/ ? cable: bbrcorp ? telex: 066-6491 ? fax: (520) 889-1510 ? i mmediate product info: (800) 548-6132 sense a ina2132 out a v+ ref a ?n a +in a 12 13 14 2 11 v 4 3 40k w 40k w 40k w 40k w 40k w 40k w 40k w 40k w b a sense b out b ref b ?n b +in b 10 9 8 6 5 ina2132 sbos108
2 ina2132 parameter conditions min typ max min typ max units offset voltage (1) rto initial v os 75 250 [ 500 m v vs temperature dv os /dt 1 5 [ 10 m v/ c vs power supply psrr v s = 1.35v to 18v 5 30 [[ m v/v vs time 0.3 [ m v/mo channel separation (2) dc 0.04 m v/v input impedance (3) differential 80 [ k w common-mode 40 [ k w input voltage range common-mode voltage range (4) v o = 0v 2 (vC) 2 (v+) C2 [[ v common-mode rejection ratio cmrr v cm = C30v to 28v, r s = 0 w 80 90 74 [ db output voltage noise (5) rto f = 0.1hz to 10hz 1.6 [ m vp-p f = 1khz 65 [ nv/ ? hz gain initial 1 [ v/v error v o = C14v to 13.5v 0.01 0.05 [ 0.1 % vs temperature 1 10 [[ ppm/ c nonlinearity v o = C14v to 13.5v 0.0001 0.001 [ 0.002 % of fs output voltage, positive r l = 100k w to ground (v+) C1 (v+) C0.8 [[ v negative r l = 100k w to ground (vC) +0.5 (vC) +0.15 [[ v positive r l = 10k w to ground (v+) C1.5 (v+) C0.8 [[ v negative r l = 10k w to ground (vC) +1 (vC) +0.25 [[ v current limit, per amplifier continuous to common 12 [ ma capacitive load (stable operation) 10 [ nf frequency response small-signal bandwidth C3db 300 [ khz slew rate sr 0.1 [ v/ m s settling time: 0.1% v o = 10v step 85 [ m s 0.01% v o = 10v step 88 [ m s overload recovery time 50% overdrive 7 [ m s power supply rated voltage v s 15 [ v voltage range 1.35 18 [[ v quiescent current (per amplifier) i q i o = 0ma 160 185 [[ m a temperature range specification C40 +85 [[ c operation C55 +125 [[ c storage C55 +125 [[ c thermal resistance q ja 100 [ c/w [ specifications the same as ina2132u. notes: (1) includes effects of amplifiers input bias and offset currents. (2) measured output offset change of one channel for a full-scale swing (v o = C14v to 13.5v) on the opposite channel. (3) 40k w resistors are ratio matched but have 20% absolute value. (4) 2 (vC) Cv ref < v cm < 2 ((v+) C1) Cv ref . for more detail, see applications information section. (5) includes effects of amplifiers input current noise and thermal noise contribution of resistor network. specifications: v s = 15v at t a = +25 c, r l = 10k w connected to ground, and reference pins connected to ground unless otherwise noted. the information provided herein is believed to be reliable; however, burr-brown assumes no responsibility for inaccuracies or o missions. burr-brown assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. pr ices and specifications are subject to change without notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any third party. burr-brown does not authorize or warrant any burr-brown product for use in life support devices and/or systems. ina2132u ina2132ua
3 ina2132 specifications: v s = +5v single supply at t a = +25 c, r l = 10k w connected to v s /2, and reference pin connected to v s /2, unless otherwise noted. ina2132u ina2132ua parameter conditions min typ max min typ max units offset voltage (1) rto initial v os 150 500 [ 750 m v vs temperature dv os /dt 2 [ m v/ c input voltage range common-mode voltage range (2) C2.5 +5.5 [[ v common-mode rejection cmrr v cm = C2.5v to +5.5v, r s = 0 w 80 90 74 [ db output voltage, positive r l = 100k w to ground (v+) C1 (v+) C0.75 [[ v negative r l = 100k w to ground +0.25 +0.06 [[ v positive r l = 10k w to ground (v+) C1 (v+) C0.8 [[ v negative r l = 10k w to ground +0.25 +0.12 [[ v power supply rated voltage v s +5 [ v voltage range +2.7 +36 [[ v quiescent current i q i o = 0ma 155 185 [[ m a [ specifications the same as ina2132u. note: (1) includes effects of amplifiers input bias and offset currents. (2) 2 (vC) Cv ref < v cm < 2 ((v+) C1) Cv ref . for more detail, see applications information section. pin configuration top view so-14 supply voltage, v+ to vC .................................................................... 36v input voltage range .......................................................................... 80v output short-circuit (to ground) .............................................. continuous operating temperature .................................................. C55 c to +125 c storage temperature ..................................................... C55 c to +125 c junction temperature .................................................................... +150 c lead temperature (soldering, 10s) ............................................... +300 c absolute maximum ratings electrostatic discharge sensitivity this integrated circuit can be damaged by esd. burr-brown recommends that all integrated circuits be handled with ap- propriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. nc ?n a +in a v +in b ?n b nc ref a out a sense a v+ sense b out b ref b nc = no connection 1 2 3 4 5 6 7 14 13 12 11 10 9 8 a b package specified drawing temperature package ordering transport product package number (1) range marking number (2) media ina2132u so-14 surface-mount 235 C40 c to +85 c ina2132u ina2132u rails " " " " " ina2132u/2k5 tape and reel ina2132ua so-14 surface-mount 235 C40 c to +85 c ina2132ua ina2132ua rails " " " " " ina2132ua/2k5 tape and reel notes: (1) for detailed drawing and dimension table, please see end of data sheet, or appendix c of burr-brown ic data book. (2 ) models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2k5 indicates 2500 devices per reel). ordering 2500 pieces of ina2132u/2k5 will get a single 2500-piece tape and reel. for detailed tape and reel mechanical information, refer to appendix b of burr-brown ic data book. package/ordering information
4 ina2132 typical performance curves at t a = +25 c and v s = 15v, unless otherwise noted. gain vs frequency frequency (hz) closed-loop gain (db) 10k 100k 1m 20 0 ?0 ?0 ?0 v s = 15v or +5v c l = 100pf r l = 10k w c l = 1000pf r l = common-mode rejection vs frequency frequency (hz) common-mode rejection (db) 10 100 1k 10k 100k 1m 100 90 80 70 60 50 40 30 v s = 15v v s = +5v channel separation vs frequency frequency (hz) channel separation (db) 0.1 1 10 1k 100 1m 100k 10k 150 140 130 120 110 100 90 80 70 60 50 output voltage swing vs output current v+ (v+) ?.5 (v+) ? (v+) ?.5 (v+) ? (v+) ?.5 (v? +2.5 (v? +2 (v? +1.5 (v? +1 (v? +0.5 v? 0 2 4 6 8 10 output current (ma) output voltage swing (v) 125 c 125 c 85 c ?5 c 85 c 85 c 25 c ?0 c ?0 c 25 c ?5 c quiescent and short-circuit current vs temperature temperature ( c) quiescent current ( a) short-circuit current |ma| ?5 ?0 ?5 0 25 50 75 100 125 210 200 190 180 170 160 150 13 12 11 10 9 8 7 i sc i q power supply rejection vs frequency frequency (hz) power supply rejection (db) 10 100 1k 10k 100k 1m 120 100 80 60 40 20 0 v s = 15v +psrr ?srr v s = +5v
5 ina2132 typical performance curves (cont) at t a = +25 c and v s = 15v, unless otherwise noted. 50mv/div small-signal step response c l = 200pf 50mv/div 10 m s/div small-signal step response c l = 1000pf 5v/div large-signal step response 100 m s/div 10 m s/div settling time vs load capacitance load capacitance settling time ( s) 100pf 1000pf 10,000pf 100 96 92 88 84 80 0.1% 0.01% 10v step input common-mode voltage range vs output voltage output voltage (v) common-mode voltage (v) ?6 ?2 ? ? 0 4 8 16 12 40 30 20 10 0 ?0 ?0 ?0 ?0 v ref = 0v g = 1 v s = 5v v s = 15v v s = +5v slew rate vs temperature temperature ( c) slew rate (v/ s) ?5 ?0 ?5 0 25 50 75 100 125 0.18 0.16 0.14 0.12 0.10 0.08 0.06
6 ina2132 typical performance curves (cont) at t a = +25 c and v s = 15v, unless otherwise noted. 0.5 m v/div 500ms/div 0.1hz to 10hz peak-to-peak voltage noise offset voltage production distribution percent of amplifiers (%) offset voltage ( v) ?00 ?00 ?00 ?00 ?00 0 100 200 300 400 500 25 20 15 10 5 0 v s = 15v offset voltage production distribution percent of amplifiers (%) offset voltage ( v) ?00 ?00 ?00 ?00 ?00 ?00 ?00 0 100 200 300 400 500 600 700 18 16 14 12 10 8 6 4 2 0 v s = +5v offset voltage drift production distribution percent of amplifiers (%) offset voltage drift ( v/ c) 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 40 35 30 25 20 15 10 5 0 v s = 15v
7 ina2132 applications information figure 1 shows the basic connections required for operation of the ina2132. power supply bypass capacitors should be connected close to the device pins. the differential input signal is connected to pins 2 and 3 (or pins 6 and 5) as shown. the source impedances connected to the inputs must be nearly equal to assure good common- mode rejection. an 8 w mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 80db. gain accuracy will also be slightly affected. if the source has a known impedance mismatch, an additional resistor in series with one input can be used to preserve good common-mode rejection. do not interchange pins 3 and 14 (or pins 5 and 8) or pins 2 and 12 (or pins 6 and 10), even though nominal resistor values are equal. these resistors are laser-trimmed for pre- cise resistor ratios to achieve accurate gain and highest cmrr. interchanging these pins may not provide specified performance. as shown in figure 1, sense line should be connected as close to the load as possible. in the case where v ref is grounded, the equation simplifies to: 2 ? (vC) < v cm < 2 ? ((v+) C 1) for more information, see the typical performance curve titled input common-mode voltage range vs output voltage. operating voltage the ina2132 operates from single (+2.7v to +36v) or dual ( 1.35v to 18v) supplies with excellent performance. specifications are production tested with +5v and 15v supplies. most behavior remains unchanged throughout the full operating voltage range. parameters which vary signifi- cantly with operating voltage are shown in the typical performance curves. the ina2132 can accurately measure differential signals that are beyond the power supply rails. linear common- mode range extends to twice the negative power supply voltage and nearly twice the positive power supply voltage. output phase reversal does not occur when the inputs to the internal operational amplifier are overloaded to either rail. see typical performance curve, common-mode range vs output voltage. offset voltage trim the ina2132 is laser-trimmed for low offset voltage and drift. most applications require no external offset adjust- ment. figure 2 shows an optional circuit for trimming the output offset voltage. the output is referred to the output reference terminal (pin 14 or pin 8), which is normally grounded. a voltage applied to the ref terminal will be summed with the output signal. this can be used to null offset voltage. the source impedance of a signal applied to the ref terminal should be less than 8 w to maintain good common-mode rejection. to assure low impedance at the ref terminal, the trim voltage can be buffered with an op amp, such as the opa277. figure 1. basic power supply and signal connections. figure 2. offset adjustment. to ensure valid operation of the differential amplifier, please note the following points: 1) v out = v 3 C v 2 + v ref 2) v out must be within the specified linear range. for example, with 15v supplies and a 100k w load, the output will be defined by: (vC) + 0.15v < v out < (v+) C 0.8v 3) input common-mode range at the nodes of the op amp must be vC v cm (v+) C 1. to ensure that the inputs to the differential amp (+in and Cin) meet this criteria, limit the common-mode voltage inputs to: 2 ? (vC) C v ref < v cm < 2 ? ((v+) C 1) C v ref v 3 12 (10) 13 (9) 3 (5) v o ina2132 v o = v 3 v 2 offset adjustment range = 500 v 2 (6) r 3 ref r 1 r 2 r 4 v 2 8 w r = 237k w 8 w 100k w +15v ?5v 14 (8) note: for 750 v range, r = 158k w . v 3 12 (10) 13 (9) 3 (5) ina2132 v out = v 3 v 2 2(6) r 3 ref r 1 r 2 r 4 v 2 40k w 40k w 40k w 40k w r l 1 f note: pin numbers in parentheses ( ) refer to channel b. v 4 1 f v+ 11 14 (8)
8 ina2132 12 (10) 13 (9) 14 (8) ina2132 ads7806 (1) 2 (6) 3 (5) 4 11 +5v ?n 12 bits out 0v-4v input +in t s = 45 s (4v step to 0.01%) note: (1) for 16-bit output, use ads7809. figure 4. differential input voltage-to-current converter for low i out . figure 5. differential input data acquisition. figure 3. low power, high output current precision difference amplifier. capacitive load drive capability the ina2132 can drive large capacitive loads, even at low supplies. it is stable with a 10nf load. refer to the small- signal step response and settling time vs load capaci- tance typical performance curves. channel crosstalk the two channels of the ina2132 are completely indepen- dent, including all bias circuitry. at dc and low frequency, there is virtually no signal coupling between channels. crosstalk increases with frequency and is dependent on source impedance and signal characteristics. see the typical performance curve channel separation vs frequency for more information. most crosstalk is produced by capacitive coupling of signals from one channel to the input section of the other channel. to minimize coupling, separate the input traces as far as practical from any signals associated with the opposite channel. a grounded guard trace surrounding the inputs helps reduce stray coupling between channels. run the differential inputs of each channel parallel to each other or directly adjacent on the top and bottom sides of a circuit board. stray coupling then produces a common-mode signal which is rejected by the ina2132s input. 12 (10) 13 (9) 14 (8) ina2132 buf634 2 (6) 3 (5) v o r l ?n +in (low i q mode) buf634 inside feedback loop contributes no error. 12 (10) 13 (9) 3 (5) ina2132 2 (6) 14 (8) v 3 v 2 load i o = (v 3 ?v 2 )/r i o r 12 (10) 13 (9) 3 (5) 14 (8) ina2132 2 (6) 1 v o dg188 v 1 logic in logic in 0 1 v o ? 1 +v 1 figure 6. digitally controlled gain of 1 amplifier. figure 7. precision voltage-to-current converter with differential inputs. 12 (10) 13 (9) 3 (5) ina2132 2 (6) 14 (8) v 1 v 2 load i o = (v 1 ?v 2 ) (1/40k + 1/r) i o r r
9 ina2132 12 13 3 ina2132 a b 2 v 01 14 10 9 5 6 v 01 ?v 02 = 2 (v 2 ?v 1 ) v 02 8 v 2 v 1 figure 8. differential output difference amplifier. figure 10. precision instrumentation amplifier. 12 13 3 ina2132 2 v 01 14 10 9 5 6 v 01 = (v 3 ?v 2 ) + 8 v 3 v ls level-shift voltage reference v 2 v ls 2 a b figure 9. precision level shifter. 12 (10) 13 (9) 14 (8) 3 (5) ina2132 2 (6) v 1 v o a 2 a 1 r 2 r 2 r 1 ?n v 2 +in v o = (1 + 2r 2 /r 1 ) (v 2 ? 1 ) the ina2132 can be combined with op amps to form a complete instrumentation amplifier with specialized performance characteristics. burr-brown offers many complete high performance ias. products with similar performances are shown below. opa227 low noise ina103 opa129 ultra-low bias current (fa) ina116 opa2277 low offset drift, low noise ina114, ina128 opa2130 low power, fet-input (pa) ina121 opa2234, opa2241, opa2244 single supply, precision, low power ina122, ina118 opa2237 single supply, low power, msop-8 ina122, ina126 similar complete a 1 , a 2 features burr-br0wn ias
10 ina2132 12 (10) 13 (9) v 0 ina2132 v 0 = v 2 2 (6) v 2 3 (5) 14 (8) v 3 12 (10) 13 (9) 3 (5) 2 (6) ina2132 14 (8) v 0 v 0 = v 3 /2 = 1/2 v 3 v 1 12 (10) 13 (9) 3 (5) 14 (8) 2 (6) v 0 ina2132 v 0 = (v 1 + v 3 )/2 v 3 v 1 12 (10) 13 (9) 3 (5) 14 (8) 2 (6) v 0 ina2132 v 0 = v 1 v 1 12 (10) 13 (9) 3 (5) 14 (8) v 0 ina2132 v 0 = 2 ?v 1 2 (6) v 1 12 (10) 13 (9) 3 (5) 14 (8) v 0 ina2132 v 0 = v 1 + v 3 2 (6) v 3 figure 11. precision inverting unity-gain amplifier. figure 12. precision gain = 1/2 amplifier. figure 13. precision average value amplifier. figure 14. precision unity-gain buffer. figure 15. precision gain = 2 amplifier. figure 16. precision summing amplifier.
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. customers are responsible for their applications using ti components. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated

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