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SG6741A 74101 M3568M MT8804 SLD323XT BZX55B43 SM448X ASI10630
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  ? e92121b79-te sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. structure bipolar silicon monolithic ic absolute maximum ratings (ta=25 ?) supply voltage v cc 8v operating temperature topr ?0 to +60 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 410 (cxa1622m) mw 1200 (cxa1622p) mw operating conditions (ta=25 ?) supply voltage stereo mode { 1.8 v to 4.5 v (cxa1622m) 1.8 v to 7.0 v (cxa1622p) monaural btl mode 1.8 v to 4.5 v (3 v recommended) description the cxa1622m/p is a bipolar ic developed as power amplifier for compact radio cassettes with built-in pre-amplifier and power amplifier electrical volume. features use one channel in stereo mode eiaj output=110 mw (typ.), v cc =3 v, r l =8 (cxa1622m) eiaj output=450 mw (typ.), v cc =6 v, r l =8 (cxa1622p) btl mode eiaj output=320 mw (typ.), v cc =3 v, r l =8 (cxa1622m) eiaj output=360 mw (typ.), v cc =3 v, r l =8 (cxa1622p) built-in electrical volume built-in ripple filter (ripple rejection 34.5 db typ.) selection between stereo power amplifier and monaural btl power amplifier is possible by switching pin 2. applications suitable for audio power amplifier for stereo and monaural radios and power amplifier for radio cassette and walkman. stereo power amplifier/monaural btl power amplifier cxa1622m cxa1622p 16 pin sop (plastic) 16 pin dip (plastic) 1000 500 p d -power dissipation (mw) power dissipation curve free air cxa1622p cxa1622m ?0 ?0 ?0 0 10 20 30 40 50 60 70 ta-ambient temperature (?) cxa1622m/p
2 cxa1622m/p pin description pin symbol equivalent circuit pin voltage description no. 3 v 6 v 1, 16 3 4, 13 5, 12 6, 11 7, 10 8 9 in1 in2 nc nf1 nf2 gnd1 gnd2 p-gnd1 p-gnd2 out1 out2 ripple v cc v c c 1 1 k 7 . 5 k g n d 1 6 1 4 . 7 k 1 0 0 k g n d v c c 1 3 4 g n d v c c 1 0 0 k 1 0 7 v c c 8 . 5 k 7 3 k 7 3 k 9 0 k 9 0 k 8 0 1.5 0 0 1.5 2.72 3 0 3 0 0 3 5.43 6 input power amplifier nf. connected to time constant 4.7 f. pre-amplifier gnd power amplifier gnd power amplifier output connected to time constant 10 f for ripple filter. v cc
3 cxa1622m/p pin symbol equivalent circuit pin voltage description no. 3 v 6 v 14 15 2 vol reg sw v c c 2 0 k 8 0 k g n d 1 4 v c c 4 k 2 4 k 1 5 v c c 1 5 k 1 5 k r e g 2 0 to 1.25 1.25 1.25 0 to 1.25 1.25 1.25 control gain with change in voltage (0 to 1.25 v) to electrical volume control pin. regulator pin mode selection sw btl mode when open stereo mode when connected to gnd block diagram, pin configuration, and application circuit 1) stereo mode + + + + + + + + + i n 1 c 2 1 0 c 3 1 0 i n 1 i n 2 r e g s w v o l n c n f 1 n f 2 g n d g n d p g n d 1 p g n d 2 o u t 1 o u t 2 v c c r i p p l e r 1 5 0 k c 5 3 . 3 c 7 0 . 1 c 9 0 . 1 c 1 0 2 2 0 c 1 2 2 2 0 v 1 3 v g n d s p 1 8 o u t 1 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 r e g v o l p r e + p o w e r 1 p r e + p o w e r 2 i n 2 c 1 1 0 c 4 3 . 3 c 5 0 . 1 c 8 1 0 c 1 1 2 2 0 g n d g n d o u t 2 s p 2 8
4 cxa1622m/p 2) btl mode + + + + + + i n c 1 c 2 1 0 i n 1 i n 2 r e g s w v o l n c n f 1 n f 2 g n d g n d p g n d 1 p g n d 2 o u t 1 o u t 2 v c c r i p p l e r 1 5 0 k c 4 3 . 3 c 6 0 . 1 c 8 0 . 1 c 9 2 2 0 v 1 3 v s p 2 8 o u t + 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 r e g v o l p r e + p o w e r 1 p r e + p o w e r 2 c 3 3 . 3 c 5 0 . 1 c 7 1 0 g n d o u t 1 0 * the input signal enters the pre-amplifier with attenuation controlled with dc at pin 14 and then it is amplified by the approximately 30 db (fixed) power amplifier. * the state of pin 2 can be used to select between stereo mode and monaural btl mode. the pre-power 1 and pre-power 2 output are positive phase output when pin 2 is gnd. pre-power 2 is inverse output of pre-power 1 output when pin 2 is open. application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
5 cxa1622m/p test no. test item circuit current during no signal audio voltage gain lch audio voltage gain rch channel balance attenuation lch attenuation rch eiaj output lch eiaj output rch audio distortion factor lch audio distortion factor rch residual noise level lch residual noise level rch crosstalk l ? r crosstalk r ? l bias sw conditions s 1 s 2 s 3 s 4 s 5 s 6 s 7 s 8 s 9 s 10 s 11 s 12 s 13 s 14 off off off on off off on off off off off off off off on on off on off on off on on off on on off off on off on on off on on off off on off on on off on off off on off on off off off off off on off off on on on off on on off input waveform and bias description output waveform and description of test method circuit current during no signal v 1 =?0 dbm 1 khz v 1 =?0 dbm 1 khz l and r channel balance v 1 =?0 dbm 1 khz output level difference between max volume and half volume v 1 =?0 dbm 1 khz output level difference between max volume and half volume v 1 =?0 dbm 1 khz, r l =8 output level where thd=10 % v 1 =?0 dbm 1 khz, r l =8 output level where thd=10 % v 1 =?0 dbm 1 khz, r l =8 distortion factor when output is 50 mw v 1 =?0 dbm 1 khz, r l =8 distortion factor when output is 50 mw noise level during no signal at max volume noise level during no signal at max volume v 1 =?0 dbm 1 khz rch output level when lch is input v 1 =?0 dbm 1 khz lch output level when rch is input function block input point test point typical conditions for each bias min. typ. max. unit 1.0 3.0 8.2 ma 1.0 3.0 7.7 28 33.7 38 db 27 32.6 36 28 33.7 38 db 27 32.6 36 ? 0 3 db 1.5 5.8 12 db 1.0 4.3 12 1.5 5.8 12 db 1.0 4.3 12 350 450 mw 90 110 350 450 mw 90 110 0.7 2.5 % 0.7 2.5 % ?5 ?0 dbm ?5 ?0 dbm ?0 ?6 dbm ?0 ?6 dbm i 1 v 4 v 5 v 4 v 5 v 4 v 5 v 4 v 5 v 4 v 5 v 4 v 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 stereo mode upper : cxa1622m (v cc =3 v) lower : cxa1622p (v cc =6 v) {
6 cxa1622m/p test no. test item circuit current during no signal output dc bias lag audio voltage gain attenuation eiaj output audio distortion factor residual noise level bias sw conditions s 1 s 2 s 3 s 4 s 5 s 6 s 7 s 8 s 9 s 10 s 11 s 12 s 13 s 14 off on on off off off on off on on off on on off on on on on off off input waveform and bias description output waveform and description of test method circuit current during no signal output dc bias lag v 1 =?0 dbm 1 khz v 1 =?0 dbm 1 khz output level difference between max volume and half volume v 1 =?0 dbm 1 khz, r l =8 output level where thd=10 % v 1 =?0 dbm 1 khz, r l =8 distortion factor when output is 50 mw noise level during no signal at max volume function block input point test point typical conditions for each bias min. typ. max. unit 3 7 ma 0 30 mv 34 38 42 db 30 37 43 1.5 6.0 12 db 1.0 5.0 12 260 360 mw 220 320 2.5 % ?5 ?2 dbm i 1 |v 3 | v 3 v 3 v 3 v 3 v 3 1 2 3 4 5 6 7 btl mode v cc =3 v upper : cxa1622m lower : cxa1622p
7 cxa1622m/p electrical characteristics test circuit 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 + + + + + + + + + + g n d + a v y v v c 3 1 0 c 4 1 0 c 6 3 . 3 c 8 0 . 1 c 1 0 0 . 1 c 1 1 2 2 0 c 1 3 2 2 0 c 1 2 2 2 0 c 9 1 0 c 7 0 . 1 c 5 3 . 3 r 1 2 5 k r 2 2 5 k r 3 5 0 k s 7 s 8 s 9 s 1 2 s 1 1 s 1 4 s 1 3 s 1 8 s 6 s 5 s 2 s 1 s 3 s 4 c 1 1 0 c 2 1 0 v 1 r c v 2 3 v v 4 v 6 v 5 i 1 r 6 8 r 4 8 r 5 8 y 3 i n 1 i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p notes on operation set print pattern to low impedance because pins 6 and 11 are gnd of power amplifier output stage. the value of the phase correction capacitance attached to pins 7 and 10 varies slightly according to the print pattern. provide a large land for dip type pin 5 because it also serves as heat dissipation pin. place the by-pass capacitor of v cc (pin 9) as close to the pin as possible.
8 cxa1622m/p stereo output single mode monaural output btl mode 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + + + + g n d c 2 1 0 c 3 1 0 c 5 3 . 3 c 7 0 . 1 c 9 0 . 1 c 1 0 2 2 0 c 1 2 2 2 0 c 1 1 2 2 0 c 8 1 0 c 5 0 . 1 c 4 3 . 3 r 1 5 0 k c 1 1 0 v 1 3 v r 3 8 i n 1 i n 1 i n 2 i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 * * r 2 8 6 7 k e e p t h e b y - p a s s c a p a c i t o r c l o s e t o t h e i c p i n s 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + g n d c 1 1 0 c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 r 1 5 0 k v 1 3 v i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 * r 2 8 6 7 * k e e p t h e b y - p a s s c a p a c i t o r c l o s e t o t h e i c p i n s
9 cxa1622m/p when using internal ic electrical volume in btl mode when using ic as fixed gain amplifier in btl mode pin14 ? gnd (ic gain max) 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + g n d c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 r 1 5 0 k v 1 3 v i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 r 2 8 6 7 s . p c 1 1 0 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + + g n d c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 v 1 3 v i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 r 2 8 6 7 s . p c 1 1 0
10 cxa1622m/p btl, stereo application circuit when using internal ic electrical volume 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + c 1 1 0 c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 r 1 5 0 k i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 r 2 8 6 7 s . p l c h 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + g n d c 1 1 0 c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 r 1 5 0 k v 1 3 v i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 r 2 8 6 7 s . p r c h l i n k a g e v o l . application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
11 cxa1622m/p btl, stereo application circuit when using ic as fixed gain amplifier pin14 ? gnd (ic gain max) 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + + c 1 1 0 c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 r 2 8 6 7 s . p l c h 1 6 1 5 1 4 1 3 1 2 1 1 1 0 8 5 4 3 2 1 + + + + + + + g n d c 1 1 0 c 2 1 0 c 4 3 . 3 c 5 0 . 1 c 8 0 . 1 c 9 2 2 0 c 7 1 0 c 5 0 . 1 c 3 3 . 3 i n 1 i n i n 2 v o l n c n f 1 n f 2 g n d g n d o u t 1 o u t 2 v c c r i p p l e p g n d 1 p g n d 2 r e g s w c x a 1 6 2 2 m / p 9 r 2 8 6 7 s . p r c h v 1 3 v l i n k a g e application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
12 cxa1622m/p 1 0 5 0 1 0 1 0 0 1 0 0 0 v i n = 2 6 d b m f i n = 1 k h z r l = 8 w v c c = 1 . 8 v v c c = 3 v v c c = 4 . 5 v i n = 2 6 d b m i n = 2 0 d b m 1 0 5 0 1 0 1 0 0 1 0 0 0 v i n = 2 6 d b m f i n = 1 k h z r l = 8 w v c c = 1 . 8 v v c c = 3 v 1 0 5 0 1 0 1 0 0 1 0 0 0 v i n = 2 6 d b m f i n = 1 k h z r l = 8 w v c c = 1 . 8 v v c c = 3 v v c c = 4 . 5 v i n = 2 6 d b m i n = 2 0 d b m 1 0 5 0 1 0 1 0 0 1 0 0 0 v i n = 2 6 d b m f i n = 1 k h z r l = 8 w v c c = 1 . 8 v v c c = 3 v i n = 2 6 d b m i n = 2 0 d b m 0 1 0 2 0 1 0 1 0 0 1 k 1 0 k 1 0 0 k o u t p u t c = 2 2 0 f r l = 8 w i n = 4 0 d b m , 1 k h z i s a s s u m e d a s 0 d b 0 1 0 2 0 1 0 1 0 0 1 k 1 0 k 1 0 0 k i n = 4 0 d b m , 1 k h z i s a s s u m e d a s 0 d b o u t p u t v s d i s t o r t i o n 1 c x a 1 6 2 2 p s t e r e o m o d e s i n g l e - c h a n n e l i n p u t o u t p u t v s d i s t o r t i o n f a c t o r 3 c x a 1 6 2 2 p b t l m o d e o u t p u t v s d i s t o r t i o n 2 c x a 1 6 2 2 m s t e r e o m o d e s i n g l e - c h a n n e l i n p u t d i s t o r t i o n f a c t o r [ % ] d i s t o r t i o n f a c t o r [ % ] d i s t o r t i o n f a c t o r [ % ] d i s t o r t i o n f a c t o r [ % ] o u t p u t [ m v ] o u t p u t [ m v ] o u t p u t [ m v ] o u t p u t [ m v ] o u t p u t v s d i s t o r t i o n 4 c x a 1 6 2 2 m b t l m o d e s t e r e o m o d e f r e q u e n c y c h a r a c t e r i s t i c s v i n = 4 0 d b m v o l m a x v c c = 3 v b t l m o d e f r e q u e n c y c h a r a c t e r i s t i c s v i n = 4 0 d b m v o l m a x v c c = 3 v o u t p u t [ d b ] o u t p u t [ d b ] i n p u t s i g n a l f r e q u e n c y [ h z ] i n p u t s i g n a l f r e q u e n c y [ h z ]
p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s s o n y c o d e e i a j c o d e j e d e c c o d e s o p - 1 6 p - l 0 1 s o p 0 1 6 - p - 0 3 0 0 c o p p e r a l l o y s o l d e r p l a t i n g e p o x y r e s i n 1 6 p i n s o p ( p l a s t i c ) 9 . 9 0 . 1 + 0 . 4 1 6 9 1 8 1 . 2 7 0 . 4 5 0 . 1 5 . 3 0 . 1 + 0 . 3 7 . 9 0 . 4 6 . 9 1 . 8 5 0 . 1 5 + 0 . 4 0 . 5 0 . 2 0 . 2 0 . 0 5 + 0 . 1 0 . 1 0 . 0 5 + 0 . 2 0 . 2 g 0 . 1 5 m 0 . 2 4 p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r p l a t i n g c o p p e r a l l o y 1 9 . 2 0 . 1 + 0 . 4 9 1 8 2 . 5 4 0 . 5 0 . 1 1 . 2 0 . 1 5 3 . 0 m i n 0 . 5 m i n 3 . 7 0 . 1 + 0 . 4 6 . 4 0 . 1 + 0 . 3 7 . 6 2 0 . 2 5 0 . 0 5 + 0 . 1 0 t o 1 5 1 6 1 6 p i n d i p ( p l a s t i c ) 1 . 0 g s o n y c o d e e i a j c o d e j e d e c c o d e d i p - 1 6 p - 0 1 d i p 0 1 6 - p - 0 3 0 0 s i m i l a r t o m o - 0 0 1 - a e 1 . a l l m a t s u r f a c e t y p e . t w o k i n d s o f p a c k a g e s u r f a c e : 2 . a l l m i r r o r s u r f a c e t y p e . package outline unit : mm cxa1622m cxa1622p cxa1622m/p 13


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