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AU9360 usb multiple slots flash memory card reader controller trm revision 1.2 ? 1997-2003 alcor micro corp. all rights reserved
copyright notice copyright 1997 - 2003 alcor micro corp. all rights reserved. trademark acknowledgements the company and product names mentioned in this document may be th e trademarks or registered trademarks of their manufacturers. disclaimer alcor micro corp. reserves the right to change this product without prior notice. alcor micro corp. makes no warranty for the use of its products an d bears no responsibility for any error that appear in this d ocument. specifications are subject to change without prior notice. contact information: web site: http://www.alcormicro.com/ taiwan alcor micro corp. 4f, no 200 kang chien rd., nei hu, taipei, taiwan, r.o.c. phone: 886-2-8751-1984 fax: 886-2-2659-7723 santa clara office los angeles office 2901 tasman drive, suite 206 9400 seventh st., bldg. a2 santa clara, ca 95054 rancho cucamonga, ca 91730 usa usa phone: (408) 845-9300 phone: (909) 483-9900 fax: (408) 845-9086 fax: (909) 944-0464
table of contents i table of contents 1 introduction??????????????????????????? 1 1.1 description?????????????????????????. 1 1.2 features??????????????????????????.. 1 2 application block diagram???????????????????? 3 3 pin assignment?????????????????????????. 5 4 system architecture a nd reference design????????????. 9 4.1 AU9360 block diagram???????????????????? 9 4.2 sample schematics??????????????????????. 10 5 electrical characteristics????????????????????? 13 5.1 absolute maximum ratings??????????????????? 13 5.2 recommended operating conditions?????????????? 13 5.3 general dc characteristics??????????????????? 13 5.4 dc electrical characteristics for 5 volts operation?????????. 14 5.5 crystal oscillator circuit setup for characterization????????.. 14 5.6 usb transceiver characteristics???????????????? 15 5.7 esd test results??????????????????????? 19 5.8 latch-up test results????????????????????? 20 6 mechanical information?????????????????????.. 23 7 errata????????.?????????????????????.. 25
table of contents i
introduction 1 1.0 introduction 1.1 description the AU9360 is a single chip usb flash memory reader controller which supports not only the widely used flash memory cards, such as compact flash (cf) ca rd, micro drive (md), smartmedia card (smc), xd picture card, memory stick (ms), memory stick duo, memory stick pro, secure digital (sd) and multimedia card (mmc), but also supports nand type flash as a usb flash disk. it can be used as removable storage disks in enormous data exchange applications between pc and pc or pc and various consumer electronic appliances. the AU9360 reads digital data saved on memory card while users manipulating electronic devices such as digital cameras, mp3 player s, pdas and mobile phones? etc. by the AU9360, users can transfer information such as data, graphics, texts or digital images from one electronic device to another quickly and eas ily. with AU9360, user s? knowledge will be further enhanced by the plug-and-play nature built into latest operation systems such as windows 2000/xp and mac os x. by integrating of various analog components, the AU9360 is the most powerful and most effective solution for vari ous flash memory reader. 1.2 features fully compliant with usb v1.1 specification and usb device class definition for mass storage, bulk-transport v1.0 fully compliant with compact flash (cf) v1.4 specification fully compliant with secure digital (sd) v1.0 specification. fully compliant with memory stick (ms) v1.3 specification. fully compliant with memory stick pro v1.0 specification. fully compliant with memory stick rom format v1.0 specification. fully compliant with memory stick duo format v1.01 specification. fully compliant with smart media card (smc) standard 2000 specification. support 1 piece nand type flash memory up to 2gbit capacity. support mask rom card capacity from 2mb to 256mb. work with default driver from windows me, windows xp, mac os 9, and mac os x. windows 98, windows 2000 are supported by vendor driver from alcor.
introduction 2 ping-pong fifo implementation for concurrent bus operation support multiple sectors transfer to 4gb to optimize performance support optional external eeprom for us b vid, pid and stri ng customization support slot to slot read/write operation. support auto-detecting slot with card inserted on win 2000 without driver. capable of handling 8 sets of built-in pid, vid and strings to minimize inventory control and improve lead production lead time support 5 different leds for bus activity indication of 5 separated slots. each slot can be enables/disabled by 5 independent pins to fit all the different card readers? combinations requirement. integrated 4 power switches and power mana gement circuit for each slot to meet usb 500ua power consumption during suspend with card in the slot. runs at 12mhz, built-in 48 mhz pll built-in 3.3v regulator 100-pin lqfp package
application block diagram 3 2.0 application block diagram following is the application diagram of a typical flash memory card reader using AU9360. by connecting the reader to a pc through usb bus, the AU9360 is acting as a bridge between the flash memory card from digital camera, mp3 player, pda or mobile phone and pc. pc with usb host controller usb 9-in-1 flash memory card reader moble phones pda mp3 player digital camera cf/ms/md/s mc/sd/mmc nand...etc pc
application block diagram 4
pin assignment 5 3.0pin assignment the AU9360 is packed in 100-lqfp-form factor. the following figure shows signal name for each pin and the table in the following page describes each pin in detail. 75 69 70 71 72 74 73 66 67 68 65 59 60 61 62 64 63 56 57 58 55 51 52 54 53 1 7 6 5 4 2 3 10 9 8 11 17 16 15 14 12 13 20 19 18 21 25 24 22 23 36 42 41 40 39 37 38 45 44 43 47 46 50 49 48 26 32 31 30 29 27 28 35 34 33 100 94 95 96 97 99 98 91 92 93 90 84 85 86 87 89 88 81 82 83 79 80 76 77 78 gpi1 gpi2 vcca xtal1 xtal2 vcc2card xdcdn gnda vcc3v rstn usb_dp gndio romad13 romad12 romad11 romad9 romad10 usb_dm romad14 romad4 vcc5v romad8 romad7 romad6 romad5 romad3 romad15 romad2 romad0 pwrled romd0/vid0 gpon3 romad1 romd2 /xdstren romd3/xdsloten romd4/led mode cfad9 cfad2 cfad1 cfad0 cfd1 cfd0 romd5/fmsloten cfad3 cfd6 romd1/vid1 cfd2 cfd3 cfd4 cfd5 alcor micro AU9360 100 -pin lqfp smdata4 smrbn smcdn smale smwrn smwpn smrdn smcle msclk msbs msins vcck romd6/ xdwpn cfrst cfwtn cfwen cfoen gndk romd7/ swausw cfd7 msdata cfwrn cfrdn cfcdn xdcen gpi0 ct1 ct3 gpi3 gpon4 gpon5 ct2 ct4 gpon7 sdwp sdcdn sdclk smdata7 smdata0 mdata1 smdata3 smdata2 sddata sdcmd smdata5 gpon6 eepdata eepclk smcen smdata6
pin assignment 6 table 3-1. pin descriptions pin pin name i/o type description 1 gpi1 i cf card slot enable 2 gpi2 i sm card slot enable 3 xdcdn i connect to xd card detect 4 vcca pwr analog 3.3v input 5 gnda pwr ground 6 xtal1 i crystal osc illator input (12mhz) 7 xtal2 o crystal osc illator output (12mhz) 8 vcc2card o connect to card power 9 vcc5v pwr 5v power supply 10 vcc3v pwr regular 3.3v output/ io 3.3v input 11 rstn input hardware reset (active low) 12 usb_dp i/o usb d+ 13 usb_dm i/o usb d- 14 gndio pwr ground 15 romad14 o connect to external rom addr14 16 romad13 o connect to external rom addr13 17 romad12 o connect to external rom addr12 18 romad11 o connect to external rom addr11 19 romad10 o connect to external rom addr10 20 romad9 o connect to external rom addr9 21 romad8 o connect to external rom addr8 22 romad7 o connect to external rom addr7 23 romad6 o connect to external rom addr6 24 romad5 o connect to external rom addr5 25 romad4 o connect to external rom addr4 26 romad3 o connect to external rom addr3 27 romad15 o connect to external rom addr15 28 gpon3 o general purpose output pin, used as activity led / xd card access led blink 29 romad2 o connect to external rom addr2 30 romad1 o connect to external rom addr1 31 romad0 o connect to external rom addr0 32 pwrled o general purpose output pin, used as activity led / power led 33 romd0 / vid0 i/o connect to external rom d0 / selection vid/pid 34 romd1 / vid1 i/o connect to external rom d1 / selection vid/pid 35 romd2 / xdstren i/o connect to external rom d2 / xd string enable 36 romd3/ xdsloten i/o connect to external rom d3 / xd card slot enable
pin assignment 7 37 romd4/ led mode i/o connect to external rom d4/ led mode selection 38 romd5/ fmsloten i/o connect to external ro m d5/ flash slot enable 39 cfad9 o connect to cf card addr9 40 cfad3 o connect to cf card addr3 41 cfad2 o connect to cf card addr2 42 cfad1 o connect to cf card addr1 43 cfad0 o connect to cf card addr0 44 cfd0 i/o connect to cf card data0 45 cfd1 i/o connect to cf card data1 46 cfd2 i/o connect to cf card data2 47 cfd3 i/o connect to cf card data3 48 cfd4 i/o connect to cf card data4 49 cfd5 i/o connect to cf card data5 50 cfd6 i/o connect to cf card data6 51 cfd7 i/o connect to cf card data7 52 xdcen o connect to xd card enable 53 cfcdn i connect to cf card card detect 54 cfrdn o connect to cf card iord 55 cfwrn o connect to cf card iowr 56 cfwen o connect to cf card we 57 cfoen o connect to cf card oe 58 cfwtn i connect to cf card wait 59 cfrst o connect to cf card reset 60 romd6/ xdwpn i/o connect to external rom d6 / xd write protection (protect=0, not protect=1) 61 romd7/ swausw i/o connect to external rom d7/ software auto switch disk for win 2000 (enable=0, disable=1). 62 vcck pwr core 3.3v input 63 gndk pwr ground 64 msins i connect to memorystick card ins 65 msbs o connect to memorystick card bs 66 msclk o connect to memorystick card sclk 67 msdata i/o connect to memorystick card data 68 smwpn i connect to smartmedia card write protect 69 smwrn o connect to smartm edia card write enable 70 smale o connect to smartmedia card address latch enable 71 smcle o connect to smartmedia card command latch enable 72 smcdn i connect to smartmedia card card detect 73 smrdn o connect to smartm edia card read enable 74 smrbn i connect to smartmedia card ready/busy output 75 smdata4 i/o connect to smartmedia card data 4
pin assignment 8 76 smdata5 i/o connect to smartmedia card data5 77 smdata6 i/o connect to smartmedia card data 6 78 smcen o connect to sm card enable 79 eepclk o connect to eeprom serial clock 80 eepdata i/o connect to eeprom serial data 81 smdata3 i/o connect to smartmedia card data 3 82 smdata2 i/o connect to smartmedia card data 2 83 smdata1 i/o connect to smartmedia card data 1 84 smdata0 i/o connect to smartmedia card data 0 85 smdata7 i/o connect to smartmedia card data 7 86 sdcmd i/o connect to sd cmd 87 sdclk o connect to sd clk 88 sddata i/o connect to sd data 89 sdcdn i connect to sd card detect 90 sdwp i connect to sd write protect 91 gpon7 o general purpose output pin, used as activity led / ms card access 92 gpon6 o general purpose output pin, used as activity led / sm card access 93 gpon5 o general purpose output pin, used as activity led / cf card access 94 gpon4 o general purpose output pin, used as activity led / sd card access 95 gpi3 i ms card slot enable 96 ct4 i ecc selection ('0'=disable, '1'=enable) 97 ct3 i connect to ground 98 ct2 i rom selection ('0' = internal rom, '1'=external rom) 99 ct1 i connect to ground 100 gpi0 i sd card slot enable
system architecture and reference design 9 4.0 system architecture and reference design 4.1 AU9360 block diagram alcor micro ? AU9360 flash memory card reader controller chip block diagram usb sie usb upstream port xcvr ram 3.3 v voltage regulator /power switch 3.3 v processor rom 12mhz xtal cf/cf /smc/ ms/ /ms pro/ mmc/ sd/ fm /xd control fifo card power eeprom cf md smc ms ms pro ms duo sd mmc flash memor y (fm) other eeprom control arbitrator
system architecture and reference design 10 4.2 sample schematics vcc3.3 smrdn gndk romd3/xdsloten mspwr cfoen c1 1uf gpi0 romad14 vcc2card c8 18pf msins disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. r2 39 romad0 ct3 smdata2 sdcdn romd0/vid0 smcle romad7 gpi1 cfcdn romad1 eepclk cfad1 sdpwr c11 0.1uf romad8 sdcmd romd4/led mode romad10 gndk vcc2card cfad2 smale smcdn xtal2 romd7/swausw cfd2 ct4 c10 0.1uf vcc3.3 romad6 r5 100k romd5/fmsloten vcc cfrst sdwp smdata4 romad5 xtal1 xdcen f3 fb gpon7 cfwrn r10 1m romd7/swausw gpi3 sdcdn cfd5 romad6 msins sdclk romd5/fmsloten smcdn gpon5 smdata6 romad10 j1 1 2 3 4 5 vcc data- data+ gnd fgnd1 romad12 msbs romd0/vid0 romad2 romad12 c9 0.1uf gpon3 smrbn cfwen smdata1 xtal1 gpon4 vcc2card romad15 a4 13 saturday, april 05, 2003 2.41 AU9360 9 in 1 demostration schematics size document number rev date: sheet of smdata0 romad8 c5 18pf romad14 vcc2card romd2/xdstren gpi2 u2 w27e512 10 9 8 7 6 5 4 3 25 24 21 23 2 26 27 20 22 11 12 13 15 16 17 18 19 1 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 ce oe/vpp d0 d1 d2 d3 d4 d5 d6 d7 a15 cfad9 romad13 cfd0 cfd7 cfpwr q1 mosfet p romad9 r3 39 gnda cfrdn cfwtn r4 100k q7 9012 f2 fb romad15 cfd1 msdata vcc cfad3 cfd3 romad13 romd2/xdstren r9 100k vcc q5 mosfet p smdata[0..7] romd1/vid1 smcen q4 mosfet p ct2 vcc5v romad11 romad4 q3 mosfet p f1 fb romad0 smwpn romd4/led mode cfcdn cfpwr smdata5 optional,if external rom selected smdata7 vcca pwrled c2 0.1uf c4 10uf r7 100k romad3 f4 fb smdata3 cfd4 romad5 f6 fb smpwr vcc5v xdcdn romd6/xdwpn c7 0.1uf romd6/xdwpn u1 AU9360 100pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 gpi1 gpi2 xdcdn vcca gnda xtal1 xtal2 vcc2card vcc5v vcc3v rstn usb_dp usb_dm gndio romad14 romad13 romad12 romad11 romad10 romad9 romad8 romad7 romad6 romad5 romad4 romad3 romad15 gpon3 romad2 romad1 romad0 pwrled romd0/vid0 romd1/vid1 romd2/xdstren romd3/xdsloten romd4/led mode romd5/fmsloten cfad9 cfad3 cfad2 cfad1 cfad0 cfd0 cfd1 cfd2 cfd3 cfd4 cfd5 cfd6 cfd7 xdcen cfcdn cfrdn cfwrn cfwen cfoen cfwtn cfrst romd6/xdwpn romd7/swausw vcck gndk msins msbs msclk msdata smwpn smwrn smale smcle smcdn smrdn smrbn smdata4 smdata5 smdata6 smcen eepclk eepdata smdata3 smdata2 smdata1 smdata0 smdata7 sdcmd sdclk sddata sdcdn sdwp gpon7 gpon6 gpon5 gpon4 gpi3 ct4 ct3 ct2 ct1 gpi0 vcck y1 12mhz r8 100k vcck xtal2 pwrled r1 1.5k romad11 romad9 romad7 vcc3.3 c3 0.1uf cfad0 eepdata romad1 ct1 c6 0.1uf vcc2card romad4 gnda romd3/xdsloten romd1/vic1 romad2 ct2: rom selection ('0'= internal '1'= external rom) ct4: ecc selection ( '0'= disable.'1'= enable) gpi0: sd card slot enable gpi1: cf card slot enable gpi2: sm card slot enable gpi3: ms card slot enable gpon6 sddata cfd6 c22 0.1uf smwrn romad3 vcca msclk f5 fb q2 9013 3 2 1
electrical characteristics 11 cfwen c14 47pf r23 470k cfwrn a4 23 saturday, april 05, 2003 2.41 AU9360 9 in 1 demostration schematics size document number rev date: sheet of cfd3 smcen1 tp sw2 2 1 3 c16 0.1uf intrq d4 sdpwr cfwtn gpon5 c20 0.1uf tp cfrst ct2 jp4 cf connector 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 gnd cfdata4 cfdata6 ce1n -oe cfaddr8 vcc cfaddr5 cfaddr3 cfaddr1 cfdata0 cfdata2 cdn cfdata11 cfdata13 cfdata15 vs1 iowrn intrq csel reset indack spkr cfdata8 cfdata10 gnd cfdata9 stschg regn waitn vs2 vcc wen iordn ce2n cfdata14 cfdata12 cdn iois16 cfdata1 cfaddr0 cfaddr2 cfaddr4 cfaddr6 cfaddr7 cfaddr9 cfaddr10 cfdata7 cfdata5 cfdata3 d2 vcc3.3 vcc3.3 cfd5 gpon7 sdcmd cfd6 smpwr eepdata cfad2 cfd7 cfad9 c13 0.1uf sw4 2 1 3 d5 cfcdn r16 10k cfd1 cfd2 smwpn gpi0 r17 10k cfoen gpi3 jp3 smc connector 08 07 06 1 2 3 4 5 10 09 12 11 17 18 19 20 21 22 16 15 14 13 d2 d1 d0 gnd cle ale -we -wp gnd d3 vcc -cd lvd gnd r/-b -re -ce vcc d7 d6 d5 d4 smdata2 vcc3.3 smdata6 ct3 eepclk gpon6 r11 10k smwrn gpon3 sdpwr d1 optional cfpwr smdata7 d3 cfad3 sw6 2 1 3 cfad1 cfrdn smrbn pwrled tp msclk smdata0 mspwr smdata1 gpi1 jp2 ms socket vss bs vcc sdio reserved ins reserved sclk vcc vss c12 47pf smpwr jp1 sd socket 1 2 8 sdcd 3 4 5 6 9 7 sdwp gpi2 sdwp r12 10k sw7 2 1 3 smcle smdata3 msbs r14 100k gpon4 msins smrdn disclaimer: this schematic is for reference only. alcor micro corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. specifications are subject to change without notice. sddata cfd4 sdcdn smdata4 cfpwr c21 0.1uf ct4 cfd0 sdclk c19 0.1uf d6 u3 24c02 or compatible 1 2 3 4 5 6 7 8 a0 a1 a2 gnd sda scl wp vcc smdata5 smcdn msdata smale c17 47pf sdpwr ct1 cfad0 c23 18pf c15 47pf sw8 2 1 3 r22 330 vcc3.3 r25 47k sw5 2 1 3 vcc3.3
electrical characteristics 12 vid0: selection vid/pid vid1: selection vid/pid xdstren: xd slot string enable (disable=0, enable=1) xdsloten: xd card slot enable led mode: led mode enable(single led=1, 5 led=0) fmsloten: flash slot enable (disable=0, enable=1) xdwpn: xd write protect (proect=0, not protect=1) swausw: software auto switch disk for win 2000 (enable=0, disable=1) xdcen1 vcc3.3 smwrn sw9 2 1 3 internal rom only smcle smcle sw15 2 1 3 u5 74hc138 or compatable 1 2 3 6 4 5 15 14 13 12 11 10 9 7 a b c g1 g2a g2b y0 y1 y2 y3 y4 y5 y6 y7 vcc2card romd7/swausw smdata[0..7] fmcen sw14 2 1 3 smale romd0/vid0 romd6/xdwpn romd3/xdsloten xdcdn vcc2card vcc2card sw12 2 1 3 romd2/xdstren jp5 header 19 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 vcc d7 d6 d5 d4 d3 d2 d1 d0 gnd -wp -we ale cle -ce -re r/-b gnd -cd nc xdpwr romd5/fmsloten smrbn xdcen xdpwr sw11 2 1 3 xdcdn smrdn smcen romd4/led mode smrbn q6 mosfet p sw13 2 1 3 romd1/vid1 u4 k9f5608u0a-ycb0 29 30 31 32 41 42 43 44 6 13 36 12 37 7 8 9 16 17 18 19 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 gnd vss vss vcc vcc r/b re ce cle ale we wp sw10 2 1 3 smrdn smdata[0..7] smcen1 smwrn smale vcc2card fmcen xdcen1 a 33 friday, april 11, 2003 2.41 AU9360 9 in 1 demostration schematics size document number rev date: sheet of sw16 2 1 3 pin 16 connect to vcc2card pin 8 connect to gnd vcc2card
electrical characteristics 13 5.0 electrical characteristics 5.1 absolute maximum ratings symbol parameter rating units v cc power supply -0.3 to 6.0 v v in input voltage -0.3 to vcc+0.3 v v out output voltage -0.3 to vcc+0.3 v t stg storage temperature -40 to 125 ? c 5.2 recommended operating conditions symbol parameter min typ max units v cc power supply 4.5 5.0 5.5 v v in input voltage 0 v cc v t opr operating temperature -5 85 o c 5.3 general dc characteristics symbol parameter conditions min typ max units i il input low current no pull-up or pull-down -1 1 a i ih input high current no pull-up or pull-down -1 1 a i oz tri-state leakage current -10 10 a c in input capacitance 4 f c out output capacitance 4 f c bid bi-directional buffer capacitance 4 f
electrical characteristics 14 5.4 dc electrical characteristics for 5 volts operation ( under recommended operating conditions and v cc =4.5v ~ 5.5v , tj= -40 o c to + 85 o c ) symbol parameter conditions min typ max units v il input low voltage ttl 0.8 v v il input low voltage cmos 0.3*v cc v v il schmitt input low voltage ttl 1.10 v v il schmitt input low v oltage cmos 1.84 v v ih input high voltage ttl 2.2 v v ih input hight voltage cmos 0.7*v cc v v ih schmitt input high voltage ttl 1.87 v v ih schmitt input high voltage cmos 3.22 v v ol output low voltage i ol =2, 4, 8, 12, 16, 24 ma 0.4 v v oh output high voltage i oh =2, 4, 8, 12, 16, 24 ma 3.5 v r i input pull-up/down resistance vil=0 v or vih=v cc 50 k ? 5.5 crystal oscillator circui t setup for characterization the following setup was used to measure the open loop voltage gain for crystal oscillator circuits. the feedback resistor serves to bias the circuit at its quiescent operating point and the ac coupling capacitor, cs, is much larger than c1 and c2.
electrical characteristics 15 5.6 usb transceiver characteristics recommended operating conditions symbol parameter conditions limits unit min max v cc dc supply voltage 3.0 3.6 v v i dc input voltage range 0 5.5 v v i/o dc input range for i/os 0 v cc v v o dc output voltage range 0 v cc v t amb operating ambient temperature range in free air see dc and ac characteristics for individual device 0 70 ? c absolute maximum ratings (notes 1 and 2) in accordance with the absolute maximum rating system, voltages are referenced to gnd (ground=0v) symbol parameter conditions limits unit min max v cc dc supply voltage -0.5 +6.5 v i ik dc input diode current vi<0 -50 ma v i dc input voltage note 3 -0.5 +5.5 v v i / o dc input voltage range for i/os -0.5 vcc +0.5 v i ok dc output diode current vo> vcc or vo<0 +/-50 ma v o dc output voltage note 3 -0.5 vcc +0.5 v i o dc output source sink current for vp/vm and rcv pins vo=0 to vcc +/-15 ma i o dc output source or sink current for d+/d- pins vo= 0 to vcc +/-50 ma i cc , i gnd dc vcc or gnd current +/-100 ma t sto storage temperature range -60 +150 ? c p tot power dissipation per package mw notes: 1. stresses beyond those listed may cause perm anent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions " is not implied. exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2. the performance capability of a high performance int egrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. the maximum junction temperature of this integrated circuit should not exceed 150 ? c. 3. the input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed.
electrical characteristics 16 dc electrical characteristics over recommended operating conditions. voltag es are referenced to gnd (ground=0v) . limits symbol parameter -40 ? c to +85 ? c unit test conditions min typ max vhys hysteresis on inputs vcc=3.0v to 3.6v (note 3) 0.3 0.4 0.5 v vih high level input vcc=3.0v to 3.6v (note 3) 1.5 2.0 v vil low level input vcc=3.0v to 3.6v (note 3) 0.8 1.1 v roh output impedance (high state) note 2 28 34 43 ohm rol output impedance (low state) note 2 28 35 43 ohm voh high level output (note 3) vcc=3.0v io=6ma vcc=3.0v io=4ma vcc=3.0v io=100a 2.2 2.4 2.8 2.7 v vol low level output (note 3) vcc=3.0v io=6ma vcc=3.0v io=4ma vcc=3.0v io=100a 0.3 0.7 0.4 0.2 v iq quiescent supply current vcc=3.6v vi=vcc or gnd io=0 330 600 a isup supply current in suspend vcc=3.6v vi=vcc or gnd io=0 70 a ifs active supply current (full speed) vcc=3.3v 9 14 ma ils active supply current (low speed) vcc=3.3v 2 ma ileak input leakage current vcc=3.6v vi=5.5v or gnd, not for i/o pins +/- 0.1 +/-0.5 a ioff 3-state output off-state current vi=vih or vi l ; vo=vcc or gnd +/-10 a notes: 1. all typical values are at vcc=3.3v and tamb=25 ? c. 2. this value includes an external resistor of 24 ohm +/-1%. see "load d+ and d-" diagram for testing details. 3. all signals except d+ and d-.
electrical characteristics 17 ac electrical characteristics gnd=0v, t r = t f =3.0 ns; c l =50 pf; rl=500 ohms limits (t amb ) 0 ? c to +25 ? c 0 ? c to +70 ? c symbol parameter waveform min typ max min max unit tplh tphl vmo/vpo to d+/d- full speed 1 0 0 12 12 0 0 14 14 ns trise tfall rise and fall times full speed 2 4 4 9 9 20 20 4 4 20 20 ns trfm rise and fall time matching full speed 90 110 90 110 % tplh tphl vmo/vpo to d+/d- low speed 1 120 120 300 300 300 300 ns trise tfall rise and fall times low speed 2 75 75 300 200 75 75 300 200 ns trfm rise and fall time matching low speed 70 130 70 130 % tplh tphl d+/d- to rcv 3 9 9 16 16 16 16 ns tplh tphl d+/d- to vp/vm 1 4 4 8 8 8 8 ns tphz tpzh tplz tpzl oe# to d+/d- rl = 500ohm 4 12 12 10 10 12 12 10 10 ns tsu setup for speed 5 0 ns vcr crossover point 1 3 1.3 2.0 1.3 2.0 v notes: 1. the crossover point is in the range of 1.3v to 2.5v for the low speed mode with a 50 pf capacitance.
electrical characteristics 18
electrical characteristics 19 5.7 esd test results test description : esd testing was performed on a zapmaster system using the human- body-model (hbm) and machine-model (mm), according to mil-std 883 and eiaj ic- 121 respectively. ? human-body-model stresses devices by sudden application of a high voltage supplied by a 100pf capacitor through 1.5k-ohm resistance. ? machine-model stresses devices by sudden application of a high voltage supplied by a 200pf capacitor through very low (0 ohm) resistance. test circuit & condition - zap interval: 1 second - number of zaps: 3 positive and 3 negative at room temperature - criteria: i-v curve tracing esd data model mode s/s target results hbm vdd, vss, i/c 15 6000v pass mm vdd, vss, i/c 15 200v pass
electrical characteristics 20 5.8 latch-up test results test description : latch-up testing was performed at room ambient using an imcs-4600 system which applies a stepped voltage to one pin per device with all other pins open except vdd and vss which were biased to 5volts and ground respectively. testing was started at 5.0v (positive) or 0v (negative), and the dut was biased for 0.5 seconds. if neither the put current supply nor the devi ce current supply reached the predefined limit (dut=00ma, icc=100ma), then the voltage was in creased by 0.1volts and the pin was tested again. this procedure was recommended by the jedec jc-40.2 cmos logic standardization committee. notes: 1. dut: the device under test. 2. put: the pin under test. test circuit: positive input/ou tput overvoltage/overcurrent
electrical characteristics 21 test circuit: negative input/ou tput overvoltage/overcurrent supply overvoltage test latch-up data mode voltage (v)/current (ma) s/s results + voltage - 11.0 11.0 5 5 pass pass + current - 200 200 5 5 pass pass vdd - vxx 9.0 5 pass
mechanical information 22
mechanical information 23 6.0 mechanical information following table shows the dimensions of the AU9360 100-pin lqfp. measurements are in inches. the illustration is just an example for lqfp but not for AU9360 real size. body size lead d1 e1 count a1 a2 l1 b c e 14 14 100 0.1 1.4 1 0.2 0.127 0.5 a1 stand-off a2 body thickness l1 lead length b lead width c lead thickness e lead pitch
mechanical information 24
mechanical information 25 7.0 errata record history 12/23/2002 ct3 should change connection from high to low. shuttle 9360 chip using 24 mhz is not working, so we let the ct3 connect to high for using 12 mhz. after firmware changed (code: 911218), 24 mhz is working fine and we used 24mhz to tape out. so the schematic should change to use 24 mhz. data book updated to version1.1 03/26/2003 AU9360 controller chip improved to support memory stick pro. data book was then updated the version to 1.2 to add information on memory stick pro. modified parts are descriptions, features, pin names, diagrams and schematics.

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