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pci-wd pci multi-function watchdog and system monitor card user manual
pci-wd user manual document part n 0127-0202 document reference pci-wd\..\ 0127-0202.doc document issue level 1.0 manual covers pcbs identified pci-wd issue. 1.x. (where x is any digit) all rights reserved. no part of this publication may be reproduced, stored in any retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopied, recorded or otherwise, without the prior permission, in writing, from the publisher. information offered in this manual is correct at the time of printing. the publisher accepts no responsibility for any inaccuracies. this information is subject to change without notice. all trademarks and registered names acknowledged.
amendment history issue level issue date author amendment details 1.0 25.02.98 pd first approved issue.

contents blue chip technology ltd. 01270202.doc installing the pci-wd ................................ ................................ ..... 1 connection details ................................ ................................ ......... 2 external connector p1 ................................ ................................ .............. 2 fan connections ( p3, p5 & p6) ................................ ................................ 2 reset output connection ( p7) ................................ ................................ .. 3 digital input ................................ ................................ ............................. 3 fan pulse inputs ................................ ................................ ........................ 3 external supply monitor inputs ................................ ................................ 3 digital output ................................ ................................ ........................... 4 relay output ................................ ................................ ............................. 4 reset output ................................ ................................ ............................. 4 programming details ................................ ................................ .... 5 address map ................................ ................................ ............................. 5 supply monitors ................................ ................................ ........................ 8 fan monitors ................................ ................................ ............................ 8 temperature monitor ................................ ................................ ................ 8 watchdog timer ................................ ................................ ....................... 9 isolated external input ................................ ................................ .............. 9 interrupt selection ................................ ................................ .................... 9 technical specifications ................................ ........................... 11 electromagnetic compatibility (emc) ................................ .................... 13 pcb layout diagram ................................ ................................ ...... 15
contents 01270202.doc blue chip technology ltd. lm78 registers and ram ................................ ............................... 16 address register (base2 + 5h) ................................ ................................ 16 address pointer index ................................ ................................ ............. 16 data register (base2 +6h) ................................ ................................ ...... 16 configuration register -lm78 address 40h ................................ ............. 17 interrupt status register1 -lm78 address 41h ................................ ......... 17 interrupt status register2 -lm78 address 42h ................................ ......... 18 irq# mask register1 -lm78 address 45h ................................ ............... 18 irq# mask register2 -lm78 address 46h ................................ ............... 19 fan divisor register -lm78 address 47h ................................ ................ 19 chip reset/ id register -lm78 address 49h ................................ ............ 20 value ram ................................ ................................ ............................. 20
introduction blue chip technology ltd. 01270202.doc introduction the pci-wd is a pci-compatible half-card which provides system monitoring of system power supplies, fan operation, system temperature and processor activity and generates alarm functions in the event of a system malfunction. the heart of the system monitoring is performed by the national semiconductor lm78 ic. this highly integrated devices performs the supply, fan and temperature monitoring circuits as well interrupt generation. four pci power rails ( +3.3v, +5v, +12v and -12v) can be monitored for over and under voltage excursions. in the event of the rails drifting out specification the system is notified. three fan speed counter circuits provide a warning to the system that fans are operating out of specification. this function requires the use of tacho pulse fans which provide output pulses the frequency of which is proportional to the fan speed. if the fan speed drops below predefined limits, the system is notified. a programmable watchdog timer facilitates monitoring of application software execution. this is achieved by the use of a timer which notifies the system on the event of a time out. the user application must refresh this timer before the count has expired indicating successful code execution. the timer is software selectable between 1 and 255 seconds. the pci-wd has an onboard temperature monitor to notify the system that temperature within the pc enclosure has risen past a prescribed level. external events can be monitored through an isolated digital input. the input voltage levels can range from -50v to + 50v with an input current level of 1ma. in the event of a state of change on this input the system is notified. in response to any of the above monitoring circuits detecting an error or change in condition, the system can generate a number of responses including activating a relay, activating an on board audible alarm, illuminating an led or resetting the system. each of the above responses can be enabled and disabled under software control.
introduction 01270202.doc blue chip technology ltd. all input / output lines are available on a 15 way rugged screw terminal connector. one pci interrupt line may be selectively driven by a number of interrupt sources on the board, the interrupting source being readily identified by the board. the pci-wd is intended to be installed with the minimum of user interaction. the board is configured by the system bios and by the application drivers and no on-board links are required to select functionality.
about the manual blue chip technology ltd. 01270202.doc about the manual this manual is organised into four chapters. each chapter covers a different aspect of using the pci-wd. in order to get the best results from the product, the user is urged to read all chapters, paying particular note to chapter 1 which deals with the initial installation of the card. chapter 1 explains how to install the card in your computer. chapter 2 details the connections to and from the card. chapter 3 gives details of the card?s address mapping and internal register details allowing the user to write custom software to control the card. chapter 4 presents the card?s technical specification. use this section to determine the card?s suitability for a particular application this manual describes the complete hardware functionality of the pci-wd board. all the functions described may not necessarily be supported by the current release of the windows nt driver and dll set.

chapter 1 installation page 1 blue chip technology ltd. 01270202.doc page 1 chapter 1 installing the pci-wd the card is installed by removing the cover of the host computer and inserting the card into a free pci slot. the rear panel of the card should then be secured to the rear panel of the host computer with the screw supplied with the computer. when the computer is switched on, the bios will detect the presence of the card and will allocate it with a set of base addresses and an interrupt. these parameters may then be used by the application software to access the card. if the card is to be directly accessed by a user?s dos application, it will be necessary for the application to determine where the bios has located the card. to this end a software function has been provided. refer to the ?readme.txt? file on the supplied disk for details.
page 2 connection details chapter 2 page 2 01270202.doc blue chip technology ltd. chapter 2 connection details external connector p1 the following table refers to the 15 way two-part screw terminal connector (p1) at the rear of the card. pin usage 1 relay normally closed contact 2 relay common contact 3 relay normally open contact 4 opto input (+ve) 5 opto input (-ve) 6 vcc ( fused at 1a) 7 iic interface ( not yet implemented) 8 iic interface ( not yet implemented) 9 iic interface ( not yet implemented) 10 digital ground 11 external +ve voltage monitor 1 ( not yet implemented) 12 external +ve voltage monitor 2 ( not yet implemented) 13 external -ve voltage monitor 1 ( not yet implemented) 14 external open collector output 15 analogue ground (gnd reference for external voltage monitor inputs) fan connections ( p3, p5 & p6) the fan monitoring circuits connect to the fans by standard 0.1? pitch latched two way molex connectors. pin 1 of the connectors must be connected to the open collector output of the fan and pin 2 referenced to the fan ground connection which also be the system 0 volt connection. the polarity of these connections is identified on the pci-wd pcb silk-screen.
chapter 2 connection de tails page 3 blue chip technology ltd. 01270202.doc page 3 reset output connection ( p7) this output is used to force a system reset in the same manor as the pc front panel reset switch. the connector (p7) should be wired in parallel across the front panel reset switch and/or the motherboard reset pin header. the connector is a standard 0.1 pitch latched 2 way molex connector. the polarity of this connector is identified on the pci-wd pcb silk-screen. suitable interface signal types digital input the opto isolated digital input has two connections across which a voltage applied. this voltage may be between -50 volts and +50 volts. any voltage between -50 volts and +2.4 volts will be interpreted as a logic zero, and any voltage between +4.4 volts and +50 volts will be interpreted as logic 1. the current on this input signal is a constant 1ma, when the input voltage conforms to the logic 1 requirements, and 5ua (max) for a logic 0. a fused (1 amp) +5 volt supply and ground reference signal is available on the screw terminal connector to allow this input to be configured in voltage free switching input installations. when configured in this way there is no electrical isolation between the input circuit and the host pc. fan pulse inputs the use of the fan pulse counters requires the use of special fans who provide an open collector tacho output. the connections to the board are made via three two way molex connectors p3, p5 and p6. the first and second fan counter circuits are programmable to cover a range of speeds from 1100 to 8800rpm. the third fan input is fixed at 4400 rpm. external supply monitor inputs the external supply inputs are not currently supported and should therefore remain unconnected.
page 4 connection details chapter 2 page 4 01270202.doc blue chip technology ltd. digital output the digital output is a non-isolated open collector output capable of sinking 500ma. the maximum switching voltage is +50v. when an inductive load is being driven by this output, it is essential that a reverse biased diode is connected across the load to catch the back emfs generated when the output is de-energised and the load current falls to zero. relay output the relay output contacts provide voltage free signalling to indicate a change in system status. the relay contacts can be configured for normally open, normally closed or changeover operation. the contacts are rated at 1 amp 24 volt dc and 0.5 amp 125 volt ac. care should be exercised with any voltage in excess of 50 volts reset output the reset connector (p7) requires the user to wire a parallel connection from the pci-wd card (p7) to the reset header of the pc motherboard and the reset switch. this cabling arrangement allows the pc reset switch to be used independently of the pci-wd reset function.
chapter 3 programming details page 5 blue chip technology ltd. 01270202.doc page 5 chapter 3 programming details this chapter provides details of the cards internal registers. address map the address map for the pci-wd occupies a 12-byte block of addresses. all the following addresses are relative to the addresses contained in pci base address registers 2, (bar2 ) as indicated. the bar2 is located at address offset 18h in the pci configuration space:- address (hex) function access width read/ write base2 + 5 lm78 internal address register byte w base2 + 6 lm78 internal data register byte r/w base2 + 8 watchdog timer count load register byte w base2 + 8 watchdog timer reset port byte r base2 + 9 pci-wd irq and wd timer enable/disable register byte w base2 + 9 pci-wd status register byte r base2 + a pci wd output mask register byte w base2 + b pci-wd output control register byte w in order to access the internal registers of the lm78, the user must first write the address of the register to port base2 + 5h. the data is then written to or read from port base2 + 6h. a full description of the lm78 registers is given in the appendices. the base2 + 8+ registers have the following bit assignments.
page 6 programming details chapter 3 page 6 01270202.doc blue chip technology ltd. base2 + 8 : the value written to this register determines the watchdog time-out period in multiples of 2 sec. valid entries are 1 to 127( 2 to 254 seconds). when this address is read, a refresh of the watchdog timer is generated. the value read from this address is extraneous. base2 + 9 : writing to this register enables the watchdog timers and the various interrupt sources. reading this register returns the enable register status and the board irq status. the bit assignments are tabulated below: interrupt enable/ status register (base 2 +9 h ) write bit no. function b7 not used b6 not used b5 not used b4 not used b3 watchdog timer interrupt enable 1 = enable, 0 = disable b2 lm78 interrupt enable 1 = enable, 0 = disable b1 external input interrupt enable 1 = enable, 0 = disable b0 watchdog timer enable 1 = enable, 0 = disable interrupt enable register (base 2 + 9 h ) read bit no. function b7 watchdog timer irq status 1 = triggered b6 lm78 irq status 1 = triggered b5 external input irq status 1 = triggered b4 external opto input value 1: ip =>4.4v, 0: ip<2.4v b3 watchdog timer interrupt enable status b2 lm78 interrupt enable status b1 external input interrupt enable status b0 watchdog timer enable status base2 + a : this register allows the pci-wd to provide a number of different output actions in response to a fault condition. these outputs are; a system reset, a relay contact change over, a buzzer sounding, an led illuminating and an open collector transistor output being driven. by setting the appropriate bits of this register any combination of the above outputs can be activated on the occurrence of a fault condition. this register is write only.
chapter 3 programming details page 7 blue chip technology ltd. 01270202.doc page 7 output response register (base 2 + a h ) write bit no. function b7 not used b6 not used b5 not used b4 activate open collector 1 = enable, 0 = disable b3 illuminate led 1 = enable, 0 = disable b2 alarm buzzer 1 = enable, 0 = disable b1 relay change over 1 = enable, 0 = disable b0 system reset 1 = enable, 0 = disable base2 + b : this register permits direct access to the output functions of the pci-wd card. it may be used instead of or in conjunction with the output response register. with this register the relay, led, reset, buzzer etc, functions can be accessed directly through an io write. this register is write only. output response register (base 2 + b h ) write bit no. function b7 not used b6 not used b5 not used b4 activate open collector 1 = enable, 0 = disable b3 illuminate led 1 = enable, 0 = disable b2 alarm buzzer 1 = enable, 0 = disable b1 relay change over 1 = enable, 0 = disable b0 system reset 1 = enable, 0 = disable
page 8 programming details chapter 3 page 8 01270202.doc blue chip technology ltd. supply monitors the supply monitor circuits can be programmed to detect over and undervoltage on the supply rails. one negative and three positive rails are monitored as standard. the lm78 supports an 8 bit adc with a resolution of 16mv over an input range of 0 - 4.08 volts. for this reason the +5 volt and the 12 volt supplies are attenuated. consequently the lsb weighting for each supply will differ depending on the attenuation. the following table list each of the supply attenuation factors and the corresponding lsb value. supply voltage voltage to adc input lsb weighting +3.3 volts 3.3 volts 16mv/bit 5 volts 2.98 volts 26.8mv/bit +12 volts 3.00 volts 64mv/bit -12 volts 3.00 volts 64mv/bit the converted results can be read from the corresponding value ram locations within the lm78. any rail suffering an out of limit excursion can be read through interrupt status registers 1 and 2. the under and over voltage limits can be programmed into the corresponding value ram locations. fan monitors the fan monitor circuits can be enabled and disabled under software control to accommodate a variety of system configurations using the lm78 address registers 45h & 46h. each fan monitor has software selectable count limits which can be accessed through value ram locations 3bh & 3ch & 3dh. in addition fan monitors 1 and 2 can be configured for different nominal fan speeds of 8800, 4400, 2200 and 1100 rpm through lm78 register address 47h. fan monitor 3 is fixed for a nominal speed of 4400 rpm. temperature monitor the pci-wd provides on board temperature monitoring to indicate when an excessive temperature rise has occurred. the temperature data is represented by an 8-bit, two?s complement word with an lsb of 1 c the upper temperature limit and the temperature hysteresis can be programmed by the user through the lm78 value ram locations 39h & 3ah.
chapter 3 programming details page 9 blue chip technology ltd. 01270202.doc page 9 watchdog timer the watchdog timer comprises of an 8-bit load counter with a time base of 2 hz giving a watchdog refresh period of 1 to 255 seconds. the watchdog refresh period is set through register base2 + 8h. the watchdog timer can be enabled/ disabled through bit 0 of register base2 + 9h. isolated external input the status of the external input can be read directly from port base2 + 9 bit 4. in addition a change of state on this input can generate a interrupt to the system. this interrupt operation can enabled/disabled through port base2+ 9 bit 1. interrupt selection a total of 10 sources of interrupt are available from the supply, fans, temperature, external input and watchdog timer monitors. these interrupts are divided between the lm78 functions ( power fan and temperature monitors) and the non lm78 functions ( watchdog timer and external input). the lm78 can generate interrupts on the occurrence of an out of limit condition on one of more of the enabled lm78 monitor circuits. the lm78 produces a single interrupt signal which is in turn combined on board with the non-lm78 monitor circuits to produce a single interrupt signal for the pci-wd. the interrupt status registers are located at lm78 register addresses 41h and 42h. a full description of these registers and their bit assignments can be found in the appendices. the non-lm78 function interrupts are accessed at base2 + 9. the bit assignments for these interrupts can be found in the previous section. given the combined gating of the various interrupt sources, the source of the interrupt must first be determined by reading the interrupt status register at address base3 + 1h. this determines if the interrupt was generated by the lm78, the watchdog timer or the external input. if it was the lm78 its interrupt registers must then be read. having serviced an interrupt, the source should be cleared by momentarily clearing the relevant bit in the interrupt enable register ( base 2 + 9).
page 10 programming details chapter 3 page 10 01270202.doc blue chip technology ltd. the use of interrupts is not essential but greatly enhances the functionality of the card. when the card is configured to run without interrupts i.e. in polled mode, the polling interval between successive polls must be greater than 1.5 seconds to ensure a complete system monitor scan and update of the data ram area of the lm78.
chapter 4 technical specifications page 11 blue chip technology ltd. 01270202.doc page 11 chapter 4 technical specifications supply monitors resolution: 8 bit delta sigma adc accuracy 1% / volts lsb weighting: 3.3 volt rail 16mv/ bit 5 volt rail 26.8mv/bit 12 volt rail 64mv/bit relay output contact rating: 1a 24v dc, 120v 0.5a ac ( non inductive) maximum current: 2a maximum switched voltage: 125 volts maximum switched power: 24w/ 60va minimum contact load: 1ma, 1volt digital input maximum input voltage: 50 volts dc or ac peak input current: 1ma 200 m a for vth< vin< 50v dc +5 m a ( max) for -50v dc < vin < vth open collector output: maximum drive current: 500ma (logic low) vout = 0.4 volts ( non inductive) maximum off state voltage 50 volts dc maximum output dissipation 750mw
page 12 technical specifications chapter 4 page 12 01270202.doc blue chip technology ltd. fan inputs: maximum input voltage: +5volt from totem pole source +12volt open collector source fan 1 & 2 nominal input: divisor = 1, count =153, rpm = 8800 divisor = 2, count =153, rpm = 4400 divisor = 3, count =153, rpm = 2200 divisor = 4, count =153 rpm = 1100 fan 3 nominal input: count = 153, rpm = 4400 temperature monitor range: -10 c < ta< +100 c accuracy: 3 c resolution: 1 c interrupts interrupt sources: register selectable to 12 sources, +3.3v, +5v, +12v, -12v, 3 fan circuits temperature monitor, external input and watchdog timer levels supported: one pci intn# interrupt address overhead: 12 i/o addresses in 2 pci address spaces power board power requirement: +5 volts, 1.8 w maximum +3.3volts @ 1ma max +12 volts @ 1ma max -12 volts @ 1ma max physical signal connections: 1 x 15 way two-part screw terminal connector dimensions: 124 (l) x 99 (h) board only 140 (l) x xx (h) x 22(w) including bracket
chapter 4 technical specifications page 13 blue chip technology ltd. 01270202.doc page 13 electromagnetic compatibility (emc) this product meets the requirements of the european emc directive (89/336/eec) and is eligible to bear the ce mark. it has been assessed operating in our standard industrial pc. however, because the board can be installed in a variety of computers, certain conditions have to be applied to ensure that the compatibility is maintained. it meets the requirements of en55022:1995 for a class a product subject to those conditions. the board must be installed in a computer system which provides screening suitable for an industrial environment. any recommendations made by the computer system manufacturer/supplier must be complied with regarding earthing and the installation of boards. the board must be installed with the backplate securely screwed to the chassis of the computer to ensure good metal-to-metal (i.e. earth) contact. most emc problems are caused by the external cabling to boards. it is imperative that any external cabling to the board is totally screened, and that the screen of the cable connects to the metal end bracket of the board and hence to earth. it is recommended that round screened cables with a braided wire screen are used in preference to those with a foil screen and drain wire. use metal connector shells which connect around the full circumference of the screen; they are far superior to those which earth the screen by a simple ?pig-tail?. standard ribbon cable will not be adequate unless it is contained wholly within the cabinetry housing the industrial pc. ensure that the screen of the external cable is bonded to a good rf earth at the remote end of the cable. cables which connect externally to boards at ttl levels should not exceed two metres in length.
page 14 technical specifications chapter 4 page 14 01270202.doc blue chip technology ltd. failure to observe these recommendations may invalidate the emc compliance. warning this is a class a product. in a domestic environment this product may cause radio-interference in which case the user may be required to take adequate measures. emc specification a suitably compliant industrial pc fitted with this card meets the following specification: emissions en 55022:1995 radiated class a conducted class a & b immunity en 50082-2:1995 incorporating: el ectrostatic discharge en 61000-4-2 radio frequency susceptibility env50140 env50204 fast burst transients en 61000-4-4
chapter 4 technical specifications page 15 blue chip technology ltd. 01270202.doc page 15 pcb layout diagram
page 16 technical specifications chapter 4 page 16 01270202.doc blue chip technology ltd. lm78 registers and ram ` address register (base2 + 5h) bit name read/ write description 6-0 address pointer read/write address ram and register 7 busy read only 1 = busy on bus transaction address pointer index register & ram location (hex) power on value configuration register 40h 08h irq# status register 1 41h 00h irq# status register 2 42h 00h irq# mask register 1 45h 00h irq# mask register 2 46h 40h vid/fan divisor 47h 5fh chip reset/id register 49h 40h value ram 20-3fh value ram 60 7fh data register (base2 +6h) bit name read/write description 7-0 data read/write data read/ written to ram
chapter 4 technical specifications page 17 blue chip technology ltd. 01270202.doc page 17 configuration register -lm78 address 40h bit name read/write description 0 start read/write 1= monitor, 0= standby 1 not used read/write 2 nmi/irq# enable read/write 1= enable nmi/irq# output 3 int_clear read/write 1= disable smi/nmi outputs 4 not used read/write 5 nmi/irq# select read/write 1 selects nmi, 0 selects irq# 6 not used read/write 7 initialization read/write 1 = restore power on defaults interrupt status register1 -lm78 address 41h bit name read /write description 0 +3v3 monitor read 1=high or limit has been exceeded 1 +5v monitor read 1=high or limit has been exceeded 2 +12v monitor read 1=high or limit has been exceeded 3 not used read 4 temperature read 1=high or limit has been exceeded 5 not used read 6 fan 1 read 1=fan count limit has been exceeded 7 fan 2 read 1=fan count limit has been exceeded
page 18 technical specifications chapter 4 page 18 01270202.doc blue chip technology ltd. interrupt status register2 -lm78 address 42h bit name read /write description 0 +spare2 monitor read not used 1 -12v monitor read 1=high or limit has been exceeded 2 -spare 1 monitor read not used 3 fan 3 read 1 = fan count limit has been exceeded 4 chassis intrusion read not used 5 fifo over flow read not used 6 smi_in# read not used 7 reserved read not used irq# mask register1 -lm78 address 45h bit name read /write description 0 +3v3 monitor read /write 1=disable corresponding interrupt status bit for irq# interrupt 1 +5v monitor read /write 1=disable corresponding interrupt status bit for irq# interrupt 2 +12v monitor read /write 1=disable corresponding interrupt status bit for irq# interrupt 3 not used read /write 4 temperature read /write 1=disable corresponding interrupt status bit for irq# interrupt 5 not used read /write 6 fan 1 read /write 1=disable corresponding interrupt status bit for irq# interrupt 7 fan 2 read /write 1=disable corresponding interrupt status bit for irq# interrupt
chapter 4 technical specifications page 19 blue chip technology ltd. 01270202.doc page 19 irq# mask register2 -lm78 address 46h bit name read /write description 0 not used read /write 1 -12v monitor read /write 1=disable corresponding interrupt status bit for irq# interrupt 2 not used read /write 3 fan 3 read /write 1=disable corresponding interrupt status bit for irq# interrupt 4 not used read /write 5 not used read /write 6 not used read /write 7 reserved read /write fan divisor register -lm78 address 47h bit name read /write description 3-0 not used read 5-4 fan 1 rpm control read /write fan 1 speed control <5:4> = 00 - divide by 1 <5:4> = 01 - divide by 2 <5:4> = 10 - divide by 4 <5:4> = 11 - divide by 8 6-7 fan 2 rpm control read /write fan 2 speed control <7:6> = 00 - divide by 1 <7:6> = 01 - divide by 2 <7:6> = 10 - divide by 4 <7:6> = 11 - divide by 8
page 20 technical specifications chapter 4 page 20 01270202.doc blue chip technology ltd. chip reset/ id register -lm78 address 49h bit name read /write description 4-0 reserved read 5 chip reset read /write 1= reset all register to default state 6 device id read 1 =lm78j, 0 = old part 7 reserved read value ram address address with auto increment description 20h 60h +3.3v reading 21h 61h +5v reading 22h 62h +12v reading 23h 63h not used 24h 64h not used 25h 65h -12v reading 26h 66h not used 27h 67h temperature reading 28h 68h fan1 reading 29h 69h fan2 reading 2ah 6ah fan 3 reading 2bh 6bh +3.3v high limit 2ch 6ch +3.3v low limit 2dh 6dh +5v high limit 2eh 6eh +5v low limit 2fh 6fh +12v high limit 30h 70h +12v low limit 31h 71h not used 32h 72h not used 33h 73h not used 34h 74h not used
chapter 4 technical specifications page 21 blue chip technology ltd. 01270202.doc page 21 address address with auto increment description 35h 75h -12v high limit 36h 76h -12v low limit 37h 77h not used 38h 78h not used 39h 79h over temperature limit ( high) 3ah 7ah temperature hysteresis limit ( low) 3bh 7bh fan1 count limit 3ch 7ch fan2 count limit 3dh 7dh fan3 count limit 3e-3fh 7e-7fh reserved

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